From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935077AbdHYWAE (ORCPT ); Fri, 25 Aug 2017 18:00:04 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:43020 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934975AbdHYV6P (ORCPT ); Fri, 25 Aug 2017 17:58:15 -0400 Message-Id: <20170825214943.138614227@linutronix.de> User-Agent: quilt/0.63-1 Date: Fri, 25 Aug 2017 23:47:25 +0200 From: Thomas Gleixner To: LKML Cc: Ingo Molnar , Peter Anvin , Peter Zijlstra , Andy Lutomirski , Borislav Petkov , Steven Rostedt Subject: [patch V2 37/44] x86/idt: Move ist stack based traps to table init References: <20170825214648.264521964@linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15 Content-Disposition: inline; filename=x86-idt--Move-ist-stack-based-traps-to-table-init.patch Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Initialize the IST based traps via a table Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/desc.h | 2 ++ arch/x86/kernel/idt.c | 22 ++++++++++++++++++++++ arch/x86/kernel/traps.c | 9 +-------- 3 files changed, 25 insertions(+), 8 deletions(-) --- a/arch/x86/include/asm/desc.h +++ b/arch/x86/include/asm/desc.h @@ -509,9 +509,11 @@ extern void idt_setup_early_traps(void); #ifdef CONFIG_X86_64 extern void idt_setup_early_pf(void); +extern void idt_setup_ist_traps(void); extern void idt_setup_debugidt_traps(void); #else static inline void idt_setup_early_pf(void) { } +static inline void idt_setup_ist_traps(void) { } static inline void idt_setup_debugidt_traps(void) { } #endif --- a/arch/x86/kernel/idt.c +++ b/arch/x86/kernel/idt.c @@ -92,6 +92,20 @@ struct desc_ptr idt_descr __ro_after_ini gate_desc debug_idt_table[IDT_ENTRIES] __page_aligned_bss; /* + * The exceptions which use Interrupt stacks. They are setup after + * cpu_init() when the TSS has been initialized. + */ +static const __initdata struct idt_data ist_idts[] = { + ISTG(X86_TRAP_DB, debug, DEBUG_STACK), + ISTG(X86_TRAP_NMI, nmi, NMI_STACK), + ISTG(X86_TRAP_BP, int3, DEBUG_STACK), + ISTG(X86_TRAP_DF, double_fault, DOUBLEFAULT_STACK), +#ifdef CONFIG_X86_MCE + ISTG(X86_TRAP_MC, &machine_check, MCE_STACK), +#endif +}; + +/* * Override for the debug_idt. Same as the default, but with interrupt * stack set to DEFAULT_STACK (0). Required for NMI trap handling. */ @@ -157,6 +171,14 @@ void __init idt_setup_early_pf(void) } /** + * idt_setup_ist_traps - Initialize the idt table with traps using IST + */ +void __init idt_setup_ist_traps(void) +{ + idt_setup_from_table(idt_table, ist_idts, ARRAY_SIZE(ist_idts)); +} + +/** * idt_setup_debugidt_traps - Initialize the debug idt table with debug traps */ void __init idt_setup_debugidt_traps(void) --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -979,14 +979,7 @@ void __init trap_init(void) */ cpu_init(); - /* - * X86_TRAP_DB and X86_TRAP_BP have been set - * in early_trap_init(). However, ITS works only after - * cpu_init() loads TSS. See comments in early_trap_init(). - */ - set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK); - /* int3 can be called from all */ - set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK); + idt_setup_ist_traps(); x86_init.irqs.trap_init();