From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751912AbdH1O56 (ORCPT ); Mon, 28 Aug 2017 10:57:58 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:55610 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751596AbdH1O5o (ORCPT ); Mon, 28 Aug 2017 10:57:44 -0400 From: Antoine Tenart To: davem@davemloft.net, kishon@ti.com, andrew@lunn.ch, jason@lakedaemon.net, sebastian.hesselbarth@gmail.com, gregory.clement@free-electrons.com Cc: Antoine Tenart , thomas.petazzoni@free-electrons.com, nadavh@marvell.com, linux@armlinux.org.uk, linux-kernel@vger.kernel.org, mw@semihalf.com, stefanc@marvell.com, miquel.raynal@free-electrons.com, netdev@vger.kernel.org Subject: [PATCH net-next v3 03/13] Documentation/bindings: phy: document the Marvell comphy driver Date: Mon, 28 Aug 2017 16:57:15 +0200 Message-Id: <20170828145725.2539-4-antoine.tenart@free-electrons.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170828145725.2539-1-antoine.tenart@free-electrons.com> References: <20170828145725.2539-1-antoine.tenart@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Marvell Armada 7K/8K SoCs contains an hardware block called COMPHY that provides a number of shared PHYs used by various interfaces in the SoC: network, SATA, PCIe, etc. This Device Tree binding allows to describe this COMPHY hardware block. Signed-off-by: Antoine Tenart --- .../devicetree/bindings/phy/phy-mvebu-comphy.txt | 43 ++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/phy-mvebu-comphy.txt diff --git a/Documentation/devicetree/bindings/phy/phy-mvebu-comphy.txt b/Documentation/devicetree/bindings/phy/phy-mvebu-comphy.txt new file mode 100644 index 000000000000..bfcf80341657 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-mvebu-comphy.txt @@ -0,0 +1,43 @@ +mvebu comphy driver +------------------- + +A comphy controller can be found on Marvell Armada 7k/8k on the CP110. It +provides a number of shared PHYs used by various interfaces (network, sata, +usb, PCIe...). + +Required properties: + +- compatible: should be "marvell,comphy-cp110" +- reg: should contain the comphy register location and length. +- marvell,system-controller: should contain a phandle to the + system controller node. +- #address-cells: should be 1. +- #size-cells: should be 0. + +A sub-node is required for each comphy lane provided by the comphy. + +Required properties (child nodes): + +- reg: comphy lane number. +- #phy-cells : from the generic phy bindings, must be 1. Defines the + input port to use for a given comphy lane. + +Example: + + cpm_comphy: phy@120000 { + compatible = "marvell,comphy-cp110"; + reg = <0x120000 0x6000>; + marvell,system-controller = <&cpm_syscon0>; + #address-cells = <1>; + #size-cells = <0>; + + cpm_comphy0: phy@0 { + reg = <0>; + #phy-cells = <1>; + }; + + cpm_comphy1: phy@1 { + reg = <1>; + #phy-cells = <1>; + }; + }; -- 2.13.5