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* [PATCH i-g-t] pm_rps: Changes in waitboost scenario
@ 2017-08-18  7:33 Katarzyna Dec
  2017-08-18  7:57 ` ✓ Fi.CI.BAT: success for " Patchwork
                   ` (13 more replies)
  0 siblings, 14 replies; 34+ messages in thread
From: Katarzyna Dec @ 2017-08-18  7:33 UTC (permalink / raw)
  To: intel-gfx

Waitboost and reset test cases were failing because maximum
frequency is not always boost frequency (sometimes overcloking
occurs).
Moreover more time is needed for boost to be finished.
Changed boost_freq function so boost occurred on the same engine
as low load.
Added function waiting for boost to be finished.
Made test DRM master to make sure that the test isn't ran along Xorg

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jeff Mcgee <jeff.mcgee@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>

Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
---
 tests/pm_rps.c | 58 ++++++++++++++++++++++++++++++++++++++++++++++++++--------
 1 file changed, 50 insertions(+), 8 deletions(-)

diff --git a/tests/pm_rps.c b/tests/pm_rps.c
index f0455e78..08a73f5d 100644
--- a/tests/pm_rps.c
+++ b/tests/pm_rps.c
@@ -50,6 +50,7 @@ enum {
 	RP0,
 	RP1,
 	RPn,
+	BOOST,
 	NUMFREQ
 };
 
@@ -60,7 +61,7 @@ struct junk {
 	const char *mode;
 	FILE *filp;
 } stuff[] = {
-	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { NULL, NULL, NULL }
+	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { "boost", "rb+", NULL }, { NULL, NULL, NULL }
 };
 
 static int readval(FILE *filp)
@@ -556,25 +557,61 @@ static void stabilize_check(int *out)
 static void reset_gpu(void)
 {
 	int fd = drm_open_driver(DRIVER_INTEL);
+
 	igt_post_hang_ring(fd, igt_hang_ring(fd, I915_EXEC_DEFAULT));
 	close(fd);
 }
 
+static bool is_in_boost(void)
+{
+	char buf[1024];
+
+	igt_debugfs_read(drm_fd, "i915_rps_boost_info", buf);
+	return strstr(buf, "Boosts outstanding? 1");
+}
+
 static void boost_freq(int fd, int *boost_freqs)
 {
 	int64_t timeout = 1;
-	int ring = -1;
 	igt_spin_t *load;
+	unsigned int engine;
 
-	load = igt_spin_batch_new(fd, ring, 0);
-
+	/* put boost on the same engine as low load */
+	engine = I915_EXEC_RENDER;
+	if (intel_gen(lh.devid) >= 6)
+		engine = I915_EXEC_BLT;
+	load = igt_spin_batch_new(fd, engine, 0);
 	/* Waiting will grant us a boost to maximum */
 	gem_wait(fd, load->handle, &timeout);
 
 	read_freqs(boost_freqs);
 	dump(boost_freqs);
+	igt_assert_eq(is_in_boost(), 1);
 
+	/* Avoid downlocking till boost request is pending */
+	igt_spin_batch_end(load);
+	gem_sync(fd, load->handle);
 	igt_spin_batch_free(fd, load);
+
+}
+
+#define BOOST_WAIT_TIMESTEP_MSEC 250
+#define BOOST_WAIT_TIMEOUT_MSEC 15000
+static void fall_from_boost_wait(int *freqs)
+{
+	int wait = 0;
+
+	do {
+		read_freqs(freqs);
+		dump(freqs);
+		if (!is_in_boost())
+			break;
+		usleep(1000 * BOOST_WAIT_TIMESTEP_MSEC);
+		wait += BOOST_WAIT_TIMESTEP_MSEC;
+
+	} while (wait < BOOST_WAIT_TIMEOUT_MSEC);
+
+	igt_debug("Waited %d till falling from boost\n", wait);
 }
 
 static void waitboost(bool reset)
@@ -601,6 +638,7 @@ static void waitboost(bool reset)
 	 * to maximum.
 	 */
 	boost_freq(fd, boost_freqs);
+	fall_from_boost_wait(post_freqs);
 
 	igt_debug("Apply low load again...\n");
 	sleep(1);
@@ -611,7 +649,7 @@ static void waitboost(bool reset)
 	idle_check();
 
 	igt_assert_lt(pre_freqs[CUR], pre_freqs[MAX]);
-	igt_assert_eq(boost_freqs[CUR], boost_freqs[MAX]);
+	igt_assert_eq(boost_freqs[CUR], boost_freqs[BOOST]);
 	igt_assert_lt(post_freqs[CUR], post_freqs[MAX]);
 
 	close(fd);
@@ -640,14 +678,15 @@ igt_main
 		struct junk *junk = stuff;
 		int ret;
 
-		/* Use drm_open_driver to verify device existence */
-		drm_fd = drm_open_driver(DRIVER_INTEL);
+		/* Use drm_open_driver to to force running tests as drm master */
+		drm_fd = drm_open_driver_master(DRIVER_INTEL);
 		igt_require_gem(drm_fd);
 		igt_require(gem_can_store_dword(drm_fd, 0));
 
 		do {
 			int val = -1;
 			char *path;
+
 			ret = asprintf(&path, sysfs_base_path, device, junk->name);
 			igt_assert(ret != -1);
 			junk->filp = fopen(path, junk->mode);
@@ -657,7 +696,7 @@ igt_main
 			val = readval(junk->filp);
 			igt_assert(val >= 0);
 			junk++;
-		} while(junk->name != NULL);
+		} while (junk->name != NULL);
 
 		read_freqs(origfreqs);
 
@@ -684,4 +723,7 @@ igt_main
 	igt_subtest("reset")
 		waitboost(true);
 
+	igt_fixture {
+		intel_register_access_fini();
+	}
 }
-- 
2.13.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario
  2017-08-18  7:33 [PATCH i-g-t] pm_rps: Changes in waitboost scenario Katarzyna Dec
@ 2017-08-18  7:57 ` Patchwork
  2017-08-18 11:08 ` [PATCH i-g-t v2] " Katarzyna Dec
                   ` (12 subsequent siblings)
  13 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2017-08-18  7:57 UTC (permalink / raw)
  To: Katarzyna Dec; +Cc: intel-gfx

== Series Details ==

Series: pm_rps: Changes in waitboost scenario
URL   : https://patchwork.freedesktop.org/series/28966/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
5a17ee2c8f9013f5db852d27564b837f9f2c5a9f tools/intel_vbt_decode: Fix decoding of child device structure

with latest DRM-Tip kernel build CI_DRM_2972
cdafe36f7b6f drm-tip: 2017y-08m-17d-21h-02m-32s UTC integration manifest

fi-bdw-5557u     total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:455s
fi-bdw-gvtdvm    total:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  time:441s
fi-blb-e6850     total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  time:359s
fi-bsw-n3050     total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  time:549s
fi-bxt-j4205     total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:521s
fi-byt-j1900     total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  time:524s
fi-byt-n2820     total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  time:515s
fi-glk-2a        total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:610s
fi-hsw-4770      total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:446s
fi-hsw-4770r     total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:422s
fi-ilk-650       total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  time:423s
fi-ivb-3520m     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:501s
fi-ivb-3770      total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:477s
fi-kbl-7500u     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:475s
fi-kbl-7560u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:600s
fi-kbl-r         total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:599s
fi-pnv-d510      total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  time:525s
fi-skl-6260u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:474s
fi-skl-6700k     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:477s
fi-skl-6770hq    total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:484s
fi-skl-gvtdvm    total:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  time:437s
fi-skl-x1585l    total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:478s
fi-snb-2520m     total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  time:548s
fi-snb-2600      total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  time:409s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_73/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH i-g-t v2] pm_rps: Changes in waitboost scenario
  2017-08-18  7:33 [PATCH i-g-t] pm_rps: Changes in waitboost scenario Katarzyna Dec
  2017-08-18  7:57 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2017-08-18 11:08 ` Katarzyna Dec
  2017-08-18 13:45   ` Chris Wilson
                     ` (2 more replies)
  2017-08-18 13:22 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev2) Patchwork
                   ` (11 subsequent siblings)
  13 siblings, 3 replies; 34+ messages in thread
From: Katarzyna Dec @ 2017-08-18 11:08 UTC (permalink / raw)
  To: intel-gfx

CI is observing sporadical failures in pm_rps subtests.
There are a couple of reasons. One of them is the fact that
on gen6, gen7 and gen7.5, max frequency (as in the HW limit)
is not set to RP0, but the value obtaind from PCODE (which
may be different from RP0). Thus the test is operating under
wrong assumptions (SOFTMAX == RP0 == BOOST which is simply
not the case). Let's compare current frequency with BOOST
frequency rather than SOFTMAX to get the test behaviour under control.
We're also seeing failures with boost frequency failing to drop
down before we start measuring on low.
While I'm here let's also make sure that we're running as DRM
master to catch the common case, where the test is being ran
along with Xorg.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jeff Mcgee <jeff.mcgee@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
---
 tests/pm_rps.c | 39 ++++++++++++++++++++++++++++++---------
 1 file changed, 30 insertions(+), 9 deletions(-)

diff --git a/tests/pm_rps.c b/tests/pm_rps.c
index f0455e78..efe938e0 100644
--- a/tests/pm_rps.c
+++ b/tests/pm_rps.c
@@ -50,6 +50,7 @@ enum {
 	RP0,
 	RP1,
 	RPn,
+	BOOST,
 	NUMFREQ
 };
 
@@ -60,7 +61,7 @@ struct junk {
 	const char *mode;
 	FILE *filp;
 } stuff[] = {
-	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { NULL, NULL, NULL }
+	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { "boost", "rb+", NULL }, { NULL, NULL, NULL }
 };
 
 static int readval(FILE *filp)
@@ -560,29 +561,46 @@ static void reset_gpu(void)
 	close(fd);
 }
 
+static bool boost_finished(void)
+{
+	char buf[1024];
+
+	igt_debugfs_read(drm_fd, "i915_rps_boost_info", buf);
+	return strstr(buf, "Boosts outstanding? 0");
+}
+
 static void boost_freq(int fd, int *boost_freqs)
 {
 	int64_t timeout = 1;
-	int ring = -1;
 	igt_spin_t *load;
+	unsigned int engine;
 
-	load = igt_spin_batch_new(fd, ring, 0);
-
+	/* put boost on the same engine as low load */
+	engine = I915_EXEC_RENDER;
+	if (intel_gen(lh.devid) >= 6)
+		engine = I915_EXEC_BLT;
+	load = igt_spin_batch_new(fd, engine, 0);
 	/* Waiting will grant us a boost to maximum */
 	gem_wait(fd, load->handle, &timeout);
 
 	read_freqs(boost_freqs);
 	dump(boost_freqs);
+	igt_assert(!boost_finished());
 
+	/* Avoid downlocking till boost request is pending */
+	igt_spin_batch_end(load);
+	gem_sync(fd, load->handle);
 	igt_spin_batch_free(fd, load);
+
 }
 
+#define BOOST_WAIT_TIMESTEP_MSEC 250
+#define BOOST_WAIT_TIMEOUT_MSEC 15000
 static void waitboost(bool reset)
 {
 	int pre_freqs[NUMFREQ];
 	int boost_freqs[NUMFREQ];
 	int post_freqs[NUMFREQ];
-
 	int fd = drm_open_driver(DRIVER_INTEL);
 
 	load_helper_run(LOW);
@@ -602,6 +620,9 @@ static void waitboost(bool reset)
 	 */
 	boost_freq(fd, boost_freqs);
 
+	/* Wait till boost ends */
+	igt_assert(igt_wait(boost_finished(), BOOST_WAIT_TIMEOUT_MSEC, BOOST_WAIT_TIMESTEP_MSEC));
+
 	igt_debug("Apply low load again...\n");
 	sleep(1);
 	stabilize_check(post_freqs);
@@ -611,7 +632,7 @@ static void waitboost(bool reset)
 	idle_check();
 
 	igt_assert_lt(pre_freqs[CUR], pre_freqs[MAX]);
-	igt_assert_eq(boost_freqs[CUR], boost_freqs[MAX]);
+	igt_assert_eq(boost_freqs[CUR], boost_freqs[BOOST]);
 	igt_assert_lt(post_freqs[CUR], post_freqs[MAX]);
 
 	close(fd);
@@ -640,8 +661,8 @@ igt_main
 		struct junk *junk = stuff;
 		int ret;
 
-		/* Use drm_open_driver to verify device existence */
-		drm_fd = drm_open_driver(DRIVER_INTEL);
+		/* Use drm_open_driver to to force running tests as drm master */
+		drm_fd = drm_open_driver_master(DRIVER_INTEL);
 		igt_require_gem(drm_fd);
 		igt_require(gem_can_store_dword(drm_fd, 0));
 
@@ -657,7 +678,7 @@ igt_main
 			val = readval(junk->filp);
 			igt_assert(val >= 0);
 			junk++;
-		} while(junk->name != NULL);
+		} while (junk->name != NULL);
 
 		read_freqs(origfreqs);
 
-- 
2.13.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev2)
  2017-08-18  7:33 [PATCH i-g-t] pm_rps: Changes in waitboost scenario Katarzyna Dec
  2017-08-18  7:57 ` ✓ Fi.CI.BAT: success for " Patchwork
  2017-08-18 11:08 ` [PATCH i-g-t v2] " Katarzyna Dec
@ 2017-08-18 13:22 ` Patchwork
  2017-08-18 13:38 ` [PATCH i-g-t] pm_rps: Changes in waitboost scenario Chris Wilson
                   ` (10 subsequent siblings)
  13 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2017-08-18 13:22 UTC (permalink / raw)
  To: Katarzyna Dec; +Cc: intel-gfx

== Series Details ==

Series: pm_rps: Changes in waitboost scenario (rev2)
URL   : https://patchwork.freedesktop.org/series/28966/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
5a17ee2c8f9013f5db852d27564b837f9f2c5a9f tools/intel_vbt_decode: Fix decoding of child device structure

with latest DRM-Tip kernel build CI_DRM_2976
e09055c8a5dc drm-tip: 2017y-08m-18d-11h-42m-42s UTC integration manifest

Test kms_flip:
        Subgroup basic-flip-vs-modeset:
                skip       -> PASS       (fi-skl-x1585l) fdo#101781
Test drv_module_reload:
        Subgroup basic-reload-inject:
                dmesg-warn -> PASS       (fi-kbl-7260u)

fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781

fi-bdw-5557u     total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:453s
fi-bdw-gvtdvm    total:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  time:444s
fi-blb-e6850     total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  time:362s
fi-bsw-n3050     total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  time:562s
fi-bxt-j4205     total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:526s
fi-byt-j1900     total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  time:526s
fi-byt-n2820     total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  time:523s
fi-glk-2a        total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:611s
fi-hsw-4770      total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:451s
fi-hsw-4770r     total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:426s
fi-ilk-650       total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  time:425s
fi-ivb-3520m     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:510s
fi-ivb-3770      total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:479s
fi-kbl-7260u     total:279  pass:268  dwarn:1   dfail:0   fail:0   skip:10  time:496s
fi-kbl-7500u     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:481s
fi-kbl-7560u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:602s
fi-kbl-r         total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:603s
fi-pnv-d510      total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  time:534s
fi-skl-6260u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:467s
fi-skl-6700k     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:479s
fi-skl-6770hq    total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:486s
fi-skl-gvtdvm    total:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  time:449s
fi-skl-x1585l    total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:505s
fi-snb-2520m     total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  time:550s
fi-snb-2600      total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  time:409s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_76/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH i-g-t] pm_rps: Changes in waitboost scenario
  2017-08-18  7:33 [PATCH i-g-t] pm_rps: Changes in waitboost scenario Katarzyna Dec
                   ` (2 preceding siblings ...)
  2017-08-18 13:22 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev2) Patchwork
@ 2017-08-18 13:38 ` Chris Wilson
  2017-08-21 14:22 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev3) Patchwork
                   ` (9 subsequent siblings)
  13 siblings, 0 replies; 34+ messages in thread
From: Chris Wilson @ 2017-08-18 13:38 UTC (permalink / raw)
  To: Katarzyna Dec, intel-gfx

Quoting Katarzyna Dec (2017-08-18 08:33:11)
> Waitboost and reset test cases were failing because maximum
> frequency is not always boost frequency (sometimes overcloking
> occurs).
> Moreover more time is needed for boost to be finished.
> Changed boost_freq function so boost occurred on the same engine
> as low load.
> Added function waiting for boost to be finished.
> Made test DRM master to make sure that the test isn't ran along Xorg
> 
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Jeff Mcgee <jeff.mcgee@intel.com>
> Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
> 
> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
> ---
>  tests/pm_rps.c | 58 ++++++++++++++++++++++++++++++++++++++++++++++++++--------
>  1 file changed, 50 insertions(+), 8 deletions(-)
> 
> diff --git a/tests/pm_rps.c b/tests/pm_rps.c
> index f0455e78..08a73f5d 100644
> --- a/tests/pm_rps.c
> +++ b/tests/pm_rps.c
> @@ -50,6 +50,7 @@ enum {
>         RP0,
>         RP1,
>         RPn,
> +       BOOST,
>         NUMFREQ
>  };
>  
> @@ -60,7 +61,7 @@ struct junk {
>         const char *mode;
>         FILE *filp;
>  } stuff[] = {
> -       { "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { NULL, NULL, NULL }
> +       { "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { "boost", "rb+", NULL }, { NULL, NULL, NULL }
>  };
>  
>  static int readval(FILE *filp)
> @@ -556,25 +557,61 @@ static void stabilize_check(int *out)
>  static void reset_gpu(void)
>  {
>         int fd = drm_open_driver(DRIVER_INTEL);
> +
>         igt_post_hang_ring(fd, igt_hang_ring(fd, I915_EXEC_DEFAULT));
>         close(fd);
>  }
>  
> +static bool is_in_boost(void)
> +{
> +       char buf[1024];
> +
> +       igt_debugfs_read(drm_fd, "i915_rps_boost_info", buf);
> +       return strstr(buf, "Boosts outstanding? 1");

Might as well make this generic and return the count. Then you can use
it to return -1 if either i915_rps_boost_info doesn't exist (oops, buf
used unterminated!) or doesn't contain the count.

> +}
> +
>  static void boost_freq(int fd, int *boost_freqs)
>  {
>         int64_t timeout = 1;
> -       int ring = -1;
>         igt_spin_t *load;
> +       unsigned int engine;
>  
> -       load = igt_spin_batch_new(fd, ring, 0);
> -
> +       /* put boost on the same engine as low load */
> +       engine = I915_EXEC_RENDER;
> +       if (intel_gen(lh.devid) >= 6)
> +               engine = I915_EXEC_BLT;
> +       load = igt_spin_batch_new(fd, engine, 0);

Something to note is that spin-batch will also force the GPU to maximum.

You could set the boost freq > max freq to differentiate

>         /* Waiting will grant us a boost to maximum */
>         gem_wait(fd, load->handle, &timeout);
>  
>         read_freqs(boost_freqs);
>         dump(boost_freqs);
> +       igt_assert_eq(is_in_boost(), 1);

Will fail on older kernels.

> +       /* Avoid downlocking till boost request is pending */
> +       igt_spin_batch_end(load);
> +       gem_sync(fd, load->handle);
>         igt_spin_batch_free(fd, load);
> +

Misplaced whitespace.

> +}
> +
> +#define BOOST_WAIT_TIMESTEP_MSEC 250
> +#define BOOST_WAIT_TIMEOUT_MSEC 15000
> +static void fall_from_boost_wait(int *freqs)
> +{
> +       int wait = 0;
> +
> +       do {
> +               read_freqs(freqs);
> +               dump(freqs);

Why pass in freqs? After this function you overwrite them, and by its
nature the value of those freqs whilst in this function is either
boosted or some other value.

> +               if (!is_in_boost())
> +                       break;
> +               usleep(1000 * BOOST_WAIT_TIMESTEP_MSEC);
> +               wait += BOOST_WAIT_TIMESTEP_MSEC;
> +
> +       } while (wait < BOOST_WAIT_TIMEOUT_MSEC);
> +
> +       igt_debug("Waited %d till falling from boost\n", wait);

Units! "Waited %dms"

>  }
>  
>  static void waitboost(bool reset)
> @@ -601,6 +638,7 @@ static void waitboost(bool reset)
>          * to maximum.
>          */
>         boost_freq(fd, boost_freqs);
> +       fall_from_boost_wait(post_freqs);

wait_for_fall_from_grace() ?

>  
>         igt_debug("Apply low load again...\n");
>         sleep(1);
> @@ -611,7 +649,7 @@ static void waitboost(bool reset)
>         idle_check();
>  
>         igt_assert_lt(pre_freqs[CUR], pre_freqs[MAX]);
> -       igt_assert_eq(boost_freqs[CUR], boost_freqs[MAX]);
> +       igt_assert_eq(boost_freqs[CUR], boost_freqs[BOOST]);
>         igt_assert_lt(post_freqs[CUR], post_freqs[MAX]);
>  
>         close(fd);
> @@ -640,14 +678,15 @@ igt_main
>                 struct junk *junk = stuff;
>                 int ret;
>  
> -               /* Use drm_open_driver to verify device existence */
> -               drm_fd = drm_open_driver(DRIVER_INTEL);
> +               /* Use drm_open_driver to to force running tests as drm master */
> +               drm_fd = drm_open_driver_master(DRIVER_INTEL);

?? This interface / policy does not require the display.

>                 igt_require_gem(drm_fd);
>                 igt_require(gem_can_store_dword(drm_fd, 0));
>  
>                 do {
>                         int val = -1;
>                         char *path;
> +
>                         ret = asprintf(&path, sysfs_base_path, device, junk->name);
>                         igt_assert(ret != -1);
>                         junk->filp = fopen(path, junk->mode);
> @@ -657,7 +696,7 @@ igt_main
>                         val = readval(junk->filp);
>                         igt_assert(val >= 0);
>                         junk++;
> -               } while(junk->name != NULL);
> +               } while (junk->name != NULL);
>  
>                 read_freqs(origfreqs);
>  
> @@ -684,4 +723,7 @@ igt_main
>         igt_subtest("reset")
>                 waitboost(true);
>  
> +       igt_fixture {
> +               intel_register_access_fini();

??
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^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH i-g-t v2] pm_rps: Changes in waitboost scenario
  2017-08-18 11:08 ` [PATCH i-g-t v2] " Katarzyna Dec
@ 2017-08-18 13:45   ` Chris Wilson
  2017-08-18 20:28     ` Daniel Vetter
  2017-08-18 13:47   ` Chris Wilson
  2017-08-21 13:50   ` [PATCH i-g-t v3] " Katarzyna Dec
  2 siblings, 1 reply; 34+ messages in thread
From: Chris Wilson @ 2017-08-18 13:45 UTC (permalink / raw)
  To: Katarzyna Dec, intel-gfx

Quoting Katarzyna Dec (2017-08-18 12:08:44)
> While I'm here let's also make sure that we're running as DRM
> master to catch the common case, where the test is being ran
> along with Xorg.

Semantic changes to the test though, that implies its needs to be master
to run.

If you want to impose the constraint that you are the only client
active, then add a lib function to check
/sys/kernel/debug/dri/$card/client that it only contains one client and
that client is you.
-Chris
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^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH i-g-t v2] pm_rps: Changes in waitboost scenario
  2017-08-18 11:08 ` [PATCH i-g-t v2] " Katarzyna Dec
  2017-08-18 13:45   ` Chris Wilson
@ 2017-08-18 13:47   ` Chris Wilson
  2017-08-21 13:50   ` [PATCH i-g-t v3] " Katarzyna Dec
  2 siblings, 0 replies; 34+ messages in thread
From: Chris Wilson @ 2017-08-18 13:47 UTC (permalink / raw)
  To: Katarzyna Dec, intel-gfx

Quoting Katarzyna Dec (2017-08-18 12:08:44)
> CI is observing sporadical failures in pm_rps subtests.

For reference a real bug report looks like:
https://bugs.freedesktop.org/show_bug.cgi?id=102199
which is very much a functional regression that we don't cover.
-Chris
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^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH i-g-t v2] pm_rps: Changes in waitboost scenario
  2017-08-18 13:45   ` Chris Wilson
@ 2017-08-18 20:28     ` Daniel Vetter
  2017-08-18 20:42       ` Chris Wilson
  0 siblings, 1 reply; 34+ messages in thread
From: Daniel Vetter @ 2017-08-18 20:28 UTC (permalink / raw)
  To: Chris Wilson; +Cc: Katarzyna Dec, intel-gfx

On Fri, Aug 18, 2017 at 02:45:32PM +0100, Chris Wilson wrote:
> Quoting Katarzyna Dec (2017-08-18 12:08:44)
> > While I'm here let's also make sure that we're running as DRM
> > master to catch the common case, where the test is being ran
> > along with Xorg.
> 
> Semantic changes to the test though, that implies its needs to be master
> to run.
> 
> If you want to impose the constraint that you are the only client
> active, then add a lib function to check
> /sys/kernel/debug/dri/$card/client that it only contains one client and
> that client is you.

We should be doing that already, at least if you try to open the drm fd. I
guess we could split that out, or maybe wrap it into a helper.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH i-g-t v2] pm_rps: Changes in waitboost scenario
  2017-08-18 20:28     ` Daniel Vetter
@ 2017-08-18 20:42       ` Chris Wilson
  2017-08-21  8:29         ` Dec, Katarzyna
  0 siblings, 1 reply; 34+ messages in thread
From: Chris Wilson @ 2017-08-18 20:42 UTC (permalink / raw)
  To: Daniel Vetter; +Cc: Katarzyna Dec, intel-gfx

Quoting Daniel Vetter (2017-08-18 21:28:08)
> On Fri, Aug 18, 2017 at 02:45:32PM +0100, Chris Wilson wrote:
> > Quoting Katarzyna Dec (2017-08-18 12:08:44)
> > > While I'm here let's also make sure that we're running as DRM
> > > master to catch the common case, where the test is being ran
> > > along with Xorg.
> > 
> > Semantic changes to the test though, that implies its needs to be master
> > to run.
> > 
> > If you want to impose the constraint that you are the only client
> > active, then add a lib function to check
> > /sys/kernel/debug/dri/$card/client that it only contains one client and
> > that client is you.
> 
> We should be doing that already, at least if you try to open the drm fd. I
> guess we could split that out, or maybe wrap it into a helper.

Only the first opening of the device is expected to be the singular
client. We don't do that as part of drm_open_diver(), but it did used to
be done for the shellscripts.
-Chris
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^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH i-g-t v2] pm_rps: Changes in waitboost scenario
  2017-08-18 20:42       ` Chris Wilson
@ 2017-08-21  8:29         ` Dec, Katarzyna
  2017-08-21  8:53           ` Chris Wilson
  0 siblings, 1 reply; 34+ messages in thread
From: Dec, Katarzyna @ 2017-08-21  8:29 UTC (permalink / raw)
  To: Chris Wilson, Daniel Vetter; +Cc: intel-gfx

Thanks for comments.
Do we need more changes then being drm-master? You wrote something about not being the one client.

Is proposed approach for checking boost not good enough? Do you have any suggestions?

Kasia
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^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH i-g-t v2] pm_rps: Changes in waitboost scenario
  2017-08-21  8:29         ` Dec, Katarzyna
@ 2017-08-21  8:53           ` Chris Wilson
  2017-08-21 10:43             ` Dec, Katarzyna
  0 siblings, 1 reply; 34+ messages in thread
From: Chris Wilson @ 2017-08-21  8:53 UTC (permalink / raw)
  To: Dec, Katarzyna, Daniel Vetter; +Cc: intel-gfx

Quoting Dec, Katarzyna (2017-08-21 09:29:47)
> Thanks for comments.
> Do we need more changes then being drm-master? You wrote something about not being the one client.

If you wanted to be complete you would check master, auth and render.
They are different classes of fd the driver handles, and rps should work
with any. You could say that render is the lowest common denominator and
only test with that -- that's a much better argument that testing with
master alone.

> Is proposed approach for checking boost not good enough? Do you have any suggestions?

Why are we checking for boost? We certainly don't wish to imply that if
you follow this sequence you will be granted max gpu clocks; that's a
policy decision we should not be so eager to be involved in. waitboosting
is to solve a particular issue with slow clock ramp up for benchmarks and
interactivity, of which interactivity is the much more noticeable. We
don't test that, nor do we track the impact it has upon power
consumption.

Basically the test is following the implementation, and not measuring
the behaviour of the system, because that is much harder to get right,
and would almost certainly lead to better integration with interactive
systems (i.e. so that we could apply gpu boosts ad prioritisation more
intelligently than reacting to a stall which is easy to abuse).
Reacting well to benchmarks should be handled by rps itself and not need
a waitboost on throttling. In fact, I am very tempted to remove
waitboosting for the user and only use it for catching up to missed
vblanks. Along with the suggestions on how to improve reclocking for
particular clients/workloads. (Such changes will break the test, because
it is testing what the kernel is doing now, not how we expect the system
to perform.)
-Chris
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^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH i-g-t v2] pm_rps: Changes in waitboost scenario
  2017-08-21  8:53           ` Chris Wilson
@ 2017-08-21 10:43             ` Dec, Katarzyna
  2017-08-21 11:29               ` Chris Wilson
  0 siblings, 1 reply; 34+ messages in thread
From: Dec, Katarzyna @ 2017-08-21 10:43 UTC (permalink / raw)
  To: Chris Wilson, Daniel Vetter; +Cc: intel-gfx

I just saw comments for the code (in first patch version)

>  static void boost_freq(int fd, int *boost_freqs)  {
>         int64_t timeout = 1;
> -       int ring = -1;
>         igt_spin_t *load;
> +       unsigned int engine;
>  
> -       load = igt_spin_batch_new(fd, ring, 0);
> -
> +       /* put boost on the same engine as low load */
> +       engine = I915_EXEC_RENDER;
> +       if (intel_gen(lh.devid) >= 6)
> +               engine = I915_EXEC_BLT;
> +       load = igt_spin_batch_new(fd, engine, 0);

>Something to note is that spin-batch will also force the GPU to maximum.
So we can get rid of gem_wait in this case?

>You could set the boost freq > max freq to differentiate
What do you mean by that?

>         /* Waiting will grant us a boost to maximum */
>         gem_wait(fd, load->handle, &timeout);
>  
>         read_freqs(boost_freqs);
>         dump(boost_freqs);
> +       igt_assert_eq(is_in_boost(), 1);

>Will fail on older kernels.
This assert was changed in v2 to igt_assert(). Will this also fail on older kernels? If yes, why?


Thanks,
Kasia


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^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH i-g-t v2] pm_rps: Changes in waitboost scenario
  2017-08-21 10:43             ` Dec, Katarzyna
@ 2017-08-21 11:29               ` Chris Wilson
  0 siblings, 0 replies; 34+ messages in thread
From: Chris Wilson @ 2017-08-21 11:29 UTC (permalink / raw)
  To: Dec, Katarzyna, Daniel Vetter; +Cc: intel-gfx

Quoting Dec, Katarzyna (2017-08-21 11:43:35)
> I just saw comments for the code (in first patch version)
> 
> >  static void boost_freq(int fd, int *boost_freqs)  {
> >         int64_t timeout = 1;
> > -       int ring = -1;
> >         igt_spin_t *load;
> > +       unsigned int engine;
> >  
> > -       load = igt_spin_batch_new(fd, ring, 0);
> > -
> > +       /* put boost on the same engine as low load */
> > +       engine = I915_EXEC_RENDER;
> > +       if (intel_gen(lh.devid) >= 6)
> > +               engine = I915_EXEC_BLT;
> > +       load = igt_spin_batch_new(fd, engine, 0);
> 
> >Something to note is that spin-batch will also force the GPU to maximum.
> So we can get rid of gem_wait in this case?

No. Since the test is all about the wait -> boost scenario, not that
high load generates high cocks.
 
> >You could set the boost freq > max freq to differentiate
> What do you mean by that?

If you set the max freq to less than the boost freq, the only way to get
to the boost freq is via the wait, and through the ordinary system load.
It is another way to prove that boosting is in effect, and also the
independence of the control knobs.

> >         /* Waiting will grant us a boost to maximum */
> >         gem_wait(fd, load->handle, &timeout);
> >  
> >         read_freqs(boost_freqs);
> >         dump(boost_freqs);
> > +       igt_assert_eq(is_in_boost(), 1);
> 
> >Will fail on older kernels.
> This assert was changed in v2 to igt_assert(). Will this also fail on older kernels? If yes, why?

The field you are looking for is a recent addition to the file. Within
reason, we expect igt to be agnostic of kernel version (aiming for
forwards compatibility with future kernels for minimum effort, and
backwards for maximum coverage). Sometimes we can't write the test we
want without relying on a new kernel.
-Chris
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^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH i-g-t v3] pm_rps: Changes in waitboost scenario
  2017-08-18 11:08 ` [PATCH i-g-t v2] " Katarzyna Dec
  2017-08-18 13:45   ` Chris Wilson
  2017-08-18 13:47   ` Chris Wilson
@ 2017-08-21 13:50   ` Katarzyna Dec
  2017-08-22 12:40     ` Katarzyna Dec
  2 siblings, 1 reply; 34+ messages in thread
From: Katarzyna Dec @ 2017-08-21 13:50 UTC (permalink / raw)
  To: intel-gfx

CI is observing sporadical failures in pm_rps subtests.
There are a couple of reasons. One of them is the fact that
on gen6, gen7 and gen7.5, max frequency (as in the HW limit)
is not set to RP0, but the value obtaind from PCODE (which
may be different from RP0). Thus the test is operating under
wrong assumptions (SOFTMAX == RP0 == BOOST which is simply
not the case). Let's compare current frequency with BOOST
frequency rather than SOFTMAX to get the test behaviour under control.
In boost_freq function I set MAX freq to midium freqency, which ensures
that we for sure reach BOOST frequency. This could help with failures
with boost frequency failing to drop down.
While I'm here let's also make sure that we're running as DRM
master to catch the common case, where the test is being ran
along with Xorg.

v2: Commit message, simplified waiting for boost to finish, drop
noisy whitespace cleanup.

v3: Removed reading from i915_rps_boost_info debugfs because it not
the same on every kernel. Removed function waiting for boost.
Instead of that I made sure we will reach in boost by setting MAX freq to fmid.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jeff Mcgee <jeff.mcgee@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
---
 tests/pm_rps.c | 30 ++++++++++++++++++++++--------
 1 file changed, 22 insertions(+), 8 deletions(-)

diff --git a/tests/pm_rps.c b/tests/pm_rps.c
index f0455e78..b871c897 100644
--- a/tests/pm_rps.c
+++ b/tests/pm_rps.c
@@ -50,6 +50,7 @@ enum {
 	RP0,
 	RP1,
 	RPn,
+	BOOST,
 	NUMFREQ
 };
 
@@ -60,7 +61,7 @@ struct junk {
 	const char *mode;
 	FILE *filp;
 } stuff[] = {
-	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { NULL, NULL, NULL }
+	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { "boost", "rb+", NULL }, { NULL, NULL, NULL }
 };
 
 static int readval(FILE *filp)
@@ -563,18 +564,32 @@ static void reset_gpu(void)
 static void boost_freq(int fd, int *boost_freqs)
 {
 	int64_t timeout = 1;
-	int ring = -1;
 	igt_spin_t *load;
+	unsigned int engine;
+	int fmid = (origfreqs[RPn] + origfreqs[RP0]) / 2;
 
-	load = igt_spin_batch_new(fd, ring, 0);
+	fmid = get_hw_rounded_freq(fmid);
+	//set max freq to less then boost freq
+	writeval(stuff[MAX].filp, fmid);
 
+	/* put boost on the same engine as low load */
+	engine = I915_EXEC_RENDER;
+	if (intel_gen(lh.devid) >= 6)
+		engine = I915_EXEC_BLT;
+	load = igt_spin_batch_new(fd, engine, 0);
 	/* Waiting will grant us a boost to maximum */
 	gem_wait(fd, load->handle, &timeout);
 
 	read_freqs(boost_freqs);
 	dump(boost_freqs);
 
+	/* Avoid downlocking till boost request is pending */
+	igt_spin_batch_end(load);
+	gem_sync(fd, load->handle);
 	igt_spin_batch_free(fd, load);
+
+	//set max freq to original softmax
+	writeval(stuff[MAX].filp, origfreqs[MAX]);
 }
 
 static void waitboost(bool reset)
@@ -582,7 +597,6 @@ static void waitboost(bool reset)
 	int pre_freqs[NUMFREQ];
 	int boost_freqs[NUMFREQ];
 	int post_freqs[NUMFREQ];
-
 	int fd = drm_open_driver(DRIVER_INTEL);
 
 	load_helper_run(LOW);
@@ -611,7 +625,7 @@ static void waitboost(bool reset)
 	idle_check();
 
 	igt_assert_lt(pre_freqs[CUR], pre_freqs[MAX]);
-	igt_assert_eq(boost_freqs[CUR], boost_freqs[MAX]);
+	igt_assert_eq(boost_freqs[CUR], boost_freqs[BOOST]);
 	igt_assert_lt(post_freqs[CUR], post_freqs[MAX]);
 
 	close(fd);
@@ -640,8 +654,8 @@ igt_main
 		struct junk *junk = stuff;
 		int ret;
 
-		/* Use drm_open_driver to verify device existence */
-		drm_fd = drm_open_driver(DRIVER_INTEL);
+		/* Use drm_open_driver to to force running tests as drm master */
+		drm_fd = drm_open_driver_master(DRIVER_INTEL);
 		igt_require_gem(drm_fd);
 		igt_require(gem_can_store_dword(drm_fd, 0));
 
@@ -657,7 +671,7 @@ igt_main
 			val = readval(junk->filp);
 			igt_assert(val >= 0);
 			junk++;
-		} while(junk->name != NULL);
+		} while (junk->name != NULL);
 
 		read_freqs(origfreqs);
 
-- 
2.13.4

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^ permalink raw reply	[flat|nested] 34+ messages in thread

* ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev3)
  2017-08-18  7:33 [PATCH i-g-t] pm_rps: Changes in waitboost scenario Katarzyna Dec
                   ` (3 preceding siblings ...)
  2017-08-18 13:38 ` [PATCH i-g-t] pm_rps: Changes in waitboost scenario Chris Wilson
@ 2017-08-21 14:22 ` Patchwork
  2017-08-22 13:00 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev4) Patchwork
                   ` (8 subsequent siblings)
  13 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2017-08-21 14:22 UTC (permalink / raw)
  To: Katarzyna Dec; +Cc: intel-gfx

== Series Details ==

Series: pm_rps: Changes in waitboost scenario (rev3)
URL   : https://patchwork.freedesktop.org/series/28966/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
5a17ee2c8f9013f5db852d27564b837f9f2c5a9f tools/intel_vbt_decode: Fix decoding of child device structure

with latest DRM-Tip kernel build CI_DRM_2985
dbfb2f62576e drm-tip: 2017y-08m-21d-08h-13m-34s UTC integration manifest

Test gem_exec_flush:
        Subgroup basic-batch-kernel-default-uc:
                pass       -> FAIL       (fi-snb-2600) fdo#100007
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                pass       -> DMESG-WARN (fi-byt-n2820) fdo#101705
Test drv_module_reload:
        Subgroup basic-reload-inject:
                pass       -> DMESG-WARN (fi-kbl-7260u) fdo#102295

fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705
fdo#102295 https://bugs.freedesktop.org/show_bug.cgi?id=102295

fi-bdw-5557u     total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:460s
fi-bdw-gvtdvm    total:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  time:447s
fi-blb-e6850     total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  time:368s
fi-bsw-n3050     total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  time:563s
fi-bwr-2160      total:279  pass:184  dwarn:0   dfail:0   fail:0   skip:95  time:251s
fi-bxt-j4205     total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:529s
fi-byt-j1900     total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  time:529s
fi-byt-n2820     total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  time:523s
fi-elk-e7500     total:279  pass:230  dwarn:0   dfail:0   fail:0   skip:49  time:438s
fi-glk-2a        total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:611s
fi-hsw-4770      total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:445s
fi-hsw-4770r     total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:426s
fi-ilk-650       total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  time:430s
fi-ivb-3520m     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:501s
fi-ivb-3770      total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:474s
fi-kbl-7260u     total:279  pass:267  dwarn:2   dfail:0   fail:0   skip:10  time:491s
fi-kbl-7500u     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:478s
fi-kbl-7560u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:595s
fi-kbl-r         total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:600s
fi-pnv-d510      total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  time:533s
fi-skl-6260u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:466s
fi-skl-6700k     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:481s
fi-skl-6770hq    total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:490s
fi-skl-gvtdvm    total:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  time:447s
fi-skl-x1585l    total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:480s
fi-snb-2520m     total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  time:550s
fi-snb-2600      total:279  pass:249  dwarn:0   dfail:0   fail:1   skip:29  time:410s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_77/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH i-g-t v3] pm_rps: Changes in waitboost scenario
  2017-08-21 13:50   ` [PATCH i-g-t v3] " Katarzyna Dec
@ 2017-08-22 12:40     ` Katarzyna Dec
  2017-08-24  9:44       ` Chris Wilson
  2017-08-28  8:50       ` [PATCH i-g-t v4] " Katarzyna Dec
  0 siblings, 2 replies; 34+ messages in thread
From: Katarzyna Dec @ 2017-08-22 12:40 UTC (permalink / raw)
  To: intel-gfx

CI is observing sporadical failures in pm_rps subtests.
There are a couple of reasons. One of them is the fact that
on gen6, gen7 and gen7.5, max frequency (as in the HW limit)
is not set to RP0, but the value obtaind from PCODE (which
may be different from RP0). Thus the test is operating under
wrong assumptions (SOFTMAX == RP0 == BOOST which is simply
not the case). Let's compare current frequency with BOOST
frequency rather than SOFTMAX to get the test behaviour under control.
In boost_freq function I set MAX freq to midium freqency, which ensures
that we for sure reach BOOST frequency. This could help with failures
with boost frequency failing to drop down.

v2: Commit message, simplified waiting for boost to finish, drop
noisy whitespace cleanup.

v3: Removed reading from i915_rps_boost_info debugfs because it not
the same on every kernel. Removed function waiting for boost.
Instead of that I made sure we will reach in boost by setting MAX freq to fmid.

v4: Moved proposal with making test drm master to other patch

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jeff Mcgee <jeff.mcgee@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
---
 tests/pm_rps.c | 26 ++++++++++++++++++++------
 1 file changed, 20 insertions(+), 6 deletions(-)

diff --git a/tests/pm_rps.c b/tests/pm_rps.c
index f0455e78..e8a051cf 100644
--- a/tests/pm_rps.c
+++ b/tests/pm_rps.c
@@ -50,6 +50,7 @@ enum {
 	RP0,
 	RP1,
 	RPn,
+	BOOST,
 	NUMFREQ
 };
 
@@ -60,7 +61,7 @@ struct junk {
 	const char *mode;
 	FILE *filp;
 } stuff[] = {
-	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { NULL, NULL, NULL }
+	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { "boost", "rb+", NULL }, { NULL, NULL, NULL }
 };
 
 static int readval(FILE *filp)
@@ -563,18 +564,32 @@ static void reset_gpu(void)
 static void boost_freq(int fd, int *boost_freqs)
 {
 	int64_t timeout = 1;
-	int ring = -1;
 	igt_spin_t *load;
+	unsigned int engine;
+	int fmid = (origfreqs[RPn] + origfreqs[RP0]) / 2;
 
-	load = igt_spin_batch_new(fd, ring, 0);
+	fmid = get_hw_rounded_freq(fmid);
+	//set max freq to less then boost freq
+	writeval(stuff[MAX].filp, fmid);
 
+	/* put boost on the same engine as low load */
+	engine = I915_EXEC_RENDER;
+	if (intel_gen(lh.devid) >= 6)
+		engine = I915_EXEC_BLT;
+	load = igt_spin_batch_new(fd, engine, 0);
 	/* Waiting will grant us a boost to maximum */
 	gem_wait(fd, load->handle, &timeout);
 
 	read_freqs(boost_freqs);
 	dump(boost_freqs);
 
+	/* Avoid downlocking till boost request is pending */
+	igt_spin_batch_end(load);
+	gem_sync(fd, load->handle);
 	igt_spin_batch_free(fd, load);
+
+	//set max freq to original softmax
+	writeval(stuff[MAX].filp, origfreqs[MAX]);
 }
 
 static void waitboost(bool reset)
@@ -582,7 +597,6 @@ static void waitboost(bool reset)
 	int pre_freqs[NUMFREQ];
 	int boost_freqs[NUMFREQ];
 	int post_freqs[NUMFREQ];
-
 	int fd = drm_open_driver(DRIVER_INTEL);
 
 	load_helper_run(LOW);
@@ -611,7 +625,7 @@ static void waitboost(bool reset)
 	idle_check();
 
 	igt_assert_lt(pre_freqs[CUR], pre_freqs[MAX]);
-	igt_assert_eq(boost_freqs[CUR], boost_freqs[MAX]);
+	igt_assert_eq(boost_freqs[CUR], boost_freqs[BOOST]);
 	igt_assert_lt(post_freqs[CUR], post_freqs[MAX]);
 
 	close(fd);
@@ -657,7 +671,7 @@ igt_main
 			val = readval(junk->filp);
 			igt_assert(val >= 0);
 			junk++;
-		} while(junk->name != NULL);
+		} while (junk->name != NULL);
 
 		read_freqs(origfreqs);
 
-- 
2.13.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev4)
  2017-08-18  7:33 [PATCH i-g-t] pm_rps: Changes in waitboost scenario Katarzyna Dec
                   ` (4 preceding siblings ...)
  2017-08-21 14:22 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev3) Patchwork
@ 2017-08-22 13:00 ` Patchwork
  2017-08-28  9:09 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev6) Patchwork
                   ` (7 subsequent siblings)
  13 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2017-08-22 13:00 UTC (permalink / raw)
  To: Katarzyna Dec; +Cc: intel-gfx

== Series Details ==

Series: pm_rps: Changes in waitboost scenario (rev4)
URL   : https://patchwork.freedesktop.org/series/28966/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
4524a8951348a31ae5dabfc4c69f2a835034ec3e tests: Introduce audio tests, starting with HDMI signal integrity

with latest DRM-Tip kernel build CI_DRM_2986
93365f59a990 drm-tip: 2017y-08m-22d-11h-29m-39s UTC integration manifest

fi-bdw-5557u     total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:451s
fi-bdw-gvtdvm    total:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  time:445s
fi-blb-e6850     total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  time:365s
fi-bsw-n3050     total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  time:560s
fi-bwr-2160      total:279  pass:184  dwarn:0   dfail:0   fail:0   skip:95  time:254s
fi-bxt-j4205     total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:524s
fi-byt-j1900     total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  time:527s
fi-byt-n2820     total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  time:518s
fi-elk-e7500     total:279  pass:230  dwarn:0   dfail:0   fail:0   skip:49  time:438s
fi-glk-2a        total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:621s
fi-hsw-4770      total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:447s
fi-hsw-4770r     total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:423s
fi-ilk-650       total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  time:422s
fi-ivb-3520m     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:515s
fi-ivb-3770      total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:475s
fi-kbl-7260u     total:279  pass:268  dwarn:1   dfail:0   fail:0   skip:10  time:498s
fi-kbl-7500u     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:485s
fi-kbl-7560u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:600s
fi-kbl-r         total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:598s
fi-skl-6260u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:477s
fi-skl-6700k     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:482s
fi-skl-6770hq    total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:487s
fi-skl-gvtdvm    total:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  time:442s
fi-skl-x1585l    total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:481s
fi-snb-2520m     total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  time:547s
fi-snb-2600      total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  time:409s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_83/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH i-g-t v3] pm_rps: Changes in waitboost scenario
  2017-08-22 12:40     ` Katarzyna Dec
@ 2017-08-24  9:44       ` Chris Wilson
  2017-08-28  8:50       ` [PATCH i-g-t v4] " Katarzyna Dec
  1 sibling, 0 replies; 34+ messages in thread
From: Chris Wilson @ 2017-08-24  9:44 UTC (permalink / raw)
  To: Katarzyna Dec, intel-gfx

Quoting Katarzyna Dec (2017-08-22 13:40:53)
> CI is observing sporadical failures in pm_rps subtests.
> There are a couple of reasons. One of them is the fact that
> on gen6, gen7 and gen7.5, max frequency (as in the HW limit)
> is not set to RP0, but the value obtaind from PCODE (which
> may be different from RP0). Thus the test is operating under
> wrong assumptions (SOFTMAX == RP0 == BOOST which is simply
> not the case). Let's compare current frequency with BOOST
> frequency rather than SOFTMAX to get the test behaviour under control.
> In boost_freq function I set MAX freq to midium freqency, which ensures
> that we for sure reach BOOST frequency. This could help with failures
> with boost frequency failing to drop down.
> 
> v2: Commit message, simplified waiting for boost to finish, drop
> noisy whitespace cleanup.
> 
> v3: Removed reading from i915_rps_boost_info debugfs because it not
> the same on every kernel. Removed function waiting for boost.
> Instead of that I made sure we will reach in boost by setting MAX freq to fmid.
> 
> v4: Moved proposal with making test drm master to other patch

So it still failed the reset scenario, and looking at the failure what
is notable by its absence is the background load. Without that the test
is entirely dependent upon the kernel's low priority retire worker to
ensure forward progress, which is not expected and certainly not
accounted for.  Something like the following will help and shave ~20s
off the test,

diff --git a/tests/pm_rps.c b/tests/pm_rps.c
index 13c51dd5..8ea470e2 100644
--- a/tests/pm_rps.c
+++ b/tests/pm_rps.c
@@ -28,6 +28,7 @@
 
 #define _GNU_SOURCE
 #include "igt.h"
+#include "igt_gt.h"
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
@@ -167,7 +168,7 @@ static void dump(const int *freqs)
 }
 
 enum load {
-	LOW,
+	LOW = 0,
 	HIGH
 };
 
@@ -185,9 +186,10 @@ static struct load_helper {
 
 static void load_helper_signal_handler(int sig)
 {
-	if (sig == SIGUSR2)
-		lh.load = lh.load == LOW ? HIGH : LOW;
-	else
+	if (sig == SIGUSR2) {
+		lh.load = !lh.load;
+		igt_debug("Switching background load to %s\n", lh.load ? "high" : "low");
+	} else
 		lh.exit = true;
 }
 
@@ -238,6 +240,7 @@ static void load_helper_run(enum load load)
 		return;
 	}
 
+	lh.exit = false;
 	lh.load = load;
 
 	igt_fork_helper(&lh.igt_proc) {
@@ -263,6 +266,8 @@ static void load_helper_run(enum load load)
 		if (intel_gen(lh.devid) >= 6)
 			execbuf.flags = I915_EXEC_BLT;
 
+		igt_debug("Applying %s load...\n", lh.load ? "high" : "low");
+
 		while (!lh.exit) {
 			memset(&object, 0, sizeof(object));
 			object.handle = fences[val%3];
@@ -296,6 +301,8 @@ static void load_helper_run(enum load load)
 		gem_close(drm_fd, fences[0]);
 		gem_close(drm_fd, fences[1]);
 		gem_close(drm_fd, fences[2]);
+
+		igt_drop_caches_set(drm_fd, DROP_RETIRE);
 	}
 }
 
@@ -553,13 +560,6 @@ static void stabilize_check(int *out)
 	igt_debug("Waited %d msec to stabilize cur\n", wait);
 }
 
-static void reset_gpu(void)
-{
-	int fd = drm_open_driver(DRIVER_INTEL);
-	igt_post_hang_ring(fd, igt_hang_ring(fd, I915_EXEC_DEFAULT));
-	close(fd);
-}
-
 static void boost_freq(int fd, int *boost_freqs)
 {
 	int64_t timeout = 1;
@@ -584,14 +584,12 @@ static void boost_freq(int fd, int *boost_freqs)
 	igt_spin_batch_free(fd, load);
 }
 
-static void waitboost(bool reset)
+static void waitboost(int fd, bool reset)
 {
 	int pre_freqs[NUMFREQ];
 	int boost_freqs[NUMFREQ];
 	int post_freqs[NUMFREQ];
 
-	int fd = drm_open_driver(DRIVER_INTEL);
-
 	load_helper_run(LOW);
 
 	igt_debug("Apply low load...\n");
@@ -600,7 +598,7 @@ static void waitboost(bool reset)
 
 	if (reset) {
 		igt_debug("Reset gpu...\n");
-		reset_gpu();
+		igt_force_gpu_reset(fd);
 		sleep(1);
 	}
 
@@ -621,8 +619,6 @@ static void waitboost(bool reset)
 	igt_assert_lt(pre_freqs[CUR], pre_freqs[MAX]);
 	igt_assert_eq(boost_freqs[CUR], boost_freqs[MAX]);
 	igt_assert_lt(post_freqs[CUR], post_freqs[MAX]);
-
-	close(fd);
 }
 
 static void pm_rps_exit_handler(int sig)
@@ -687,9 +683,14 @@ igt_main
 	}
 
 	igt_subtest("waitboost")
-		waitboost(false);
+		waitboost(drm_fd, false);
+
+	igt_subtest("reset") {
+		igt_hang_t hang = igt_allow_hang(drm_fd, 0, 0);
 
-	igt_subtest("reset")
-		waitboost(true);
+		waitboost(drm_fd, true);
+
+		igt_disallow_hang(drm_fd, hang);
+	}
 
 }
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH i-g-t v4] pm_rps: Changes in waitboost scenario
  2017-08-22 12:40     ` Katarzyna Dec
  2017-08-24  9:44       ` Chris Wilson
@ 2017-08-28  8:50       ` Katarzyna Dec
  2017-08-29  7:43         ` Szwichtenberg, Radoslaw
  2017-08-29  8:57         ` [PATCH i-g-t v5] " Katarzyna Dec
  1 sibling, 2 replies; 34+ messages in thread
From: Katarzyna Dec @ 2017-08-28  8:50 UTC (permalink / raw)
  To: intel-gfx

CI is observing sporadical failures in pm_rps subtests.
There are a couple of reasons. One of them is the fact that
on gen6, gen7 and gen7.5, max frequency (as in the HW limit)
is not set to RP0, but the value obtaind from PCODE (which
may be different from RP0). Thus the test is operating under
wrong assumptions (SOFTMAX == RP0 == BOOST which is simply
not the case). Let's compare current frequency with BOOST
frequency rather than SOFTMAX to get the test behaviour under control.
In boost_freq function I set MAX freq to midium freqency, which ensures
that we for sure reach BOOST frequency. This could help with failures
with boost frequency failing to drop down.
GPU reset needs to be modified so we are not dependent on kernel's low
priority retire worker. Reset method was replaced by igt_force_gpu_reset()
and in reset testcase we make sure that we can recover from hang.

v2: Commit message, simplified waiting for boost to finish, drop
noisy whitespace cleanup.

v3: Removed reading from i915_rps_boost_info debugfs because it not
the same on every kernel. Removed function waiting for boost.
Instead of that I made sure we will reach in boost by setting MAX freq to fmid.

v4: Moved proposal with making test drm master to other patch

v5: Used igt_force_gpu_reset() to reset GPU. Modified "reset" testcase.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jeff Mcgee <jeff.mcgee@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Jani Saarinen <jani.saarinen@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
---
 tests/pm_rps.c | 63 +++++++++++++++++++++++++++++++++++-----------------------
 1 file changed, 38 insertions(+), 25 deletions(-)

diff --git a/tests/pm_rps.c b/tests/pm_rps.c
index f0455e78..a6c6f1eb 100644
--- a/tests/pm_rps.c
+++ b/tests/pm_rps.c
@@ -50,6 +50,7 @@ enum {
 	RP0,
 	RP1,
 	RPn,
+	BOOST,
 	NUMFREQ
 };
 
@@ -60,7 +61,7 @@ struct junk {
 	const char *mode;
 	FILE *filp;
 } stuff[] = {
-	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { NULL, NULL, NULL }
+	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { "boost", "rb+", NULL }, { NULL, NULL, NULL }
 };
 
 static int readval(FILE *filp)
@@ -167,7 +168,7 @@ static void dump(const int *freqs)
 }
 
 enum load {
-	LOW,
+	LOW = 0,
 	HIGH
 };
 
@@ -185,9 +186,10 @@ static struct load_helper {
 
 static void load_helper_signal_handler(int sig)
 {
-	if (sig == SIGUSR2)
-		lh.load = lh.load == LOW ? HIGH : LOW;
-	else
+	if (sig == SIGUSR2) {
+		lh.load = !lh.load;
+		igt_debug("Switching background load to %s\n", lh.load ? "high" : "low");
+	} else
 		lh.exit = true;
 }
 
@@ -238,6 +240,7 @@ static void load_helper_run(enum load load)
 		return;
 	}
 
+	lh.exit = false;
 	lh.load = load;
 
 	igt_fork_helper(&lh.igt_proc) {
@@ -263,6 +266,8 @@ static void load_helper_run(enum load load)
 		if (intel_gen(lh.devid) >= 6)
 			execbuf.flags = I915_EXEC_BLT;
 
+		igt_debug("Applying %s load...\n", lh.load ? "high" : "low");
+
 		while (!lh.exit) {
 			memset(&object, 0, sizeof(object));
 			object.handle = fences[val%3];
@@ -296,6 +301,8 @@ static void load_helper_run(enum load load)
 		gem_close(drm_fd, fences[0]);
 		gem_close(drm_fd, fences[1]);
 		gem_close(drm_fd, fences[2]);
+
+		igt_drop_caches_set(drm_fd, DROP_RETIRE);
 	}
 }
 
@@ -553,38 +560,43 @@ static void stabilize_check(int *out)
 	igt_debug("Waited %d msec to stabilize cur\n", wait);
 }
 
-static void reset_gpu(void)
-{
-	int fd = drm_open_driver(DRIVER_INTEL);
-	igt_post_hang_ring(fd, igt_hang_ring(fd, I915_EXEC_DEFAULT));
-	close(fd);
-}
-
 static void boost_freq(int fd, int *boost_freqs)
 {
 	int64_t timeout = 1;
-	int ring = -1;
 	igt_spin_t *load;
+	unsigned int engine;
+	int fmid = (origfreqs[RPn] + origfreqs[RP0]) / 2;
 
-	load = igt_spin_batch_new(fd, ring, 0);
+	fmid = get_hw_rounded_freq(fmid);
+	//set max freq to less then boost freq
+	writeval(stuff[MAX].filp, fmid);
 
+	/* put boost on the same engine as low load */
+	engine = I915_EXEC_RENDER;
+	if (intel_gen(lh.devid) >= 6)
+		engine = I915_EXEC_BLT;
+	load = igt_spin_batch_new(fd, engine, 0);
 	/* Waiting will grant us a boost to maximum */
 	gem_wait(fd, load->handle, &timeout);
 
 	read_freqs(boost_freqs);
 	dump(boost_freqs);
 
+	/* Avoid downlocking till boost request is pending */
+	igt_spin_batch_end(load);
+	gem_sync(fd, load->handle);
 	igt_spin_batch_free(fd, load);
+
+	//set max freq to original softmax
+	writeval(stuff[MAX].filp, origfreqs[MAX]);
 }
 
-static void waitboost(bool reset)
+static void waitboost(int fd, bool reset)
 {
 	int pre_freqs[NUMFREQ];
 	int boost_freqs[NUMFREQ];
 	int post_freqs[NUMFREQ];
 
-	int fd = drm_open_driver(DRIVER_INTEL);
-
 	load_helper_run(LOW);
 
 	igt_debug("Apply low load...\n");
@@ -593,7 +605,7 @@ static void waitboost(bool reset)
 
 	if (reset) {
 		igt_debug("Reset gpu...\n");
-		reset_gpu();
+		igt_force_gpu_reset(fd);
 		sleep(1);
 	}
 
@@ -611,10 +623,9 @@ static void waitboost(bool reset)
 	idle_check();
 
 	igt_assert_lt(pre_freqs[CUR], pre_freqs[MAX]);
-	igt_assert_eq(boost_freqs[CUR], boost_freqs[MAX]);
+	igt_assert_eq(boost_freqs[CUR], boost_freqs[BOOST]);
 	igt_assert_lt(post_freqs[CUR], post_freqs[MAX]);
 
-	close(fd);
 }
 
 static void pm_rps_exit_handler(int sig)
@@ -657,7 +668,7 @@ igt_main
 			val = readval(junk->filp);
 			igt_assert(val >= 0);
 			junk++;
-		} while(junk->name != NULL);
+		} while (junk->name != NULL);
 
 		read_freqs(origfreqs);
 
@@ -679,9 +690,11 @@ igt_main
 	}
 
 	igt_subtest("waitboost")
-		waitboost(false);
-
-	igt_subtest("reset")
-		waitboost(true);
+		waitboost(drm_fd, false);
 
+	igt_subtest("reset") {
+		igt_hang_t hang = igt_allow_hang(drm_fd, 0, 0);
+		waitboost(drm_fd, true);
+		igt_disallow_hang(drm_fd, hang);
+	}
 }
-- 
2.13.4

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev6)
  2017-08-18  7:33 [PATCH i-g-t] pm_rps: Changes in waitboost scenario Katarzyna Dec
                   ` (5 preceding siblings ...)
  2017-08-22 13:00 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev4) Patchwork
@ 2017-08-28  9:09 ` Patchwork
  2017-08-28 10:20 ` ✗ Fi.CI.IGT: warning " Patchwork
                   ` (6 subsequent siblings)
  13 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2017-08-28  9:09 UTC (permalink / raw)
  To: Katarzyna Dec; +Cc: intel-gfx

== Series Details ==

Series: pm_rps: Changes in waitboost scenario (rev6)
URL   : https://patchwork.freedesktop.org/series/28966/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
60f6a12195395934f179d5ecc080353190d19a6c tests: chamelium: Eliminate reset when preparing output

with latest DRM-Tip kernel build CI_DRM_3009
c52f5322612a drm-tip: 2017y-08m-26d-11h-41m-06s UTC integration manifest

Test kms_cursor_legacy:
        Subgroup basic-flip-after-cursor-varying-size:
                pass       -> FAIL       (fi-hsw-4770) fdo#102402 +1

fdo#102402 https://bugs.freedesktop.org/show_bug.cgi?id=102402

fi-bdw-5557u     total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:453s
fi-bdw-gvtdvm    total:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  time:441s
fi-blb-e6850     total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  time:362s
fi-bsw-n3050     total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  time:562s
fi-bwr-2160      total:279  pass:184  dwarn:0   dfail:0   fail:0   skip:95  time:252s
fi-bxt-j4205     total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:525s
fi-byt-j1900     total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  time:521s
fi-byt-n2820     total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  time:518s
fi-elk-e7500     total:279  pass:230  dwarn:0   dfail:0   fail:0   skip:49  time:439s
fi-glk-2a        total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:615s
fi-hsw-4770      total:279  pass:261  dwarn:0   dfail:0   fail:2   skip:16  time:465s
fi-hsw-4770r     total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:429s
fi-ilk-650       total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  time:424s
fi-ivb-3520m     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:505s
fi-ivb-3770      total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:471s
fi-kbl-7500u     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:479s
fi-kbl-7560u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:594s
fi-kbl-r         total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:600s
fi-pnv-d510      total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  time:527s
fi-skl-6260u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:467s
fi-skl-6700k     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:480s
fi-skl-6770hq    total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:491s
fi-skl-gvtdvm    total:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  time:445s
fi-skl-x1585l    total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:494s
fi-snb-2520m     total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  time:548s
fi-snb-2600      total:279  pass:248  dwarn:0   dfail:0   fail:2   skip:29  time:403s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_109/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* ✗ Fi.CI.IGT: warning for pm_rps: Changes in waitboost scenario (rev6)
  2017-08-18  7:33 [PATCH i-g-t] pm_rps: Changes in waitboost scenario Katarzyna Dec
                   ` (6 preceding siblings ...)
  2017-08-28  9:09 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev6) Patchwork
@ 2017-08-28 10:20 ` Patchwork
  2017-08-29  9:16 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev7) Patchwork
                   ` (5 subsequent siblings)
  13 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2017-08-28 10:20 UTC (permalink / raw)
  To: Katarzyna Dec; +Cc: intel-gfx

== Series Details ==

Series: pm_rps: Changes in waitboost scenario (rev6)
URL   : https://patchwork.freedesktop.org/series/28966/
State : warning

== Summary ==

Test kms_setmode:
        Subgroup basic:
                pass       -> FAIL       (shard-hsw) fdo#99912
Test tools_test:
        Subgroup tools_test:
                pass       -> DMESG-WARN (shard-hsw)
Test perf:
        Subgroup blocking:
                pass       -> FAIL       (shard-hsw) fdo#102252 +1
Test vgem_basic:
        Subgroup unload:
                pass       -> SKIP       (shard-hsw) fdo#102453
Test pm_rps:
        Subgroup reset:
                fail       -> PASS       (shard-hsw) fdo#102250 +1
Test kms_busy:
        Subgroup extended-modeset-hang-oldfb-with-reset-render-C:
                pass       -> DMESG-WARN (shard-hsw)

fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#102453 https://bugs.freedesktop.org/show_bug.cgi?id=102453
fdo#102250 https://bugs.freedesktop.org/show_bug.cgi?id=102250

shard-hsw        total:2230 pass:1229 dwarn:2   dfail:0   fail:17  skip:982 time:9552s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_109/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH i-g-t v4] pm_rps: Changes in waitboost scenario
  2017-08-28  8:50       ` [PATCH i-g-t v4] " Katarzyna Dec
@ 2017-08-29  7:43         ` Szwichtenberg, Radoslaw
  2017-08-29  8:30           ` Daniel Vetter
  2017-08-29  8:57         ` [PATCH i-g-t v5] " Katarzyna Dec
  1 sibling, 1 reply; 34+ messages in thread
From: Szwichtenberg, Radoslaw @ 2017-08-29  7:43 UTC (permalink / raw)
  To: Dec, Katarzyna, intel-gfx

On Mon, 2017-08-28 at 10:50 +0200, Katarzyna Dec wrote:
> CI is observing sporadical failures in pm_rps subtests.
> There are a couple of reasons. One of them is the fact that
> on gen6, gen7 and gen7.5, max frequency (as in the HW limit)
> is not set to RP0, but the value obtaind from PCODE (which
> may be different from RP0). Thus the test is operating under
> wrong assumptions (SOFTMAX == RP0 == BOOST which is simply
> not the case). Let's compare current frequency with BOOST
> frequency rather than SOFTMAX to get the test behaviour under control.
> In boost_freq function I set MAX freq to midium freqency, which ensures
> that we for sure reach BOOST frequency. This could help with failures
> with boost frequency failing to drop down.
> GPU reset needs to be modified so we are not dependent on kernel's low
> priority retire worker. Reset method was replaced by igt_force_gpu_reset()
> and in reset testcase we make sure that we can recover from hang.
> 
> v2: Commit message, simplified waiting for boost to finish, drop
> noisy whitespace cleanup.
> 
> v3: Removed reading from i915_rps_boost_info debugfs because it not
> the same on every kernel. Removed function waiting for boost.
> Instead of that I made sure we will reach in boost by setting MAX freq to
> fmid.
> 
> v4: Moved proposal with making test drm master to other patch
> 
> v5: Used igt_force_gpu_reset() to reset GPU. Modified "reset" testcase.
> 
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Jeff Mcgee <jeff.mcgee@intel.com>
> Cc: Petri Latvala <petri.latvala@intel.com>
> Cc: Jani Saarinen <jani.saarinen@intel.com>
> Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
> ---
>  tests/pm_rps.c | 63 +++++++++++++++++++++++++++++++++++--------------------
> ---
>  1 file changed, 38 insertions(+), 25 deletions(-)
> 
> diff --git a/tests/pm_rps.c b/tests/pm_rps.c
> index f0455e78..a6c6f1eb 100644
> --- a/tests/pm_rps.c
> +++ b/tests/pm_rps.c
> @@ -50,6 +50,7 @@ enum {
>  	RP0,
>  	RP1,
>  	RPn,
> +	BOOST,
>  	NUMFREQ
>  };
>  
> @@ -60,7 +61,7 @@ struct junk {
>  	const char *mode;
>  	FILE *filp;
>  } stuff[] = {
> -	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL },
> { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { NULL,
> NULL, NULL }
> +	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL },
> { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { "boost",
> "rb+", NULL }, { NULL, NULL, NULL }
>  };
>  
>  static int readval(FILE *filp)
> @@ -167,7 +168,7 @@ static void dump(const int *freqs)
>  }
>  
>  enum load {
> -	LOW,
> +	LOW = 0,
>  	HIGH
>  };
>  
> @@ -185,9 +186,10 @@ static struct load_helper {
>  
>  static void load_helper_signal_handler(int sig)
>  {
> -	if (sig == SIGUSR2)
> -		lh.load = lh.load == LOW ? HIGH : LOW;
> -	else
> +	if (sig == SIGUSR2) {
> +		lh.load = !lh.load;
> +		igt_debug("Switching background load to %s\n", lh.load ?
> "high" : "low");
> +	} else
>  		lh.exit = true;
>  }
>  
> @@ -238,6 +240,7 @@ static void load_helper_run(enum load load)
>  		return;
>  	}
>  
> +	lh.exit = false;
>  	lh.load = load;
>  
>  	igt_fork_helper(&lh.igt_proc) {
> @@ -263,6 +266,8 @@ static void load_helper_run(enum load load)
>  		if (intel_gen(lh.devid) >= 6)
>  			execbuf.flags = I915_EXEC_BLT;
>  
> +		igt_debug("Applying %s load...\n", lh.load ? "high" : "low");
> +
>  		while (!lh.exit) {
>  			memset(&object, 0, sizeof(object));
>  			object.handle = fences[val%3];
> @@ -296,6 +301,8 @@ static void load_helper_run(enum load load)
>  		gem_close(drm_fd, fences[0]);
>  		gem_close(drm_fd, fences[1]);
>  		gem_close(drm_fd, fences[2]);
> +
> +		igt_drop_caches_set(drm_fd, DROP_RETIRE);
>  	}
>  }
>  
> @@ -553,38 +560,43 @@ static void stabilize_check(int *out)
>  	igt_debug("Waited %d msec to stabilize cur\n", wait);
>  }
>  
> -static void reset_gpu(void)
> -{
> -	int fd = drm_open_driver(DRIVER_INTEL);
> -	igt_post_hang_ring(fd, igt_hang_ring(fd, I915_EXEC_DEFAULT));
> -	close(fd);
> -}
> -
>  static void boost_freq(int fd, int *boost_freqs)
>  {
>  	int64_t timeout = 1;
> -	int ring = -1;
>  	igt_spin_t *load;
> +	unsigned int engine;
> +	int fmid = (origfreqs[RPn] + origfreqs[RP0]) / 2;
>  
> -	load = igt_spin_batch_new(fd, ring, 0);
> +	fmid = get_hw_rounded_freq(fmid);
> +	//set max freq to less then boost freq
Looks good to me.
Just one very minor comment - we do use two different comment styles, should we
instead use one? Do you think we should add any simple test descriptions above
the tests or these tests are easy to understand?
> +	writeval(stuff[MAX].filp, fmid);
>  
> +	/* put boost on the same engine as low load */
> +	engine = I915_EXEC_RENDER;

Otherwise
Reviewed-by: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH i-g-t v4] pm_rps: Changes in waitboost scenario
  2017-08-29  7:43         ` Szwichtenberg, Radoslaw
@ 2017-08-29  8:30           ` Daniel Vetter
  0 siblings, 0 replies; 34+ messages in thread
From: Daniel Vetter @ 2017-08-29  8:30 UTC (permalink / raw)
  To: Szwichtenberg, Radoslaw; +Cc: Dec, Katarzyna, intel-gfx

On Tue, Aug 29, 2017 at 07:43:20AM +0000, Szwichtenberg, Radoslaw wrote:
> On Mon, 2017-08-28 at 10:50 +0200, Katarzyna Dec wrote:
> > CI is observing sporadical failures in pm_rps subtests.
> > There are a couple of reasons. One of them is the fact that
> > on gen6, gen7 and gen7.5, max frequency (as in the HW limit)
> > is not set to RP0, but the value obtaind from PCODE (which
> > may be different from RP0). Thus the test is operating under
> > wrong assumptions (SOFTMAX == RP0 == BOOST which is simply
> > not the case). Let's compare current frequency with BOOST
> > frequency rather than SOFTMAX to get the test behaviour under control.
> > In boost_freq function I set MAX freq to midium freqency, which ensures
> > that we for sure reach BOOST frequency. This could help with failures
> > with boost frequency failing to drop down.
> > GPU reset needs to be modified so we are not dependent on kernel's low
> > priority retire worker. Reset method was replaced by igt_force_gpu_reset()
> > and in reset testcase we make sure that we can recover from hang.
> > 
> > v2: Commit message, simplified waiting for boost to finish, drop
> > noisy whitespace cleanup.
> > 
> > v3: Removed reading from i915_rps_boost_info debugfs because it not
> > the same on every kernel. Removed function waiting for boost.
> > Instead of that I made sure we will reach in boost by setting MAX freq to
> > fmid.
> > 
> > v4: Moved proposal with making test drm master to other patch
> > 
> > v5: Used igt_force_gpu_reset() to reset GPU. Modified "reset" testcase.
> > 
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Jeff Mcgee <jeff.mcgee@intel.com>
> > Cc: Petri Latvala <petri.latvala@intel.com>
> > Cc: Jani Saarinen <jani.saarinen@intel.com>
> > Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
> > Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
> > ---
> >  tests/pm_rps.c | 63 +++++++++++++++++++++++++++++++++++--------------------
> > ---
> >  1 file changed, 38 insertions(+), 25 deletions(-)
> > 
> > diff --git a/tests/pm_rps.c b/tests/pm_rps.c
> > index f0455e78..a6c6f1eb 100644
> > --- a/tests/pm_rps.c
> > +++ b/tests/pm_rps.c
> > @@ -50,6 +50,7 @@ enum {
> >  	RP0,
> >  	RP1,
> >  	RPn,
> > +	BOOST,
> >  	NUMFREQ
> >  };
> >  
> > @@ -60,7 +61,7 @@ struct junk {
> >  	const char *mode;
> >  	FILE *filp;
> >  } stuff[] = {
> > -	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL },
> > { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { NULL,
> > NULL, NULL }
> > +	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL },
> > { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { "boost",
> > "rb+", NULL }, { NULL, NULL, NULL }
> >  };
> >  
> >  static int readval(FILE *filp)
> > @@ -167,7 +168,7 @@ static void dump(const int *freqs)
> >  }
> >  
> >  enum load {
> > -	LOW,
> > +	LOW = 0,
> >  	HIGH
> >  };
> >  
> > @@ -185,9 +186,10 @@ static struct load_helper {
> >  
> >  static void load_helper_signal_handler(int sig)
> >  {
> > -	if (sig == SIGUSR2)
> > -		lh.load = lh.load == LOW ? HIGH : LOW;
> > -	else
> > +	if (sig == SIGUSR2) {
> > +		lh.load = !lh.load;
> > +		igt_debug("Switching background load to %s\n", lh.load ?
> > "high" : "low");
> > +	} else
> >  		lh.exit = true;
> >  }
> >  
> > @@ -238,6 +240,7 @@ static void load_helper_run(enum load load)
> >  		return;
> >  	}
> >  
> > +	lh.exit = false;
> >  	lh.load = load;
> >  
> >  	igt_fork_helper(&lh.igt_proc) {
> > @@ -263,6 +266,8 @@ static void load_helper_run(enum load load)
> >  		if (intel_gen(lh.devid) >= 6)
> >  			execbuf.flags = I915_EXEC_BLT;
> >  
> > +		igt_debug("Applying %s load...\n", lh.load ? "high" : "low");
> > +
> >  		while (!lh.exit) {
> >  			memset(&object, 0, sizeof(object));
> >  			object.handle = fences[val%3];
> > @@ -296,6 +301,8 @@ static void load_helper_run(enum load load)
> >  		gem_close(drm_fd, fences[0]);
> >  		gem_close(drm_fd, fences[1]);
> >  		gem_close(drm_fd, fences[2]);
> > +
> > +		igt_drop_caches_set(drm_fd, DROP_RETIRE);
> >  	}
> >  }
> >  
> > @@ -553,38 +560,43 @@ static void stabilize_check(int *out)
> >  	igt_debug("Waited %d msec to stabilize cur\n", wait);
> >  }
> >  
> > -static void reset_gpu(void)
> > -{
> > -	int fd = drm_open_driver(DRIVER_INTEL);
> > -	igt_post_hang_ring(fd, igt_hang_ring(fd, I915_EXEC_DEFAULT));
> > -	close(fd);
> > -}
> > -
> >  static void boost_freq(int fd, int *boost_freqs)
> >  {
> >  	int64_t timeout = 1;
> > -	int ring = -1;
> >  	igt_spin_t *load;
> > +	unsigned int engine;
> > +	int fmid = (origfreqs[RPn] + origfreqs[RP0]) / 2;
> >  
> > -	load = igt_spin_batch_new(fd, ring, 0);
> > +	fmid = get_hw_rounded_freq(fmid);
> > +	//set max freq to less then boost freq
> Looks good to me.
> Just one very minor comment - we do use two different comment styles, should we
> instead use one? Do you think we should add any simple test descriptions above
> the tests or these tests are easy to understand?

We try to follow the kernel's CodingStyle, see

https://01.org/linuxgraphics/gfx-docs/drm/process/coding-style.html

This means /* */ C style comments everywhere. Please fix.

> > +	writeval(stuff[MAX].filp, fmid);
> >  
> > +	/* put boost on the same engine as low load */
> > +	engine = I915_EXEC_RENDER;
> 
> Otherwise
> Reviewed-by: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com

When you resubmit, plus include Radek's r-b tag.

Thanks, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH i-g-t v5] pm_rps: Changes in waitboost scenario
  2017-08-28  8:50       ` [PATCH i-g-t v4] " Katarzyna Dec
  2017-08-29  7:43         ` Szwichtenberg, Radoslaw
@ 2017-08-29  8:57         ` Katarzyna Dec
  2017-08-30 13:05           ` [PATCH i-g-t v6] " Katarzyna Dec
  1 sibling, 1 reply; 34+ messages in thread
From: Katarzyna Dec @ 2017-08-29  8:57 UTC (permalink / raw)
  To: intel-gfx

CI is observing sporadical failures in pm_rps subtests.
There are a couple of reasons. One of them is the fact that
on gen6, gen7 and gen7.5, max frequency (as in the HW limit)
is not set to RP0, but the value obtaind from PCODE (which
may be different from RP0). Thus the test is operating under
wrong assumptions (SOFTMAX == RP0 == BOOST which is simply
not the case). Let's compare current frequency with BOOST
frequency rather than SOFTMAX to get the test behaviour under control.
In boost_freq function I set MAX freq to midium freqency, which ensures
that we for sure reach BOOST frequency. This could help with failures
with boost frequency failing to drop down.
GPU reset needs to be modified so we are not dependent on kernel's low
priority retire worker. Reset method was replaced by igt_force_gpu_reset()
and in reset testcase we make sure that we can recover from hang.

v2: Commit message, simplified waiting for boost to finish, drop
noisy whitespace cleanup.

v3: Removed reading from i915_rps_boost_info debugfs because it not
the same on every kernel. Removed function waiting for boost.
Instead of that I made sure we will reach in boost by setting MAX freq to fmid.

v4: Moved proposal with making test drm master to other patch

v5: Used igt_force_gpu_reset() to reset GPU. Modified "reset" testcase.

v6: Changes in commenting style

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jeff Mcgee <jeff.mcgee@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Jani Saarinen <jani.saarinen@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Reviewed-by: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
---
 tests/pm_rps.c | 63 +++++++++++++++++++++++++++++++++++-----------------------
 1 file changed, 38 insertions(+), 25 deletions(-)

diff --git a/tests/pm_rps.c b/tests/pm_rps.c
index f0455e78..adc0c299 100644
--- a/tests/pm_rps.c
+++ b/tests/pm_rps.c
@@ -50,6 +50,7 @@ enum {
 	RP0,
 	RP1,
 	RPn,
+	BOOST,
 	NUMFREQ
 };
 
@@ -60,7 +61,7 @@ struct junk {
 	const char *mode;
 	FILE *filp;
 } stuff[] = {
-	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { NULL, NULL, NULL }
+	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { "boost", "rb+", NULL }, { NULL, NULL, NULL }
 };
 
 static int readval(FILE *filp)
@@ -167,7 +168,7 @@ static void dump(const int *freqs)
 }
 
 enum load {
-	LOW,
+	LOW = 0,
 	HIGH
 };
 
@@ -185,9 +186,10 @@ static struct load_helper {
 
 static void load_helper_signal_handler(int sig)
 {
-	if (sig == SIGUSR2)
-		lh.load = lh.load == LOW ? HIGH : LOW;
-	else
+	if (sig == SIGUSR2) {
+		lh.load = !lh.load;
+		igt_debug("Switching background load to %s\n", lh.load ? "high" : "low");
+	} else
 		lh.exit = true;
 }
 
@@ -238,6 +240,7 @@ static void load_helper_run(enum load load)
 		return;
 	}
 
+	lh.exit = false;
 	lh.load = load;
 
 	igt_fork_helper(&lh.igt_proc) {
@@ -263,6 +266,8 @@ static void load_helper_run(enum load load)
 		if (intel_gen(lh.devid) >= 6)
 			execbuf.flags = I915_EXEC_BLT;
 
+		igt_debug("Applying %s load...\n", lh.load ? "high" : "low");
+
 		while (!lh.exit) {
 			memset(&object, 0, sizeof(object));
 			object.handle = fences[val%3];
@@ -296,6 +301,8 @@ static void load_helper_run(enum load load)
 		gem_close(drm_fd, fences[0]);
 		gem_close(drm_fd, fences[1]);
 		gem_close(drm_fd, fences[2]);
+
+		igt_drop_caches_set(drm_fd, DROP_RETIRE);
 	}
 }
 
@@ -553,38 +560,43 @@ static void stabilize_check(int *out)
 	igt_debug("Waited %d msec to stabilize cur\n", wait);
 }
 
-static void reset_gpu(void)
-{
-	int fd = drm_open_driver(DRIVER_INTEL);
-	igt_post_hang_ring(fd, igt_hang_ring(fd, I915_EXEC_DEFAULT));
-	close(fd);
-}
-
 static void boost_freq(int fd, int *boost_freqs)
 {
 	int64_t timeout = 1;
-	int ring = -1;
 	igt_spin_t *load;
+	unsigned int engine;
+	int fmid = (origfreqs[RPn] + origfreqs[RP0]) / 2;
 
-	load = igt_spin_batch_new(fd, ring, 0);
+	fmid = get_hw_rounded_freq(fmid);
+	/* set max freq to less then boost freq */
+	writeval(stuff[MAX].filp, fmid);
 
+	/* put boost on the same engine as low load */
+	engine = I915_EXEC_RENDER;
+	if (intel_gen(lh.devid) >= 6)
+		engine = I915_EXEC_BLT;
+	load = igt_spin_batch_new(fd, engine, 0);
 	/* Waiting will grant us a boost to maximum */
 	gem_wait(fd, load->handle, &timeout);
 
 	read_freqs(boost_freqs);
 	dump(boost_freqs);
 
+	/* Avoid downlocking till boost request is pending */
+	igt_spin_batch_end(load);
+	gem_sync(fd, load->handle);
 	igt_spin_batch_free(fd, load);
+
+	/* set max freq to original softmax */
+	writeval(stuff[MAX].filp, origfreqs[MAX]);
 }
 
-static void waitboost(bool reset)
+static void waitboost(int fd, bool reset)
 {
 	int pre_freqs[NUMFREQ];
 	int boost_freqs[NUMFREQ];
 	int post_freqs[NUMFREQ];
 
-	int fd = drm_open_driver(DRIVER_INTEL);
-
 	load_helper_run(LOW);
 
 	igt_debug("Apply low load...\n");
@@ -593,7 +605,7 @@ static void waitboost(bool reset)
 
 	if (reset) {
 		igt_debug("Reset gpu...\n");
-		reset_gpu();
+		igt_force_gpu_reset(fd);
 		sleep(1);
 	}
 
@@ -611,10 +623,9 @@ static void waitboost(bool reset)
 	idle_check();
 
 	igt_assert_lt(pre_freqs[CUR], pre_freqs[MAX]);
-	igt_assert_eq(boost_freqs[CUR], boost_freqs[MAX]);
+	igt_assert_eq(boost_freqs[CUR], boost_freqs[BOOST]);
 	igt_assert_lt(post_freqs[CUR], post_freqs[MAX]);
 
-	close(fd);
 }
 
 static void pm_rps_exit_handler(int sig)
@@ -657,7 +668,7 @@ igt_main
 			val = readval(junk->filp);
 			igt_assert(val >= 0);
 			junk++;
-		} while(junk->name != NULL);
+		} while (junk->name != NULL);
 
 		read_freqs(origfreqs);
 
@@ -679,9 +690,11 @@ igt_main
 	}
 
 	igt_subtest("waitboost")
-		waitboost(false);
-
-	igt_subtest("reset")
-		waitboost(true);
+		waitboost(drm_fd, false);
 
+	igt_subtest("reset") {
+		igt_hang_t hang = igt_allow_hang(drm_fd, 0, 0);
+		waitboost(drm_fd, true);
+		igt_disallow_hang(drm_fd, hang);
+	}
 }
-- 
2.13.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev7)
  2017-08-18  7:33 [PATCH i-g-t] pm_rps: Changes in waitboost scenario Katarzyna Dec
                   ` (7 preceding siblings ...)
  2017-08-28 10:20 ` ✗ Fi.CI.IGT: warning " Patchwork
@ 2017-08-29  9:16 ` Patchwork
  2017-08-29 10:27 ` ✗ Fi.CI.IGT: warning " Patchwork
                   ` (4 subsequent siblings)
  13 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2017-08-29  9:16 UTC (permalink / raw)
  To: Katarzyna Dec; +Cc: intel-gfx

== Series Details ==

Series: pm_rps: Changes in waitboost scenario (rev7)
URL   : https://patchwork.freedesktop.org/series/28966/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
bf45d253648250fc402eee02237366c8882b2053 igt: Add gem_close

with latest DRM-Tip kernel build CI_DRM_3013
79cec1e1ffe2 drm-tip: 2017y-08m-29d-06h-07m-10s UTC integration manifest

Test kms_flip:
        Subgroup basic-flip-vs-modeset:
                skip       -> PASS       (fi-skl-x1585l) fdo#101781

fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781

fi-bdw-5557u     total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:462s
fi-bdw-gvtdvm    total:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  time:442s
fi-blb-e6850     total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  time:365s
fi-bsw-n3050     total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  time:556s
fi-bwr-2160      total:279  pass:184  dwarn:0   dfail:0   fail:0   skip:95  time:255s
fi-bxt-j4205     total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:527s
fi-byt-j1900     total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  time:526s
fi-byt-n2820     total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  time:530s
fi-elk-e7500     total:279  pass:230  dwarn:0   dfail:0   fail:0   skip:49  time:442s
fi-glk-2a        total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:619s
fi-hsw-4770      total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:442s
fi-hsw-4770r     total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:426s
fi-ilk-650       total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  time:426s
fi-ivb-3520m     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:509s
fi-ivb-3770      total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:476s
fi-kbl-7500u     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:479s
fi-kbl-7560u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:598s
fi-kbl-r         total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:598s
fi-pnv-d510      total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  time:522s
fi-skl-6260u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:471s
fi-skl-6700k     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:483s
fi-skl-6770hq    total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:493s
fi-skl-gvtdvm    total:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  time:443s
fi-skl-x1585l    total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:508s
fi-snb-2520m     total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  time:550s
fi-snb-2600      total:279  pass:249  dwarn:0   dfail:0   fail:1   skip:29  time:408s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_115/
_______________________________________________
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Intel-gfx@lists.freedesktop.org
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^ permalink raw reply	[flat|nested] 34+ messages in thread

* ✗ Fi.CI.IGT: warning for pm_rps: Changes in waitboost scenario (rev7)
  2017-08-18  7:33 [PATCH i-g-t] pm_rps: Changes in waitboost scenario Katarzyna Dec
                   ` (8 preceding siblings ...)
  2017-08-29  9:16 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev7) Patchwork
@ 2017-08-29 10:27 ` Patchwork
  2017-08-30 13:28 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev8) Patchwork
                   ` (3 subsequent siblings)
  13 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2017-08-29 10:27 UTC (permalink / raw)
  To: Katarzyna Dec; +Cc: intel-gfx

== Series Details ==

Series: pm_rps: Changes in waitboost scenario (rev7)
URL   : https://patchwork.freedesktop.org/series/28966/
State : warning

== Summary ==

Test pm_rps:
        Subgroup reset:
                fail       -> PASS       (shard-hsw) fdo#102250 +1
Test perf:
        Subgroup blocking:
                pass       -> FAIL       (shard-hsw) fdo#102252 +1
Test kms_busy:
        Subgroup extended-modeset-hang-newfb-with-reset-render-B:
                pass       -> DMESG-WARN (shard-hsw)

fdo#102250 https://bugs.freedesktop.org/show_bug.cgi?id=102250
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252

shard-hsw        total:2230 pass:1231 dwarn:1   dfail:0   fail:17  skip:981 time:9636s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_115/shards.html
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH i-g-t v6] pm_rps: Changes in waitboost scenario
  2017-08-29  8:57         ` [PATCH i-g-t v5] " Katarzyna Dec
@ 2017-08-30 13:05           ` Katarzyna Dec
  2017-08-30 13:21             ` [PATCH i-g-t v7] " Katarzyna Dec
  0 siblings, 1 reply; 34+ messages in thread
From: Katarzyna Dec @ 2017-08-30 13:05 UTC (permalink / raw)
  To: intel-gfx

CI is observing sporadical failures in pm_rps subtests.
There are a couple of reasons. One of them is the fact that
on gen6, gen7 and gen7.5, max frequency (as in the HW limit)
is not set to RP0, but the value obtaind from PCODE (which
may be different from RP0). Thus the test is operating under
wrong assumptions (SOFTMAX == RP0 == BOOST which is simply
not the case). Let's compare current frequency with BOOST
frequency rather than SOFTMAX to get the test behaviour under control.
In boost_freq function I set MAX freq to midium freqency, which ensures
that we for sure reach BOOST frequency. This could help with failures
with boost frequency failing to drop down.
GPU reset needs to be modified so we are not dependent on kernel's low
priority retire worker. Reset method was replaced by igt_force_gpu_reset()
and in reset testcase we make sure that we can recover from hang.

v2: Commit message, simplified waiting for boost to finish, drop
noisy whitespace cleanup.

v3: Removed reading from i915_rps_boost_info debugfs because it not
the same on every kernel. Removed function waiting for boost.
Instead of that I made sure we will reach in boost by setting MAX freq to fmid.

v4: Moved proposal with making test drm master to other patch

v5: Used igt_force_gpu_reset() to reset GPU. Modified "reset" testcase.

v6: Comments changes and update.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jeff Mcgee <jeff.mcgee@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Jani Saarinen <jani.saarinen@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Reviewed-by: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Acked-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
---
 tests/pm_rps.c | 67 ++++++++++++++++++++++++++++++++++++----------------------
 1 file changed, 42 insertions(+), 25 deletions(-)

diff --git a/tests/pm_rps.c b/tests/pm_rps.c
index f0455e78..f821c210 100644
--- a/tests/pm_rps.c
+++ b/tests/pm_rps.c
@@ -50,6 +50,7 @@ enum {
 	RP0,
 	RP1,
 	RPn,
+	BOOST,
 	NUMFREQ
 };
 
@@ -60,7 +61,7 @@ struct junk {
 	const char *mode;
 	FILE *filp;
 } stuff[] = {
-	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { NULL, NULL, NULL }
+	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { "boost", "rb+", NULL }, { NULL, NULL, NULL }
 };
 
 static int readval(FILE *filp)
@@ -167,7 +168,7 @@ static void dump(const int *freqs)
 }
 
 enum load {
-	LOW,
+	LOW = 0,
 	HIGH
 };
 
@@ -185,9 +186,10 @@ static struct load_helper {
 
 static void load_helper_signal_handler(int sig)
 {
-	if (sig == SIGUSR2)
-		lh.load = lh.load == LOW ? HIGH : LOW;
-	else
+	if (sig == SIGUSR2) {
+		lh.load = !lh.load;
+		igt_debug("Switching background load to %s\n", lh.load ? "high" : "low");
+	} else
 		lh.exit = true;
 }
 
@@ -238,6 +240,7 @@ static void load_helper_run(enum load load)
 		return;
 	}
 
+	lh.exit = false;
 	lh.load = load;
 
 	igt_fork_helper(&lh.igt_proc) {
@@ -263,6 +266,8 @@ static void load_helper_run(enum load load)
 		if (intel_gen(lh.devid) >= 6)
 			execbuf.flags = I915_EXEC_BLT;
 
+		igt_debug("Applying %s load...\n", lh.load ? "high" : "low");
+
 		while (!lh.exit) {
 			memset(&object, 0, sizeof(object));
 			object.handle = fences[val%3];
@@ -296,6 +301,12 @@ static void load_helper_run(enum load load)
 		gem_close(drm_fd, fences[0]);
 		gem_close(drm_fd, fences[1]);
 		gem_close(drm_fd, fences[2]);
+
+		/* Idle/boost logic is tide with request requirement.
+		 * Speed up detection of idle state and ensure deboost
+		 * after removing load.
+		 */
+		igt_drop_caches_set(drm_fd, DROP_RETIRE);
 	}
 }
 
@@ -553,38 +564,43 @@ static void stabilize_check(int *out)
 	igt_debug("Waited %d msec to stabilize cur\n", wait);
 }
 
-static void reset_gpu(void)
-{
-	int fd = drm_open_driver(DRIVER_INTEL);
-	igt_post_hang_ring(fd, igt_hang_ring(fd, I915_EXEC_DEFAULT));
-	close(fd);
-}
-
 static void boost_freq(int fd, int *boost_freqs)
 {
 	int64_t timeout = 1;
-	int ring = -1;
 	igt_spin_t *load;
+	unsigned int engine;
+	int fmid = (origfreqs[RPn] + origfreqs[RP0]) / 2;
 
-	load = igt_spin_batch_new(fd, ring, 0);
+	fmid = get_hw_rounded_freq(fmid);
+	/* set max freq to less then boost freq */
+	writeval(stuff[MAX].filp, fmid);
 
+	/* put boost on the same engine as low load */
+	engine = I915_EXEC_RENDER;
+	if (intel_gen(lh.devid) >= 6)
+		engine = I915_EXEC_BLT;
+	load = igt_spin_batch_new(fd, engine, 0);
 	/* Waiting will grant us a boost to maximum */
 	gem_wait(fd, load->handle, &timeout);
 
 	read_freqs(boost_freqs);
 	dump(boost_freqs);
 
+	/* Avoid downlocking till boost request is pending */
+	igt_spin_batch_end(load);
+	gem_sync(fd, load->handle);
 	igt_spin_batch_free(fd, load);
+
+	/* set max freq to original softmax */
+	writeval(stuff[MAX].filp, origfreqs[MAX]);
 }
 
-static void waitboost(bool reset)
+static void waitboost(int fd, bool reset)
 {
 	int pre_freqs[NUMFREQ];
 	int boost_freqs[NUMFREQ];
 	int post_freqs[NUMFREQ];
 
-	int fd = drm_open_driver(DRIVER_INTEL);
-
 	load_helper_run(LOW);
 
 	igt_debug("Apply low load...\n");
@@ -593,7 +609,7 @@ static void waitboost(bool reset)
 
 	if (reset) {
 		igt_debug("Reset gpu...\n");
-		reset_gpu();
+		igt_force_gpu_reset(fd);
 		sleep(1);
 	}
 
@@ -611,10 +627,9 @@ static void waitboost(bool reset)
 	idle_check();
 
 	igt_assert_lt(pre_freqs[CUR], pre_freqs[MAX]);
-	igt_assert_eq(boost_freqs[CUR], boost_freqs[MAX]);
+	igt_assert_eq(boost_freqs[CUR], boost_freqs[BOOST]);
 	igt_assert_lt(post_freqs[CUR], post_freqs[MAX]);
 
-	close(fd);
 }
 
 static void pm_rps_exit_handler(int sig)
@@ -657,7 +672,7 @@ igt_main
 			val = readval(junk->filp);
 			igt_assert(val >= 0);
 			junk++;
-		} while(junk->name != NULL);
+		} while (junk->name != NULL);
 
 		read_freqs(origfreqs);
 
@@ -679,9 +694,11 @@ igt_main
 	}
 
 	igt_subtest("waitboost")
-		waitboost(false);
-
-	igt_subtest("reset")
-		waitboost(true);
+		waitboost(drm_fd, false);
 
+	igt_subtest("reset") {
+		igt_hang_t hang = igt_allow_hang(drm_fd, 0, 0);
+		waitboost(drm_fd, true);
+		igt_disallow_hang(drm_fd, hang);
+	}
 }
-- 
2.13.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH i-g-t v7] pm_rps: Changes in waitboost scenario
  2017-08-30 13:05           ` [PATCH i-g-t v6] " Katarzyna Dec
@ 2017-08-30 13:21             ` Katarzyna Dec
  2017-08-31  7:40               ` [PATCH i-g-t v8] " Katarzyna Dec
  0 siblings, 1 reply; 34+ messages in thread
From: Katarzyna Dec @ 2017-08-30 13:21 UTC (permalink / raw)
  To: intel-gfx

CI is observing sporadical failures in pm_rps subtests.
There are a couple of reasons. One of them is the fact that
on gen6, gen7 and gen7.5, max frequency (as in the HW limit)
is not set to RP0, but the value obtaind from PCODE (which
may be different from RP0). Thus the test is operating under
wrong assumptions (SOFTMAX == RP0 == BOOST which is simply
not the case). Let's compare current frequency with BOOST
frequency rather than SOFTMAX to get the test behaviour under control.
In boost_freq function I set MAX freq to midium freqency, which ensures
that we for sure reach BOOST frequency. This could help with failures
with boost frequency failing to drop down.
GPU reset needs to be modified so we are not dependent on kernel's low
priority retire worker. Reset method was replaced by igt_force_gpu_reset()
and in reset testcase we make sure that we can recover from hang.

v2: Commit message, simplified waiting for boost to finish, drop
noisy whitespace cleanup.

v3: Removed reading from i915_rps_boost_info debugfs because it not
the same on every kernel. Removed function waiting for boost.
Instead of that I made sure we will reach in boost by setting MAX freq to fmid.

v4: Moved proposal with making test drm master to other patch

v5: Used igt_force_gpu_reset() to reset GPU. Modified "reset" testcase.

v6: Comments changes and update.

v7: Fixing typos

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jeff Mcgee <jeff.mcgee@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Jani Saarinen <jani.saarinen@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Reviewed-by: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Acked-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
---
 tests/pm_rps.c | 67 ++++++++++++++++++++++++++++++++++++----------------------
 1 file changed, 42 insertions(+), 25 deletions(-)

diff --git a/tests/pm_rps.c b/tests/pm_rps.c
index f0455e78..7b5ab94f 100644
--- a/tests/pm_rps.c
+++ b/tests/pm_rps.c
@@ -50,6 +50,7 @@ enum {
 	RP0,
 	RP1,
 	RPn,
+	BOOST,
 	NUMFREQ
 };
 
@@ -60,7 +61,7 @@ struct junk {
 	const char *mode;
 	FILE *filp;
 } stuff[] = {
-	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { NULL, NULL, NULL }
+	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { "boost", "rb+", NULL }, { NULL, NULL, NULL }
 };
 
 static int readval(FILE *filp)
@@ -167,7 +168,7 @@ static void dump(const int *freqs)
 }
 
 enum load {
-	LOW,
+	LOW = 0,
 	HIGH
 };
 
@@ -185,9 +186,10 @@ static struct load_helper {
 
 static void load_helper_signal_handler(int sig)
 {
-	if (sig == SIGUSR2)
-		lh.load = lh.load == LOW ? HIGH : LOW;
-	else
+	if (sig == SIGUSR2) {
+		lh.load = !lh.load;
+		igt_debug("Switching background load to %s\n", lh.load ? "high" : "low");
+	} else
 		lh.exit = true;
 }
 
@@ -238,6 +240,7 @@ static void load_helper_run(enum load load)
 		return;
 	}
 
+	lh.exit = false;
 	lh.load = load;
 
 	igt_fork_helper(&lh.igt_proc) {
@@ -263,6 +266,8 @@ static void load_helper_run(enum load load)
 		if (intel_gen(lh.devid) >= 6)
 			execbuf.flags = I915_EXEC_BLT;
 
+		igt_debug("Applying %s load...\n", lh.load ? "high" : "low");
+
 		while (!lh.exit) {
 			memset(&object, 0, sizeof(object));
 			object.handle = fences[val%3];
@@ -296,6 +301,12 @@ static void load_helper_run(enum load load)
 		gem_close(drm_fd, fences[0]);
 		gem_close(drm_fd, fences[1]);
 		gem_close(drm_fd, fences[2]);
+
+		/* Idle/boost logic is tided with request retirement.
+		 * Speed up detection of idle state and ensure deboost
+		 * after removing load.
+		 */
+		igt_drop_caches_set(drm_fd, DROP_RETIRE);
 	}
 }
 
@@ -553,38 +564,43 @@ static void stabilize_check(int *out)
 	igt_debug("Waited %d msec to stabilize cur\n", wait);
 }
 
-static void reset_gpu(void)
-{
-	int fd = drm_open_driver(DRIVER_INTEL);
-	igt_post_hang_ring(fd, igt_hang_ring(fd, I915_EXEC_DEFAULT));
-	close(fd);
-}
-
 static void boost_freq(int fd, int *boost_freqs)
 {
 	int64_t timeout = 1;
-	int ring = -1;
 	igt_spin_t *load;
+	unsigned int engine;
+	int fmid = (origfreqs[RPn] + origfreqs[RP0]) / 2;
 
-	load = igt_spin_batch_new(fd, ring, 0);
+	fmid = get_hw_rounded_freq(fmid);
+	/* set max freq to less then boost freq */
+	writeval(stuff[MAX].filp, fmid);
 
+	/* put boost on the same engine as low load */
+	engine = I915_EXEC_RENDER;
+	if (intel_gen(lh.devid) >= 6)
+		engine = I915_EXEC_BLT;
+	load = igt_spin_batch_new(fd, engine, 0);
 	/* Waiting will grant us a boost to maximum */
 	gem_wait(fd, load->handle, &timeout);
 
 	read_freqs(boost_freqs);
 	dump(boost_freqs);
 
+	/* Avoid downlocking till boost request is pending */
+	igt_spin_batch_end(load);
+	gem_sync(fd, load->handle);
 	igt_spin_batch_free(fd, load);
+
+	/* set max freq to original softmax */
+	writeval(stuff[MAX].filp, origfreqs[MAX]);
 }
 
-static void waitboost(bool reset)
+static void waitboost(int fd, bool reset)
 {
 	int pre_freqs[NUMFREQ];
 	int boost_freqs[NUMFREQ];
 	int post_freqs[NUMFREQ];
 
-	int fd = drm_open_driver(DRIVER_INTEL);
-
 	load_helper_run(LOW);
 
 	igt_debug("Apply low load...\n");
@@ -593,7 +609,7 @@ static void waitboost(bool reset)
 
 	if (reset) {
 		igt_debug("Reset gpu...\n");
-		reset_gpu();
+		igt_force_gpu_reset(fd);
 		sleep(1);
 	}
 
@@ -611,10 +627,9 @@ static void waitboost(bool reset)
 	idle_check();
 
 	igt_assert_lt(pre_freqs[CUR], pre_freqs[MAX]);
-	igt_assert_eq(boost_freqs[CUR], boost_freqs[MAX]);
+	igt_assert_eq(boost_freqs[CUR], boost_freqs[BOOST]);
 	igt_assert_lt(post_freqs[CUR], post_freqs[MAX]);
 
-	close(fd);
 }
 
 static void pm_rps_exit_handler(int sig)
@@ -657,7 +672,7 @@ igt_main
 			val = readval(junk->filp);
 			igt_assert(val >= 0);
 			junk++;
-		} while(junk->name != NULL);
+		} while (junk->name != NULL);
 
 		read_freqs(origfreqs);
 
@@ -679,9 +694,11 @@ igt_main
 	}
 
 	igt_subtest("waitboost")
-		waitboost(false);
-
-	igt_subtest("reset")
-		waitboost(true);
+		waitboost(drm_fd, false);
 
+	igt_subtest("reset") {
+		igt_hang_t hang = igt_allow_hang(drm_fd, 0, 0);
+		waitboost(drm_fd, true);
+		igt_disallow_hang(drm_fd, hang);
+	}
 }
-- 
2.13.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev8)
  2017-08-18  7:33 [PATCH i-g-t] pm_rps: Changes in waitboost scenario Katarzyna Dec
                   ` (9 preceding siblings ...)
  2017-08-29 10:27 ` ✗ Fi.CI.IGT: warning " Patchwork
@ 2017-08-30 13:28 ` Patchwork
  2017-08-30 13:45 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev9) Patchwork
                   ` (2 subsequent siblings)
  13 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2017-08-30 13:28 UTC (permalink / raw)
  To: Katarzyna Dec; +Cc: intel-gfx

== Series Details ==

Series: pm_rps: Changes in waitboost scenario (rev8)
URL   : https://patchwork.freedesktop.org/series/28966/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
fc6510887f8f45e18ca267e53eb564de043bd9d6 tools: Add intel_vbt_defs.h to Makefile.sources

with latest DRM-Tip kernel build CI_DRM_3018
6a305b78140a drm-tip: 2017y-08m-30d-08h-12m-34s UTC integration manifest

Test kms_cursor_legacy:
        Subgroup basic-busy-flip-before-cursor-legacy:
                fail       -> PASS       (fi-snb-2600) fdo#100215
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                dmesg-warn -> PASS       (fi-byt-j1900) fdo#101705

fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:458s
fi-bdw-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:441s
fi-blb-e6850     total:288  pass:224  dwarn:1   dfail:0   fail:0   skip:63  time:365s
fi-bsw-n3050     total:288  pass:243  dwarn:0   dfail:0   fail:0   skip:45  time:551s
fi-bwr-2160      total:288  pass:184  dwarn:0   dfail:0   fail:0   skip:104 time:255s
fi-bxt-j4205     total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:525s
fi-byt-j1900     total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:529s
fi-byt-n2820     total:288  pass:250  dwarn:1   dfail:0   fail:0   skip:37  time:517s
fi-elk-e7500     total:288  pass:230  dwarn:0   dfail:0   fail:0   skip:58  time:437s
fi-glk-2a        total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:614s
fi-hsw-4770      total:288  pass:263  dwarn:0   dfail:0   fail:0   skip:25  time:447s
fi-hsw-4770r     total:288  pass:263  dwarn:0   dfail:0   fail:0   skip:25  time:428s
fi-ilk-650       total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:432s
fi-ivb-3520m     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:507s
fi-ivb-3770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:476s
fi-kbl-7500u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:480s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:598s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:598s
fi-pnv-d510      total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:525s
fi-skl-6260u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:470s
fi-skl-6770hq    total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:483s
fi-skl-gvtdvm    total:288  pass:266  dwarn:0   dfail:0   fail:0   skip:22  time:446s
fi-skl-x1585l    total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:507s
fi-snb-2520m     total:288  pass:251  dwarn:0   dfail:0   fail:0   skip:37  time:555s
fi-snb-2600      total:288  pass:250  dwarn:0   dfail:0   fail:0   skip:38  time:406s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_124/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev9)
  2017-08-18  7:33 [PATCH i-g-t] pm_rps: Changes in waitboost scenario Katarzyna Dec
                   ` (10 preceding siblings ...)
  2017-08-30 13:28 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev8) Patchwork
@ 2017-08-30 13:45 ` Patchwork
  2017-08-30 14:53 ` ✗ Fi.CI.IGT: warning " Patchwork
  2017-08-31 13:03 ` ✗ Fi.CI.BAT: failure for pm_rps: Changes in waitboost scenario (rev10) Patchwork
  13 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2017-08-30 13:45 UTC (permalink / raw)
  To: Katarzyna Dec; +Cc: intel-gfx

== Series Details ==

Series: pm_rps: Changes in waitboost scenario (rev9)
URL   : https://patchwork.freedesktop.org/series/28966/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
fc6510887f8f45e18ca267e53eb564de043bd9d6 tools: Add intel_vbt_defs.h to Makefile.sources

with latest DRM-Tip kernel build CI_DRM_3018
6a305b78140a drm-tip: 2017y-08m-30d-08h-12m-34s UTC integration manifest

Test gem_ringfill:
        Subgroup basic-default-hang:
                dmesg-warn -> INCOMPLETE (fi-pnv-d510) fdo#101600
Test kms_cursor_legacy:
        Subgroup basic-busy-flip-before-cursor-atomic:
                pass       -> FAIL       (fi-snb-2600) fdo#100215 +1
Test kms_flip:
        Subgroup basic-flip-vs-modeset:
                pass       -> SKIP       (fi-skl-x1585l) fdo#101781

fdo#101600 https://bugs.freedesktop.org/show_bug.cgi?id=101600
fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215
fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781

fi-bdw-5557u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:461s
fi-bdw-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:443s
fi-blb-e6850     total:288  pass:224  dwarn:1   dfail:0   fail:0   skip:63  time:365s
fi-bsw-n3050     total:288  pass:243  dwarn:0   dfail:0   fail:0   skip:45  time:566s
fi-bwr-2160      total:288  pass:184  dwarn:0   dfail:0   fail:0   skip:104 time:253s
fi-bxt-j4205     total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:527s
fi-byt-j1900     total:288  pass:254  dwarn:1   dfail:0   fail:0   skip:33  time:528s
fi-byt-n2820     total:288  pass:250  dwarn:1   dfail:0   fail:0   skip:37  time:527s
fi-elk-e7500     total:288  pass:230  dwarn:0   dfail:0   fail:0   skip:58  time:434s
fi-glk-2a        total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:624s
fi-hsw-4770      total:288  pass:263  dwarn:0   dfail:0   fail:0   skip:25  time:451s
fi-hsw-4770r     total:288  pass:263  dwarn:0   dfail:0   fail:0   skip:25  time:425s
fi-ilk-650       total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:427s
fi-ivb-3520m     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:509s
fi-ivb-3770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:472s
fi-kbl-7500u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:483s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:597s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:601s
fi-pnv-d510      total:156  pass:113  dwarn:0   dfail:0   fail:0   skip:42 
fi-skl-6260u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:474s
fi-skl-6700k     total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:567s
fi-skl-6770hq    total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:492s
fi-skl-gvtdvm    total:288  pass:266  dwarn:0   dfail:0   fail:0   skip:22  time:439s
fi-skl-x1585l    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:483s
fi-snb-2520m     total:288  pass:251  dwarn:0   dfail:0   fail:0   skip:37  time:553s
fi-snb-2600      total:288  pass:249  dwarn:0   dfail:0   fail:1   skip:38  time:411s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_125/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* ✗ Fi.CI.IGT: warning for pm_rps: Changes in waitboost scenario (rev9)
  2017-08-18  7:33 [PATCH i-g-t] pm_rps: Changes in waitboost scenario Katarzyna Dec
                   ` (11 preceding siblings ...)
  2017-08-30 13:45 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev9) Patchwork
@ 2017-08-30 14:53 ` Patchwork
  2017-08-31 13:03 ` ✗ Fi.CI.BAT: failure for pm_rps: Changes in waitboost scenario (rev10) Patchwork
  13 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2017-08-30 14:53 UTC (permalink / raw)
  To: Katarzyna Dec; +Cc: intel-gfx

== Series Details ==

Series: pm_rps: Changes in waitboost scenario (rev9)
URL   : https://patchwork.freedesktop.org/series/28966/
State : warning

== Summary ==

Test pm_rps:
        Subgroup reset:
                fail       -> PASS       (shard-hsw) fdo#102250 +1
Test kms_plane_multiple:
        Subgroup legacy-pipe-E-tiling-y:
                incomplete -> SKIP       (shard-hsw)
Test kms_busy:
        Subgroup extended-modeset-hang-newfb-with-reset-render-C:
                pass       -> DMESG-WARN (shard-hsw) fdo#102249
Test kms_plane:
        Subgroup plane-position-hole-dpms-pipe-C-planes:
                skip       -> PASS       (shard-hsw)
        Subgroup plane-panning-bottom-right-suspend-pipe-B-planes:
                pass       -> SKIP       (shard-hsw)
Test kms_properties:
        Subgroup plane-properties-legacy:
                skip       -> PASS       (shard-hsw)
Test kms_setmode:
        Subgroup basic:
                pass       -> FAIL       (shard-hsw) fdo#99912
Test kms_plane_lowres:
        Subgroup pipe-A-tiling-none:
                pass       -> SKIP       (shard-hsw)
Test kms_fbc_crc:
        Subgroup page_flip_and_mmap_cpu:
                pass       -> SKIP       (shard-hsw)
Test kms_flip:
        Subgroup plain-flip-fb-recreate-interruptible:
                fail       -> PASS       (shard-hsw)
Test kms_atomic_transition:
        Subgroup plane-all-transition-fencing:
                skip       -> PASS       (shard-hsw)
Test vgem_basic:
        Subgroup unload:
                skip       -> PASS       (shard-hsw) fdo#102453

fdo#102250 https://bugs.freedesktop.org/show_bug.cgi?id=102250
fdo#102249 https://bugs.freedesktop.org/show_bug.cgi?id=102249
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#102453 https://bugs.freedesktop.org/show_bug.cgi?id=102453

shard-hsw        total:2265 pass:1227 dwarn:1   dfail:0   fail:17  skip:1020 time:9512s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_125/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH i-g-t v8] pm_rps: Changes in waitboost scenario
  2017-08-30 13:21             ` [PATCH i-g-t v7] " Katarzyna Dec
@ 2017-08-31  7:40               ` Katarzyna Dec
  0 siblings, 0 replies; 34+ messages in thread
From: Katarzyna Dec @ 2017-08-31  7:40 UTC (permalink / raw)
  To: intel-gfx

CI is observing sporadical failures in pm_rps subtests.
There are a couple of reasons. One of them is the fact that
on gen6, gen7 and gen7.5, max frequency (as in the HW limit)
is not set to RP0, but the value obtaind from PCODE (which
may be different from RP0). Thus the test is operating under
wrong assumptions (SOFTMAX == RP0 == BOOST which is simply
not the case). Let's compare current frequency with BOOST
frequency rather than SOFTMAX to get the test behaviour under control.
In boost_freq function I set MAX freq to medium freqency, which ensures
that we for sure reach BOOST frequency. This could help with failures
with boost frequency failing to drop down.
Additionally GPU reset needs to be modified so we are not dependent
on kernel's low priority retire worker. Reset method was replaced by
igt_force_gpu_reset() and in reset testcase we make sure that we can
recover from hang.

v2: Commit message, simplified waiting for boost to finish, drop
noisy whitespace cleanup.

v3: Removed reading from i915_rps_boost_info debugfs because it not
the same on every kernel. Removed function waiting for boost.
Instead of that I made sure we will reach in boost by setting MAX freq to fmid.

v4: Moved proposal with making test drm master to other patch

v5: Used igt_force_gpu_reset() to reset GPU. Modified "reset" testcase.

v6: Comments changes and update.

v7: Fixing typos

v8: Fixing another typos in comments and commit msg

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jeff Mcgee <jeff.mcgee@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Jani Saarinen <jani.saarinen@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Reviewed-by: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Acked-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
---
 tests/pm_rps.c | 67 ++++++++++++++++++++++++++++++++++++----------------------
 1 file changed, 42 insertions(+), 25 deletions(-)

diff --git a/tests/pm_rps.c b/tests/pm_rps.c
index f0455e78..e79f0ea7 100644
--- a/tests/pm_rps.c
+++ b/tests/pm_rps.c
@@ -50,6 +50,7 @@ enum {
 	RP0,
 	RP1,
 	RPn,
+	BOOST,
 	NUMFREQ
 };
 
@@ -60,7 +61,7 @@ struct junk {
 	const char *mode;
 	FILE *filp;
 } stuff[] = {
-	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { NULL, NULL, NULL }
+	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { "boost", "rb+", NULL }, { NULL, NULL, NULL }
 };
 
 static int readval(FILE *filp)
@@ -167,7 +168,7 @@ static void dump(const int *freqs)
 }
 
 enum load {
-	LOW,
+	LOW = 0,
 	HIGH
 };
 
@@ -185,9 +186,10 @@ static struct load_helper {
 
 static void load_helper_signal_handler(int sig)
 {
-	if (sig == SIGUSR2)
-		lh.load = lh.load == LOW ? HIGH : LOW;
-	else
+	if (sig == SIGUSR2) {
+		lh.load = !lh.load;
+		igt_debug("Switching background load to %s\n", lh.load ? "high" : "low");
+	} else
 		lh.exit = true;
 }
 
@@ -238,6 +240,7 @@ static void load_helper_run(enum load load)
 		return;
 	}
 
+	lh.exit = false;
 	lh.load = load;
 
 	igt_fork_helper(&lh.igt_proc) {
@@ -263,6 +266,8 @@ static void load_helper_run(enum load load)
 		if (intel_gen(lh.devid) >= 6)
 			execbuf.flags = I915_EXEC_BLT;
 
+		igt_debug("Applying %s load...\n", lh.load ? "high" : "low");
+
 		while (!lh.exit) {
 			memset(&object, 0, sizeof(object));
 			object.handle = fences[val%3];
@@ -296,6 +301,12 @@ static void load_helper_run(enum load load)
 		gem_close(drm_fd, fences[0]);
 		gem_close(drm_fd, fences[1]);
 		gem_close(drm_fd, fences[2]);
+
+		/* Idle/boost logic is tied with request retirement.
+		 * Speed up detection of idle state and ensure deboost
+		 * after removing load.
+		 */
+		igt_drop_caches_set(drm_fd, DROP_RETIRE);
 	}
 }
 
@@ -553,38 +564,43 @@ static void stabilize_check(int *out)
 	igt_debug("Waited %d msec to stabilize cur\n", wait);
 }
 
-static void reset_gpu(void)
-{
-	int fd = drm_open_driver(DRIVER_INTEL);
-	igt_post_hang_ring(fd, igt_hang_ring(fd, I915_EXEC_DEFAULT));
-	close(fd);
-}
-
 static void boost_freq(int fd, int *boost_freqs)
 {
 	int64_t timeout = 1;
-	int ring = -1;
 	igt_spin_t *load;
+	unsigned int engine;
+	int fmid = (origfreqs[RPn] + origfreqs[RP0]) / 2;
 
-	load = igt_spin_batch_new(fd, ring, 0);
+	fmid = get_hw_rounded_freq(fmid);
+	/* Set max freq to less then boost freq */
+	writeval(stuff[MAX].filp, fmid);
 
+	/* Put boost on the same engine as low load */
+	engine = I915_EXEC_RENDER;
+	if (intel_gen(lh.devid) >= 6)
+		engine = I915_EXEC_BLT;
+	load = igt_spin_batch_new(fd, engine, 0);
 	/* Waiting will grant us a boost to maximum */
 	gem_wait(fd, load->handle, &timeout);
 
 	read_freqs(boost_freqs);
 	dump(boost_freqs);
 
+	/* Avoid downlocking till boost request is pending */
+	igt_spin_batch_end(load);
+	gem_sync(fd, load->handle);
 	igt_spin_batch_free(fd, load);
+
+	/* Set max freq to original softmax */
+	writeval(stuff[MAX].filp, origfreqs[MAX]);
 }
 
-static void waitboost(bool reset)
+static void waitboost(int fd, bool reset)
 {
 	int pre_freqs[NUMFREQ];
 	int boost_freqs[NUMFREQ];
 	int post_freqs[NUMFREQ];
 
-	int fd = drm_open_driver(DRIVER_INTEL);
-
 	load_helper_run(LOW);
 
 	igt_debug("Apply low load...\n");
@@ -593,7 +609,7 @@ static void waitboost(bool reset)
 
 	if (reset) {
 		igt_debug("Reset gpu...\n");
-		reset_gpu();
+		igt_force_gpu_reset(fd);
 		sleep(1);
 	}
 
@@ -611,10 +627,9 @@ static void waitboost(bool reset)
 	idle_check();
 
 	igt_assert_lt(pre_freqs[CUR], pre_freqs[MAX]);
-	igt_assert_eq(boost_freqs[CUR], boost_freqs[MAX]);
+	igt_assert_eq(boost_freqs[CUR], boost_freqs[BOOST]);
 	igt_assert_lt(post_freqs[CUR], post_freqs[MAX]);
 
-	close(fd);
 }
 
 static void pm_rps_exit_handler(int sig)
@@ -657,7 +672,7 @@ igt_main
 			val = readval(junk->filp);
 			igt_assert(val >= 0);
 			junk++;
-		} while(junk->name != NULL);
+		} while (junk->name != NULL);
 
 		read_freqs(origfreqs);
 
@@ -679,9 +694,11 @@ igt_main
 	}
 
 	igt_subtest("waitboost")
-		waitboost(false);
-
-	igt_subtest("reset")
-		waitboost(true);
+		waitboost(drm_fd, false);
 
+	igt_subtest("reset") {
+		igt_hang_t hang = igt_allow_hang(drm_fd, 0, 0);
+		waitboost(drm_fd, true);
+		igt_disallow_hang(drm_fd, hang);
+	}
 }
-- 
2.13.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* ✗ Fi.CI.BAT: failure for pm_rps: Changes in waitboost scenario (rev10)
  2017-08-18  7:33 [PATCH i-g-t] pm_rps: Changes in waitboost scenario Katarzyna Dec
                   ` (12 preceding siblings ...)
  2017-08-30 14:53 ` ✗ Fi.CI.IGT: warning " Patchwork
@ 2017-08-31 13:03 ` Patchwork
  2017-08-31 14:31   ` Arkadiusz Hiler
  13 siblings, 1 reply; 34+ messages in thread
From: Patchwork @ 2017-08-31 13:03 UTC (permalink / raw)
  To: Katarzyna Dec; +Cc: intel-gfx

== Series Details ==

Series: pm_rps: Changes in waitboost scenario (rev10)
URL   : https://patchwork.freedesktop.org/series/28966/
State : failure

== Summary ==

IGT patchset tested on top of latest successful build
c2159678d283fea5615ec8e846a51cf4954ac82d tests/perf: add Geminilake support

with latest DRM-Tip kernel build CI_DRM_3021
c399d43adc55 drm-tip: 2017y-08m-31d-07h-25m-28s UTC integration manifest

Test kms_busy:
        Subgroup basic-flip-a:
                pass       -> FAIL       (fi-bwr-2160)
Test kms_cursor_legacy:
        Subgroup basic-busy-flip-before-cursor-atomic:
                pass       -> FAIL       (fi-snb-2600) fdo#100215
        Subgroup basic-flip-after-cursor-varying-size:
                pass       -> FAIL       (fi-hsw-4770) fdo#102402 +1

fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215
fdo#102402 https://bugs.freedesktop.org/show_bug.cgi?id=102402

fi-bdw-5557u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:460s
fi-bdw-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:439s
fi-blb-e6850     total:288  pass:224  dwarn:1   dfail:0   fail:0   skip:63  time:364s
fi-bsw-n3050     total:288  pass:243  dwarn:0   dfail:0   fail:0   skip:45  time:567s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:1   skip:104 time:254s
fi-bxt-j4205     total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:527s
fi-byt-j1900     total:288  pass:254  dwarn:1   dfail:0   fail:0   skip:33  time:526s
fi-byt-n2820     total:288  pass:250  dwarn:1   dfail:0   fail:0   skip:37  time:525s
fi-elk-e7500     total:288  pass:230  dwarn:0   dfail:0   fail:0   skip:58  time:438s
fi-glk-2a        total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:616s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:2   skip:25  time:469s
fi-hsw-4770r     total:288  pass:263  dwarn:0   dfail:0   fail:0   skip:25  time:424s
fi-ilk-650       total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:429s
fi-ivb-3520m     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:509s
fi-ivb-3770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:476s
fi-kbl-7500u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:481s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:598s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:596s
fi-pnv-d510      total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:530s
fi-skl-6260u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:472s
fi-skl-6700k     total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:538s
fi-skl-6770hq    total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:491s
fi-skl-gvtdvm    total:288  pass:266  dwarn:0   dfail:0   fail:0   skip:22  time:442s
fi-skl-x1585l    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:490s
fi-snb-2520m     total:288  pass:251  dwarn:0   dfail:0   fail:0   skip:37  time:550s
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:2   skip:38  time:404s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_130/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: ✗ Fi.CI.BAT:  failure for pm_rps: Changes in waitboost scenario (rev10)
  2017-08-31 13:03 ` ✗ Fi.CI.BAT: failure for pm_rps: Changes in waitboost scenario (rev10) Patchwork
@ 2017-08-31 14:31   ` Arkadiusz Hiler
  0 siblings, 0 replies; 34+ messages in thread
From: Arkadiusz Hiler @ 2017-08-31 14:31 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter, Katarzyna Dec

On Thu, Aug 31, 2017 at 01:03:24PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: pm_rps: Changes in waitboost scenario (rev10)
> URL   : https://patchwork.freedesktop.org/series/28966/
> State : failure
> 
> == Summary ==
> 
> IGT patchset tested on top of latest successful build
> c2159678d283fea5615ec8e846a51cf4954ac82d tests/perf: add Geminilake support
> 
> with latest DRM-Tip kernel build CI_DRM_3021
> c399d43adc55 drm-tip: 2017y-08m-31d-07h-25m-28s UTC integration manifest
> 
> Test kms_busy:
>         Subgroup basic-flip-a:
>                 pass       -> FAIL       (fi-bwr-2160)

That's not caused by the series (PW's rev10 == PATCH v8).

v7 and v8 do not change anything in the code, only comments and commit
messages are amended.

Filtering the CI noise from all the runs the patch had - it healthy and
it also gets rid of a flipflop we had.

Merged with minor commit message reformatting.

Thanks for the patch and reviews!

-- 
Cheers,
Arek

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 34+ messages in thread

end of thread, other threads:[~2017-08-31 14:31 UTC | newest]

Thread overview: 34+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-08-18  7:33 [PATCH i-g-t] pm_rps: Changes in waitboost scenario Katarzyna Dec
2017-08-18  7:57 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-08-18 11:08 ` [PATCH i-g-t v2] " Katarzyna Dec
2017-08-18 13:45   ` Chris Wilson
2017-08-18 20:28     ` Daniel Vetter
2017-08-18 20:42       ` Chris Wilson
2017-08-21  8:29         ` Dec, Katarzyna
2017-08-21  8:53           ` Chris Wilson
2017-08-21 10:43             ` Dec, Katarzyna
2017-08-21 11:29               ` Chris Wilson
2017-08-18 13:47   ` Chris Wilson
2017-08-21 13:50   ` [PATCH i-g-t v3] " Katarzyna Dec
2017-08-22 12:40     ` Katarzyna Dec
2017-08-24  9:44       ` Chris Wilson
2017-08-28  8:50       ` [PATCH i-g-t v4] " Katarzyna Dec
2017-08-29  7:43         ` Szwichtenberg, Radoslaw
2017-08-29  8:30           ` Daniel Vetter
2017-08-29  8:57         ` [PATCH i-g-t v5] " Katarzyna Dec
2017-08-30 13:05           ` [PATCH i-g-t v6] " Katarzyna Dec
2017-08-30 13:21             ` [PATCH i-g-t v7] " Katarzyna Dec
2017-08-31  7:40               ` [PATCH i-g-t v8] " Katarzyna Dec
2017-08-18 13:22 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev2) Patchwork
2017-08-18 13:38 ` [PATCH i-g-t] pm_rps: Changes in waitboost scenario Chris Wilson
2017-08-21 14:22 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev3) Patchwork
2017-08-22 13:00 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev4) Patchwork
2017-08-28  9:09 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev6) Patchwork
2017-08-28 10:20 ` ✗ Fi.CI.IGT: warning " Patchwork
2017-08-29  9:16 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev7) Patchwork
2017-08-29 10:27 ` ✗ Fi.CI.IGT: warning " Patchwork
2017-08-30 13:28 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev8) Patchwork
2017-08-30 13:45 ` ✓ Fi.CI.BAT: success for pm_rps: Changes in waitboost scenario (rev9) Patchwork
2017-08-30 14:53 ` ✗ Fi.CI.IGT: warning " Patchwork
2017-08-31 13:03 ` ✗ Fi.CI.BAT: failure for pm_rps: Changes in waitboost scenario (rev10) Patchwork
2017-08-31 14:31   ` Arkadiusz Hiler

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