From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Hemminger Subject: Re: [PATCH v4 3/3] igb_uio: MSI IRQ mode Date: Thu, 31 Aug 2017 08:32:07 -0700 Message-ID: <20170831083207.3a95c3a7@xeon-e3> References: <1503408514-20079-1-git-send-email-markus.theil@tu-ilmenau.de> <1504174949-25656-1-git-send-email-markus.theil@tu-ilmenau.de> <1504174949-25656-3-git-send-email-markus.theil@tu-ilmenau.de> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: dev@dpdk.org, ferruh.yigit@intel.com To: Markus Theil Return-path: Received: from mail-pg0-f52.google.com (mail-pg0-f52.google.com [74.125.83.52]) by dpdk.org (Postfix) with ESMTP id 15289968 for ; Thu, 31 Aug 2017 17:32:11 +0200 (CEST) Received: by mail-pg0-f52.google.com with SMTP id r133so2933581pgr.3 for ; Thu, 31 Aug 2017 08:32:10 -0700 (PDT) In-Reply-To: <1504174949-25656-3-git-send-email-markus.theil@tu-ilmenau.de> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Thu, 31 Aug 2017 12:22:29 +0200 Markus Theil wrote: > +/* > + * It masks the msi on/off of generating MSI messages. > + */ > +static void > +igbuio_msi_mask_irq(struct pci_dev *pdev, struct msi_desc *desc, int32_t state) > +{ > + u32 mask_bits = desc->masked; > + u32 offset = desc->irq - pdev->irq; > + u32 mask = 1 << offset; > + u32 flag = !!state << offset; > + > + if (!desc->msi_attrib.maskbit) > + return; > + > + mask_bits &= ~mask; > + mask_bits |= flag; > + > + if (mask_bits != desc->masked) { > + pci_write_config_dword(pdev, desc->mask_pos, mask_bits); > + desc->masked = mask_bits; > + } > +} > + Why not use the existing kernel API pci_msi_mask_irq()?