From mboxrd@z Thu Jan 1 00:00:00 1970 From: Zhiqiang Hou Date: Mon, 4 Sep 2017 10:47:52 +0800 Subject: [U-Boot] [PATCH 1/3] armv8: ls1088a: fix the MMU table for pcie config space In-Reply-To: <20170904024754.34064-1-Zhiqiang.Hou@nxp.com> References: <20170904024754.34064-1-Zhiqiang.Hou@nxp.com> Message-ID: <20170904024754.34064-2-Zhiqiang.Hou@nxp.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Hou Zhiqiang The pcie config space of ls1088a is different from ls2080a. Signed-off-by: Hou Zhiqiang --- arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index ffc5fa2636..7cae17246d 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -107,10 +107,16 @@ #define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000) #define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_IMMR + 0x2600000) #define CONFIG_SYS_PCIE4_ADDR (CONFIG_SYS_IMMR + 0x2700000) +#ifdef CONFIG_ARCH_LS1088A +#define CONFIG_SYS_PCIE1_PHYS_ADDR 0x2000000000ULL +#define CONFIG_SYS_PCIE2_PHYS_ADDR 0x2800000000ULL +#define CONFIG_SYS_PCIE3_PHYS_ADDR 0x3000000000ULL +#else #define CONFIG_SYS_PCIE1_PHYS_ADDR 0x1000000000ULL #define CONFIG_SYS_PCIE2_PHYS_ADDR 0x1200000000ULL #define CONFIG_SYS_PCIE3_PHYS_ADDR 0x1400000000ULL #define CONFIG_SYS_PCIE4_PHYS_ADDR 0x1600000000ULL +#endif /* Device Configuration */ #define DCFG_BASE 0x01e00000 -- 2.14.1