From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wenyou Yang Date: Wed, 6 Sep 2017 13:23:41 +0800 Subject: [U-Boot] [PATCH v4 10/12] ARM: at91: mach: Add missing defines of MPDDRC In-Reply-To: <20170906052343.17989-1-wenyou.yang@microchip.com> References: <20170906052343.17989-1-wenyou.yang@microchip.com> Message-ID: <20170906052343.17989-11-wenyou.yang@microchip.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Add missing defines of Multiport DDR-SDRAM Controller (MPDDRC). Signed-off-by: Wenyou Yang Reviewed-by: Simon Glass --- Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/mach-at91/include/mach/atmel_mpddrc.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-at91/include/mach/atmel_mpddrc.h b/arch/arm/mach-at91/include/mach/atmel_mpddrc.h index 803501f5cf..40e1cf0a0a 100644 --- a/arch/arm/mach-at91/include/mach/atmel_mpddrc.h +++ b/arch/arm/mach-at91/include/mach/atmel_mpddrc.h @@ -96,6 +96,10 @@ int ddr3_init(const unsigned int base, #define ATMEL_MPDDRC_CR_DLL_RESET_ENABLED (0x1 << 7) #define ATMEL_MPDDRC_CR_DIC_DS (0x1 << 8) #define ATMEL_MPDDRC_CR_DIS_DLL (0x1 << 9) +#define ATMEL_MPDDRC_CR_ZQ_INIT (0x0 << 10) +#define ATMEL_MPDDRC_CR_ZQ_LONG (0x1 << 10) +#define ATMEL_MPDDRC_CR_ZQ_SHORT (0x2 << 10) +#define ATMEL_MPDDRC_CR_ZQ_RESET (0x3 << 10) #define ATMEL_MPDDRC_CR_OCD_DEFAULT (0x7 << 12) #define ATMEL_MPDDRC_CR_DQMS_SHARED (0x1 << 16) #define ATMEL_MPDDRC_CR_ENRDM_ON (0x1 << 17) -- 2.13.0