On Mon, 11 Sep 2017 19:12:18 +0200 Cédric Le Goater wrote: > The sPAPR machine first starts with a XICS interrupt model and > depending on the guest capabilities, the XIVE exploitation mode is > negotiated during CAS. A reset should then be performed to rebuild the > device tree but the same IRQ numbers which were allocated by the > devices prior to reset, when the XICS model was operating, are still > in use. > > For this purpose, we need a common IRQ number allocator for both the > interrupt models: XICS legacy or XIVE exploitation. This is what the > ICSIRQState array of the XICS interrupt source is used for. It also > contains the LSI/MSI flag of an interrupt which will we need later on. > > So, let's provide a link to the sPAPR ICS object under XIVE to make > use of it. > > Signed-off-by: Cédric Le Goater > --- > hw/intc/spapr_xive.c | 12 ++++++++++++ > include/hw/ppc/spapr_xive.h | 4 ++++ > 2 files changed, 16 insertions(+) > > diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c > index 6d98528fae68..1681affb0848 100644 > --- a/hw/intc/spapr_xive.c > +++ b/hw/intc/spapr_xive.c > @@ -56,6 +56,8 @@ void spapr_xive_reset(void *dev) > static void spapr_xive_realize(DeviceState *dev, Error **errp) > { > sPAPRXive *xive = SPAPR_XIVE(dev); > + Object *obj; > + Error *err = NULL; > > if (!xive->nr_targets) { > error_setg(errp, "Number of interrupt targets needs to be greater 0"); > @@ -68,6 +70,16 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) > return; > } > > + /* Retrieve SPAPR ICS source to share the IRQ number allocator */ > + obj = object_property_get_link(OBJECT(dev), "ics", &err); > + if (!obj) { > + error_setg(errp, "%s: required link 'ics' not found: %s", > + __func__, error_get_pretty(err)); > + return; err is leaked if you do this way. Please do this instead: error_propagate(errp, err); error_prepend(errp, "required link 'ics' not found: "); Note: I've just sent a patch to fix the same error in XICS :) > + } > + > + xive->ics = ICS_BASE(obj); > + > /* Allocate SBEs (State Bit Entry). 2 bits, so 4 entries per byte */ > xive->sbe_size = DIV_ROUND_UP(xive->nr_irqs, 4); > xive->sbe = g_malloc0(xive->sbe_size); > diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h > index b17dd4f17b0b..29112589b37f 100644 > --- a/include/hw/ppc/spapr_xive.h > +++ b/include/hw/ppc/spapr_xive.h > @@ -24,6 +24,7 @@ > typedef struct sPAPRXive sPAPRXive; > typedef struct XiveIVE XiveIVE; > typedef struct XiveEQ XiveEQ; > +typedef struct ICSState ICSState; > > #define TYPE_SPAPR_XIVE "spapr-xive" > #define SPAPR_XIVE(obj) OBJECT_CHECK(sPAPRXive, (obj), TYPE_SPAPR_XIVE) > @@ -35,6 +36,9 @@ struct sPAPRXive { > uint32_t nr_targets; > uint32_t nr_irqs; > > + /* IRQ */ > + ICSState *ics; /* XICS source inherited from the SPAPR machine */ > + > /* XIVE internal tables */ > uint8_t *sbe; > uint32_t sbe_size;