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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Ingo Molnar <mingo@kernel.org>, Peter Anvin <hpa@zytor.com>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Borislav Petkov <bp@alien8.de>, Chen Yu <yu.c.chen@intel.com>,
	Rui Zhang <rui.zhang@intel.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Len Brown <lenb@kernel.org>,
	Dan Williams <dan.j.williams@intel.com>,
	Christoph Hellwig <hch@lst.de>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Joerg Roedel <joro@8bytes.org>,
	Boris Ostrovsky <boris.ostrovsky@oracle.com>,
	Juergen Gross <jgross@suse.com>, Tony Luck <tony.luck@intel.com>,
	"K. Y. Srinivasan" <kys@microsoft.com>,
	Alok Kataria <akataria@vmware.com>,
	Steven Rostedt <rostedt@goodmis.org>,
	Arjan van de Ven <arjan@linux.intel.com>
Subject: [patch 43/52] x86/vector: Untangle internal state from irq_cfg
Date: Wed, 13 Sep 2017 23:29:45 +0200	[thread overview]
Message-ID: <20170913213155.683712356@linutronix.de> (raw)
In-Reply-To: 20170913212902.530704676@linutronix.de

[-- Attachment #1: x86-vector--Untangle-internal-state-from-irq_cfg.patch --]
[-- Type: text/plain, Size: 9619 bytes --]

The vector management state is not required to live in irq_cfg. irq_cfg is
only relevant for the depending irq domains (IOAPIC, DMAR, MSI ...).

The seperation of the vector management status allows to direct a shut down
interrupt to a special shutdown vector w/o confusing the internal state of
the vector management.

Preparatory change for the rework of managed interrupts and the global
vector reservation scheme.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/hw_irq.h |    3 -
 arch/x86/kernel/apic/vector.c |   88 ++++++++++++++++++++++--------------------
 2 files changed, 49 insertions(+), 42 deletions(-)

--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -124,8 +124,7 @@ struct irq_alloc_info {
 
 struct irq_cfg {
 	unsigned int		dest_apicid;
-	u8			vector;
-	u8			old_vector;
+	unsigned int		vector;
 };
 
 extern struct irq_cfg *irq_cfg(unsigned int irq);
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -25,7 +25,9 @@
 #include <asm/trace/irq_vectors.h>
 
 struct apic_chip_data {
-	struct irq_cfg		cfg;
+	struct irq_cfg		hw_irq_cfg;
+	unsigned int		vector;
+	unsigned int		prev_vector;
 	unsigned int		cpu;
 	unsigned int		prev_cpu;
 	unsigned int		irq;
@@ -86,7 +88,7 @@ struct irq_cfg *irqd_cfg(struct irq_data
 {
 	struct apic_chip_data *apicd = apic_chip_data(irqd);
 
-	return apicd ? &apicd->cfg : NULL;
+	return apicd ? &apicd->hw_irq_cfg : NULL;
 }
 EXPORT_SYMBOL_GPL(irqd_cfg);
 
@@ -110,16 +112,18 @@ static void free_apic_chip_data(struct a
 	kfree(apicd);
 }
 
-static void apic_update_irq_cfg(struct irq_data *irqd)
+static void apic_update_irq_cfg(struct irq_data *irqd, unsigned int vector,
+				unsigned int cpu)
 {
 	struct apic_chip_data *apicd = apic_chip_data(irqd);
 
 	lockdep_assert_held(&vector_lock);
 
-	apicd->cfg.dest_apicid = apic->calc_dest_apicid(apicd->cpu);
-	irq_data_update_effective_affinity(irqd, cpumask_of(apicd->cpu));
-	trace_vector_config(irqd->irq, apicd->cfg.vector, apicd->cpu,
-			    apicd->cfg.dest_apicid);
+	apicd->hw_irq_cfg.vector = vector;
+	apicd->hw_irq_cfg.dest_apicid = apic->calc_dest_apicid(cpu);
+	irq_data_update_effective_affinity(irqd, cpumask_of(cpu));
+	trace_vector_config(irqd->irq, vector, cpu,
+			    apicd->hw_irq_cfg.dest_apicid);
 }
 
 static void apic_update_vector(struct irq_data *irqd, unsigned int newvec,
@@ -130,19 +134,19 @@ static void apic_update_vector(struct ir
 
 	lockdep_assert_held(&vector_lock);
 
-	trace_vector_update(irqd->irq, newvec, newcpu, apicd->cfg.vector,
+	trace_vector_update(irqd->irq, newvec, newcpu, apicd->vector,
 			    apicd->cpu);
 
 	/* Setup the vector move, if required  */
-	if (apicd->cfg.vector && cpu_online(apicd->cpu)) {
+	if (apicd->vector && cpu_online(apicd->cpu)) {
 		apicd->move_in_progress = true;
-		apicd->cfg.old_vector = apicd->cfg.vector;
+		apicd->prev_vector = apicd->vector;
 		apicd->prev_cpu = apicd->cpu;
 	} else {
-		apicd->cfg.old_vector = 0;
+		apicd->prev_vector = 0;
 	}
 
-	apicd->cfg.vector = newvec;
+	apicd->vector = newvec;
 	apicd->cpu = newcpu;
 	BUG_ON(!IS_ERR_OR_NULL(per_cpu(vector_irq, newcpu)[newvec]));
 	per_cpu(vector_irq, newcpu)[newvec] = desc;
@@ -151,8 +155,10 @@ static void apic_update_vector(struct ir
 static int allocate_vector(struct irq_data *irqd, const struct cpumask *dest)
 {
 	struct apic_chip_data *apicd = apic_chip_data(irqd);
-	int vector = apicd->cfg.vector;
 	unsigned int cpu = apicd->cpu;
+	int vector = apicd->vector;
+
+	lockdep_assert_held(&vector_lock);
 
 	/*
 	 * If the current target CPU is online and in the new requested
@@ -172,12 +178,13 @@ static int allocate_vector(struct irq_da
 static int assign_vector_locked(struct irq_data *irqd,
 				const struct cpumask *dest)
 {
+	struct apic_chip_data *apicd = apic_chip_data(irqd);
 	int vector = allocate_vector(irqd, dest);
 
 	if (vector < 0)
 		return vector;
 
-	apic_update_irq_cfg(irqd);
+	apic_update_irq_cfg(irqd, apicd->vector, apicd->cpu);
 	return 0;
 }
 
@@ -207,27 +214,28 @@ static int assign_irq_vector_policy(stru
 static void clear_irq_vector(struct irq_data *irqd)
 {
 	struct apic_chip_data *apicd = apic_chip_data(irqd);
-	unsigned int vector = apicd->cfg.vector;
+	unsigned int vector = apicd->vector;
 
 	lockdep_assert_held(&vector_lock);
+
 	if (!vector)
 		return;
 
-	trace_vector_clear(irqd->irq, vector, apicd->cpu, apicd->cfg.old_vector,
+	trace_vector_clear(irqd->irq, vector, apicd->cpu, apicd->prev_vector,
 			   apicd->prev_cpu);
 
 	per_cpu(vector_irq, apicd->cpu)[vector] = VECTOR_UNUSED;
 	irq_matrix_free(vector_matrix, apicd->cpu, vector, false);
-	apicd->cfg.vector = 0;
+	apicd->vector = 0;
 
 	/* Clean up move in progress */
-	vector = apicd->cfg.old_vector;
+	vector = apicd->prev_vector;
 	if (!vector)
 		return;
 
 	per_cpu(vector_irq, apicd->prev_cpu)[vector] = VECTOR_UNUSED;
 	irq_matrix_free(vector_matrix, apicd->prev_cpu, vector, false);
-	apicd->cfg.old_vector = 0;
+	apicd->prev_vector = 0;
 	apicd->move_in_progress = 0;
 	hlist_del_init(&apicd->clist);
 }
@@ -293,11 +301,11 @@ static int x86_vector_alloc_irqs(struct
 		 * config.
 		 */
 		if (info->flags & X86_IRQ_ALLOC_LEGACY) {
-			apicd->cfg.vector = ISA_IRQ_VECTOR(virq + i);
+			apicd->vector = ISA_IRQ_VECTOR(virq + i);
 			apicd->cpu = 0;
 			trace_vector_setup(virq + i, true, 0);
 			raw_spin_lock_irqsave(&vector_lock, flags);
-			apic_update_irq_cfg(irqd);
+			apic_update_irq_cfg(irqd, apicd->vector, apicd->cpu);
 			raw_spin_unlock_irqrestore(&vector_lock, flags);
 			continue;
 		}
@@ -319,7 +327,7 @@ static int x86_vector_alloc_irqs(struct
 void x86_vector_debug_show(struct seq_file *m, struct irq_domain *d,
 			   struct irq_data *irqd, int ind)
 {
-	unsigned int cpu, vec, prev_cpu, prev_vec;
+	unsigned int cpu, vector, prev_cpu, prev_vector;
 	struct apic_chip_data *apicd;
 	unsigned long flags;
 	int irq;
@@ -344,14 +352,14 @@ void x86_vector_debug_show(struct seq_fi
 
 	raw_spin_lock_irqsave(&vector_lock, flags);
 	cpu = apicd->cpu;
-	vec = apicd->cfg.vector;
+	vector = apicd->vector;
 	prev_cpu = apicd->prev_cpu;
-	prev_vec = apicd->cfg.old_vector;
+	prev_vector = apicd->prev_vector;
 	raw_spin_unlock_irqrestore(&vector_lock, flags);
-	seq_printf(m, "%*sVector: %5u\n", ind, "", vec);
+	seq_printf(m, "%*sVector: %5u\n", ind, "", vector);
 	seq_printf(m, "%*sTarget: %5u\n", ind, "", cpu);
-	if (prev_vec) {
-		seq_printf(m, "%*sPrevious vector: %5u\n", ind, "", prev_vec);
+	if (prev_vector) {
+		seq_printf(m, "%*sPrevious vector: %5u\n", ind, "", prev_vector);
 		seq_printf(m, "%*sPrevious target: %5u\n", ind, "", prev_cpu);
 	}
 }
@@ -461,10 +469,10 @@ static void vector_update_shutdown_irqs(
 		struct irq_data *irqd = irq_desc_get_irq_data(desc);
 		struct apic_chip_data *ad = apic_chip_data(irqd);
 
-		if (!ad || !ad->cfg.vector || ad->cpu != smp_processor_id())
+		if (!ad || !ad->vector || ad->cpu != smp_processor_id())
 			continue;
-		this_cpu_write(vector_irq[ad->cfg.vector], desc);
-		irq_matrix_assign(vector_matrix, ad->cfg.vector);
+		this_cpu_write(vector_irq[ad->vector], desc);
+		irq_matrix_assign(vector_matrix, ad->vector);
 	}
 }
 
@@ -543,7 +551,7 @@ static int apic_retrigger_irq(struct irq
 	unsigned long flags;
 
 	raw_spin_lock_irqsave(&vector_lock, flags);
-	apic->send_IPI(apicd->cpu, apicd->cfg.vector);
+	apic->send_IPI(apicd->cpu, apicd->vector);
 	raw_spin_unlock_irqrestore(&vector_lock, flags);
 
 	return 1;
@@ -567,14 +575,14 @@ static struct irq_chip lapic_controller
 
 static void free_moved_vector(struct apic_chip_data *apicd)
 {
-	unsigned int vector = apicd->cfg.old_vector;
+	unsigned int vector = apicd->prev_vector;
 	unsigned int cpu = apicd->prev_cpu;
 
 	trace_vector_free_moved(apicd->irq, vector, false);
 	irq_matrix_free(vector_matrix, cpu, vector, false);
 	__this_cpu_write(vector_irq[vector], VECTOR_UNUSED);
 	hlist_del_init(&apicd->clist);
-	apicd->cfg.old_vector = 0;
+	apicd->prev_vector = 0;
 	apicd->move_in_progress = 0;
 }
 
@@ -589,7 +597,7 @@ asmlinkage __visible void __irq_entry sm
 	raw_spin_lock(&vector_lock);
 
 	hlist_for_each_entry_safe(apicd, tmp, clhead, clist) {
-		unsigned int irr, vector = apicd->cfg.old_vector;
+		unsigned int irr, vector = apicd->prev_vector;
 
 		/*
 		 * Paranoia: Check if the vector that needs to be cleaned
@@ -623,7 +631,7 @@ static void __send_cleanup_vector(struct
 		hlist_add_head(&apicd->clist, per_cpu_ptr(&cleanup_list, cpu));
 		apic->send_IPI(cpu, IRQ_MOVE_CLEANUP_VECTOR);
 	} else {
-		apicd->cfg.old_vector = 0;
+		apicd->prev_vector = 0;
 	}
 	raw_spin_unlock(&vector_lock);
 }
@@ -632,7 +640,7 @@ void send_cleanup_vector(struct irq_cfg
 {
 	struct apic_chip_data *apicd;
 
-	apicd = container_of(cfg, struct apic_chip_data, cfg);
+	apicd = container_of(cfg, struct apic_chip_data, hw_irq_cfg);
 	if (apicd->move_in_progress)
 		__send_cleanup_vector(apicd);
 }
@@ -641,11 +649,11 @@ static void __irq_complete_move(struct i
 {
 	struct apic_chip_data *apicd;
 
-	apicd = container_of(cfg, struct apic_chip_data, cfg);
+	apicd = container_of(cfg, struct apic_chip_data, hw_irq_cfg);
 	if (likely(!apicd->move_in_progress))
 		return;
 
-	if (vector == apicd->cfg.vector && apicd->cpu == smp_processor_id())
+	if (vector == apicd->vector && apicd->cpu == smp_processor_id())
 		__send_cleanup_vector(apicd);
 }
 
@@ -683,9 +691,9 @@ void irq_force_complete_move(struct irq_
 		goto unlock;
 
 	/*
-	 * If old_vector is empty, no action required.
+	 * If prev_vector is empty, no action required.
 	 */
-	vector = apicd->cfg.old_vector;
+	vector = apicd->prev_vector;
 	if (!vector)
 		goto unlock;
 

  parent reply	other threads:[~2017-09-13 21:37 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-13 21:29 [patch 00/52] x86: Rework the vector management Thomas Gleixner
2017-09-13 21:29 ` [patch 01/52] genirq: Fix cpumask check in __irq_startup_managed() Thomas Gleixner
2017-09-16 18:24   ` [tip:irq/urgent] " tip-bot for Thomas Gleixner
2017-09-13 21:29 ` [patch 02/52] genirq/debugfs: Show debug information for all irq descriptors Thomas Gleixner
2017-09-13 21:29 ` [patch 03/52] genirq/msi: Capture device name for debugfs Thomas Gleixner
2017-09-13 21:29 ` [patch 04/52] irqdomain/debugfs: Provide domain specific debug callback Thomas Gleixner
2017-09-13 21:29 ` [patch 05/52] genirq: Make state consistent for !IRQ_DOMAIN_HIERARCHY Thomas Gleixner
2017-09-13 21:29 ` [patch 06/52] genirq: Set managed shut down flag at init Thomas Gleixner
2017-09-13 21:29 ` [patch 07/52] genirq: Separate activation and startup Thomas Gleixner
2017-09-13 21:29 ` [patch 08/52] genirq/irqdomain: Update irq_domain_ops.activate() signature Thomas Gleixner
2017-09-13 21:29 ` [patch 09/52] genirq/irqdomain: Allow irq_domain_activate_irq() to fail Thomas Gleixner
2017-09-13 21:29 ` [patch 10/52] genirq/irqdomain: Propagate early activation Thomas Gleixner
2017-09-13 21:29 ` [patch 11/52] genirq/irqdomain: Add force reactivation flag to irq domains Thomas Gleixner
2017-09-13 21:29 ` [patch 12/52] genirq: Implement bitmap matrix allocator Thomas Gleixner
2017-09-13 21:29 ` [patch 13/52] genirq/matrix: Add tracepoints Thomas Gleixner
2017-09-13 21:29 ` [patch 14/52] x86/apic: Deinline x2apic functions Thomas Gleixner
2017-09-13 21:29 ` [patch 15/52] x86/apic: Sanitize return value of apic.set_apic_id() Thomas Gleixner
2017-09-13 21:29 ` [patch 16/52] x86/apic: Sanitize return value of check_apicid_used() Thomas Gleixner
2017-09-13 21:29 ` [patch 17/52] x86/apic: Move probe32 specific APIC functions Thomas Gleixner
2017-09-13 21:29 ` [patch 18/52] x86/apic: Move APIC noop specific functions Thomas Gleixner
2017-09-13 21:29 ` [patch 19/52] x86/apic: Sanitize 32/64bit APIC callbacks Thomas Gleixner
2017-09-13 21:29 ` [patch 20/52] x86/apic: Move common " Thomas Gleixner
2017-09-13 21:29 ` [patch 21/52] x86/apic: Reorganize struct apic Thomas Gleixner
2017-09-13 21:29 ` [patch 22/52] x86/apic/x2apic: Simplify cluster management Thomas Gleixner
2017-09-13 21:29 ` [patch 23/52] x86/apic: Get rid of apic->target_cpus Thomas Gleixner
2017-09-13 21:29 ` [patch 24/52] x86/vector: Rename used_vectors to system_vectors Thomas Gleixner
2017-09-13 21:29 ` [patch 25/52] x86/apic: Get rid of multi CPU affinity Thomas Gleixner
2017-09-13 21:29 ` [patch 26/52] x86/ioapic: Remove obsolete post hotplug update Thomas Gleixner
2017-09-13 21:29 ` [patch 27/52] x86/vector: Simplify the CPU hotplug vector update Thomas Gleixner
2017-09-13 21:29 ` [patch 28/52] x86/vector: Cleanup variable names Thomas Gleixner
2017-09-13 21:29 ` [patch 29/52] x86/vector: Store the single CPU targets in apic data Thomas Gleixner
2017-09-13 21:29 ` [patch 30/52] x86/vector: Simplify vector move cleanup Thomas Gleixner
2017-09-13 21:29 ` [patch 31/52] x86/ioapic: Mark legacy vectors at reallocation time Thomas Gleixner
2017-09-13 21:29 ` [patch 32/52] x86/apic: Get rid of the legacy irq data storage Thomas Gleixner
2017-09-13 21:29 ` [patch 33/52] x86/vector: Remove pointless pointer checks Thomas Gleixner
2017-09-13 21:29 ` [patch 34/52] x86/vector: Move helper functions around Thomas Gleixner
2017-09-13 21:29 ` [patch 35/52] x86/apic: Add replacement for cpu_mask_to_apicid() Thomas Gleixner
2017-09-13 21:29 ` [patch 36/52] x86/irq/vector: Initialize matrix allocator Thomas Gleixner
2017-09-13 21:29 ` [patch 37/52] x86/vector: Add vector domain debugfs support Thomas Gleixner
2017-09-13 21:29 ` [patch 38/52] x86/smpboot: Set online before setting up vectors Thomas Gleixner
2017-09-13 21:29 ` [patch 39/52] x86/vector: Add tracepoints for vector management Thomas Gleixner
2017-09-13 21:29 ` [patch 40/52] x86/vector: Use matrix allocator for vector assignment Thomas Gleixner
2017-09-13 21:29 ` [patch 41/52] x86/apic: Remove unused callbacks Thomas Gleixner
2017-09-13 21:29 ` [patch 42/52] x86/vector: Compile SMP only code conditionally Thomas Gleixner
2017-09-13 21:29 ` Thomas Gleixner [this message]
2017-09-13 21:29 ` [patch 44/52] x86/apic/msi: Force reactivation of interrupts at startup time Thomas Gleixner
2017-09-13 21:29 ` [patch 45/52] iommu/vt-d: Reevaluate vector configuration on activate() Thomas Gleixner
2017-09-13 21:29   ` Thomas Gleixner
2017-09-13 21:29 ` [patch 46/52] iommu/amd: " Thomas Gleixner
2017-09-13 21:29   ` Thomas Gleixner
2017-09-13 21:29 ` [patch 47/52] x86/io_apic: " Thomas Gleixner
2017-09-13 21:29 ` [patch 48/52] x86/vector: Handle managed interrupts proper Thomas Gleixner
2017-09-13 21:29 ` [patch 49/52] x86/vector/msi: Switch to global reservation mode Thomas Gleixner
2017-09-13 21:29 ` [patch 50/52] x86/vector: Switch IOAPIC " Thomas Gleixner
2017-09-13 21:29 ` [patch 51/52] x86/irq: Simplify hotplug vector accounting Thomas Gleixner
2017-09-13 21:29 ` [patch 52/52] x86/vector: Respect affinity mask in irq descriptor Thomas Gleixner
2017-09-14 11:21 ` [patch 00/52] x86: Rework the vector management Juergen Gross
2017-09-20 10:21   ` Paolo Bonzini
2017-09-19  9:12 ` Yu Chen

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