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From: Shreyansh Jain <shreyansh.jain@nxp.com>
To: <dev@dpdk.org>
Cc: <ferruh.yigit@intel.com>, <hemant.agrawal@nxp.com>
Subject: [PATCH v5 06/40] bus/dpaa: add FMan hardware operations
Date: Thu, 28 Sep 2017 17:03:10 +0530	[thread overview]
Message-ID: <20170928113344.12248-7-shreyansh.jain@nxp.com> (raw)
In-Reply-To: <20170928113344.12248-1-shreyansh.jain@nxp.com>

Signed-off-by: Geoff Thorpe <geoff.thorpe@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
---
 drivers/bus/dpaa/Makefile                 |   1 +
 drivers/bus/dpaa/base/fman/fman_hw.c      | 562 ++++++++++++++++++++++++++++++
 drivers/bus/dpaa/include/fsl_fman.h       | 174 +++++++++
 drivers/bus/dpaa/include/fsl_fman_crc64.h | 263 ++++++++++++++
 4 files changed, 1000 insertions(+)
 create mode 100644 drivers/bus/dpaa/base/fman/fman_hw.c
 create mode 100644 drivers/bus/dpaa/include/fsl_fman.h
 create mode 100644 drivers/bus/dpaa/include/fsl_fman_crc64.h

diff --git a/drivers/bus/dpaa/Makefile b/drivers/bus/dpaa/Makefile
index f6e504d..fe65276 100644
--- a/drivers/bus/dpaa/Makefile
+++ b/drivers/bus/dpaa/Makefile
@@ -58,6 +58,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_DPAA_BUS) += \
 
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA_BUS) += \
 	base/fman/fman.c \
+	base/fman/fman_hw.c \
 	base/fman/of.c \
 	base/fman/netcfg_layer.c
 
diff --git a/drivers/bus/dpaa/base/fman/fman_hw.c b/drivers/bus/dpaa/base/fman/fman_hw.c
new file mode 100644
index 0000000..a7ca661
--- /dev/null
+++ b/drivers/bus/dpaa/base/fman/fman_hw.c
@@ -0,0 +1,562 @@
+/*-
+ *   BSD LICENSE
+ *
+ * Copyright 2017 NXP.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/types.h>
+#include <sys/ioctl.h>
+#include <ifaddrs.h>
+#include <fman.h>
+/* This header declares things about Fman hardware itself (the format of status
+ * words and an inline implementation of CRC64). We include it only in order to
+ * instantiate the one global variable it depends on.
+ */
+#include <fsl_fman.h>
+#include <fsl_fman_crc64.h>
+
+/* Instantiate the global variable that the inline CRC64 implementation (in
+ * <fsl_fman.h>) depends on.
+ */
+DECLARE_FMAN_CRC64_TABLE();
+
+#define ETH_ADDR_TO_UINT64(eth_addr)                  \
+	(uint64_t)(((uint64_t)(eth_addr)[0] << 40) |   \
+	((uint64_t)(eth_addr)[1] << 32) |   \
+	((uint64_t)(eth_addr)[2] << 24) |   \
+	((uint64_t)(eth_addr)[3] << 16) |   \
+	((uint64_t)(eth_addr)[4] << 8) |    \
+	((uint64_t)(eth_addr)[5]))
+
+void
+fman_if_set_mcast_filter_table(struct fman_if *p)
+{
+	struct __fman_if *__if = container_of(p, struct __fman_if, __if);
+	void *hashtable_ctrl;
+	uint32_t i;
+
+	hashtable_ctrl = &((struct memac_regs *)__if->ccsr_map)->hashtable_ctrl;
+	for (i = 0; i < 64; i++)
+		out_be32(hashtable_ctrl, i|HASH_CTRL_MCAST_EN);
+}
+
+void
+fman_if_reset_mcast_filter_table(struct fman_if *p)
+{
+	struct __fman_if *__if = container_of(p, struct __fman_if, __if);
+	void *hashtable_ctrl;
+	uint32_t i;
+
+	hashtable_ctrl = &((struct memac_regs *)__if->ccsr_map)->hashtable_ctrl;
+	for (i = 0; i < 64; i++)
+		out_be32(hashtable_ctrl, i & ~HASH_CTRL_MCAST_EN);
+}
+
+static
+uint32_t get_mac_hash_code(uint64_t eth_addr)
+{
+	uint64_t	mask1, mask2;
+	uint32_t	xorVal = 0;
+	uint8_t		i, j;
+
+	for (i = 0; i < 6; i++) {
+		mask1 = eth_addr & (uint64_t)0x01;
+		eth_addr >>= 1;
+
+		for (j = 0; j < 7; j++) {
+			mask2 = eth_addr & (uint64_t)0x01;
+			mask1 ^= mask2;
+			eth_addr >>= 1;
+		}
+
+		xorVal |= (mask1 << (5 - i));
+	}
+
+	return xorVal;
+}
+
+int
+fman_if_add_hash_mac_addr(struct fman_if *p, uint8_t *eth)
+{
+	uint64_t eth_addr;
+	void *hashtable_ctrl;
+	uint32_t hash;
+
+	struct __fman_if *__if = container_of(p, struct __fman_if, __if);
+
+	eth_addr = ETH_ADDR_TO_UINT64(eth);
+
+	if (!(eth_addr & GROUP_ADDRESS))
+		return -1;
+
+	hash = get_mac_hash_code(eth_addr) & HASH_CTRL_ADDR_MASK;
+	hash = hash | HASH_CTRL_MCAST_EN;
+
+	hashtable_ctrl = &((struct memac_regs *)__if->ccsr_map)->hashtable_ctrl;
+	out_be32(hashtable_ctrl, hash);
+
+	return 0;
+}
+
+int
+fman_if_get_primary_mac_addr(struct fman_if *p, uint8_t *eth)
+{
+	struct __fman_if *__if = container_of(p, struct __fman_if, __if);
+	void *mac_reg =
+		&((struct memac_regs *)__if->ccsr_map)->mac_addr0.mac_addr_l;
+	u32 val = in_be32(mac_reg);
+
+	eth[0] = (val & 0x000000ff) >> 0;
+	eth[1] = (val & 0x0000ff00) >> 8;
+	eth[2] = (val & 0x00ff0000) >> 16;
+	eth[3] = (val & 0xff000000) >> 24;
+
+	mac_reg =  &((struct memac_regs *)__if->ccsr_map)->mac_addr0.mac_addr_u;
+	val = in_be32(mac_reg);
+
+	eth[4] = (val & 0x000000ff) >> 0;
+	eth[5] = (val & 0x0000ff00) >> 8;
+
+	return 0;
+}
+
+void
+fman_if_clear_mac_addr(struct fman_if *p, uint8_t addr_num)
+{
+	struct __fman_if *m = container_of(p, struct __fman_if, __if);
+	void *reg;
+
+	if (addr_num) {
+		reg = &((struct memac_regs *)m->ccsr_map)->
+				mac_addr[addr_num-1].mac_addr_l;
+		out_be32(reg, 0x0);
+		reg = &((struct memac_regs *)m->ccsr_map)->
+					mac_addr[addr_num-1].mac_addr_u;
+		out_be32(reg, 0x0);
+	} else {
+		reg = &((struct memac_regs *)m->ccsr_map)->mac_addr0.mac_addr_l;
+		out_be32(reg, 0x0);
+		reg = &((struct memac_regs *)m->ccsr_map)->mac_addr0.mac_addr_u;
+		out_be32(reg, 0x0);
+	}
+}
+
+int
+fman_if_add_mac_addr(struct fman_if *p, uint8_t *eth, uint8_t addr_num)
+{
+	struct __fman_if *m = container_of(p, struct __fman_if, __if);
+
+	void *reg;
+	u32 val;
+
+	memcpy(&m->__if.mac_addr, eth, ETHER_ADDR_LEN);
+
+	if (addr_num)
+		reg = &((struct memac_regs *)m->ccsr_map)->
+					mac_addr[addr_num-1].mac_addr_l;
+	else
+		reg = &((struct memac_regs *)m->ccsr_map)->mac_addr0.mac_addr_l;
+
+	val = (m->__if.mac_addr.addr_bytes[0] |
+	       (m->__if.mac_addr.addr_bytes[1] << 8) |
+	       (m->__if.mac_addr.addr_bytes[2] << 16) |
+	       (m->__if.mac_addr.addr_bytes[3] << 24));
+	out_be32(reg, val);
+
+	if (addr_num)
+		reg = &((struct memac_regs *)m->ccsr_map)->
+					mac_addr[addr_num-1].mac_addr_u;
+	else
+		reg = &((struct memac_regs *)m->ccsr_map)->mac_addr0.mac_addr_u;
+
+	val = ((m->__if.mac_addr.addr_bytes[4] << 0) |
+	       (m->__if.mac_addr.addr_bytes[5] << 8));
+	out_be32(reg, val);
+
+	return 0;
+}
+
+void
+fman_if_set_rx_ignore_pause_frames(struct fman_if *p, bool enable)
+{
+	struct __fman_if *__if = container_of(p, struct __fman_if, __if);
+	u32 value = 0;
+	void *cmdcfg;
+
+	assert(fman_ccsr_map_fd != -1);
+
+	/* Set Rx Ignore Pause Frames */
+	cmdcfg = &((struct memac_regs *)__if->ccsr_map)->command_config;
+	if (enable)
+		value = in_be32(cmdcfg) | CMD_CFG_PAUSE_IGNORE;
+	else
+		value = in_be32(cmdcfg) & ~CMD_CFG_PAUSE_IGNORE;
+
+	out_be32(cmdcfg, value);
+}
+
+void
+fman_if_conf_max_frame_len(struct fman_if *p, unsigned int max_frame_len)
+{
+	struct __fman_if *__if = container_of(p, struct __fman_if, __if);
+	unsigned int *maxfrm;
+
+	assert(fman_ccsr_map_fd != -1);
+
+	/* Set Max frame length */
+	maxfrm = &((struct memac_regs *)__if->ccsr_map)->maxfrm;
+	out_be32(maxfrm, (MAXFRM_RX_MASK & max_frame_len));
+}
+
+void
+fman_if_stats_get(struct fman_if *p, struct rte_eth_stats *stats)
+{
+	struct __fman_if *m = container_of(p, struct __fman_if, __if);
+	struct memac_regs *regs = m->ccsr_map;
+
+	/* read recved packet count */
+	stats->ipackets = ((u64)in_be32(&regs->rfrm_u)) << 32 |
+			in_be32(&regs->rfrm_l);
+	stats->ibytes = ((u64)in_be32(&regs->roct_u)) << 32 |
+			in_be32(&regs->roct_l);
+	stats->ierrors = ((u64)in_be32(&regs->rerr_u)) << 32 |
+			in_be32(&regs->rerr_l);
+
+	/* read xmited packet count */
+	stats->opackets = ((u64)in_be32(&regs->tfrm_u)) << 32 |
+			in_be32(&regs->tfrm_l);
+	stats->obytes = ((u64)in_be32(&regs->toct_u)) << 32 |
+			in_be32(&regs->toct_l);
+	stats->oerrors = ((u64)in_be32(&regs->terr_u)) << 32 |
+			in_be32(&regs->terr_l);
+}
+
+void
+fman_if_stats_get_all(struct fman_if *p, uint64_t *value, int n)
+{
+	struct __fman_if *m = container_of(p, struct __fman_if, __if);
+	struct memac_regs *regs = m->ccsr_map;
+	int i;
+	uint64_t base_offset = offsetof(struct memac_regs, reoct_l);
+
+	for (i = 0; i < n; i++)
+		value[i] = ((u64)in_be32((char *)regs
+				+ base_offset + 8 * i + 4)) << 32 |
+				((u64)in_be32((char *)regs
+				+ base_offset + 8 * i));
+}
+
+void
+fman_if_stats_reset(struct fman_if *p)
+{
+	struct __fman_if *m = container_of(p, struct __fman_if, __if);
+	struct memac_regs *regs = m->ccsr_map;
+	uint32_t tmp;
+
+	tmp = in_be32(&regs->statn_config);
+
+	tmp |= STATS_CFG_CLR;
+
+	out_be32(&regs->statn_config, tmp);
+
+	while (in_be32(&regs->statn_config) & STATS_CFG_CLR)
+		;
+}
+
+void
+fman_if_promiscuous_enable(struct fman_if *p)
+{
+	struct __fman_if *__if = container_of(p, struct __fman_if, __if);
+	void *cmdcfg;
+
+	assert(fman_ccsr_map_fd != -1);
+
+	/* Enable Rx promiscuous mode */
+	cmdcfg = &((struct memac_regs *)__if->ccsr_map)->command_config;
+	out_be32(cmdcfg, in_be32(cmdcfg) | CMD_CFG_PROMIS_EN);
+}
+
+void
+fman_if_promiscuous_disable(struct fman_if *p)
+{
+	struct __fman_if *__if = container_of(p, struct __fman_if, __if);
+	void *cmdcfg;
+
+	assert(fman_ccsr_map_fd != -1);
+
+	/* Disable Rx promiscuous mode */
+	cmdcfg = &((struct memac_regs *)__if->ccsr_map)->command_config;
+	out_be32(cmdcfg, in_be32(cmdcfg) & (~CMD_CFG_PROMIS_EN));
+}
+
+void
+fman_if_enable_rx(struct fman_if *p)
+{
+	struct __fman_if *__if = container_of(p, struct __fman_if, __if);
+
+	assert(fman_ccsr_map_fd != -1);
+
+	/* enable Rx and Tx */
+	out_be32(__if->ccsr_map + 8, in_be32(__if->ccsr_map + 8) | 3);
+}
+
+void
+fman_if_disable_rx(struct fman_if *p)
+{
+	struct __fman_if *__if = container_of(p, struct __fman_if, __if);
+
+	assert(fman_ccsr_map_fd != -1);
+
+	/* only disable Rx, not Tx */
+	out_be32(__if->ccsr_map + 8, in_be32(__if->ccsr_map + 8) & ~(u32)2);
+}
+
+void
+fman_if_loopback_enable(struct fman_if *p)
+{
+	struct __fman_if *__if = container_of(p, struct __fman_if, __if);
+
+	assert(fman_ccsr_map_fd != -1);
+
+	/* Enable loopback mode */
+	if ((__if->__if.is_memac) && (__if->__if.is_rgmii)) {
+		unsigned int *ifmode =
+			&((struct memac_regs *)__if->ccsr_map)->if_mode;
+		out_be32(ifmode, in_be32(ifmode) | IF_MODE_RLP);
+	} else{
+		unsigned int *cmdcfg =
+			&((struct memac_regs *)__if->ccsr_map)->command_config;
+		out_be32(cmdcfg, in_be32(cmdcfg) | CMD_CFG_LOOPBACK_EN);
+	}
+}
+
+void
+fman_if_loopback_disable(struct fman_if *p)
+{
+	struct __fman_if *__if = container_of(p, struct __fman_if, __if);
+
+	assert(fman_ccsr_map_fd != -1);
+	/* Disable loopback mode */
+	if ((__if->__if.is_memac) && (__if->__if.is_rgmii)) {
+		unsigned int *ifmode =
+			&((struct memac_regs *)__if->ccsr_map)->if_mode;
+		out_be32(ifmode, in_be32(ifmode) & ~IF_MODE_RLP);
+	} else {
+		unsigned int *cmdcfg =
+			&((struct memac_regs *)__if->ccsr_map)->command_config;
+		out_be32(cmdcfg, in_be32(cmdcfg) & ~CMD_CFG_LOOPBACK_EN);
+	}
+}
+
+void
+fman_if_set_bp(struct fman_if *fm_if, unsigned num __always_unused,
+		    int bpid, size_t bufsize)
+{
+	u32 fmbm_ebmpi;
+	u32 ebmpi_val_ace = 0xc0000000;
+	u32 ebmpi_mask = 0xffc00000;
+
+	struct __fman_if *__if = container_of(fm_if, struct __fman_if, __if);
+
+	assert(fman_ccsr_map_fd != -1);
+
+	fmbm_ebmpi =
+	       in_be32(&((struct rx_bmi_regs *)__if->bmi_map)->fmbm_ebmpi[0]);
+	fmbm_ebmpi = ebmpi_val_ace | (fmbm_ebmpi & ebmpi_mask) | (bpid << 16) |
+		     (bufsize);
+
+	out_be32(&((struct rx_bmi_regs *)__if->bmi_map)->fmbm_ebmpi[0],
+		 fmbm_ebmpi);
+}
+
+int
+fman_if_get_fc_quanta(struct fman_if *fm_if)
+{
+	struct __fman_if *__if = container_of(fm_if, struct __fman_if, __if);
+
+	assert(fman_ccsr_map_fd != -1);
+
+	return in_be32(&((struct memac_regs *)__if->ccsr_map)->pause_quanta[0]);
+}
+
+int
+fman_if_set_fc_quanta(struct fman_if *fm_if, u16 pause_quanta)
+{
+	struct __fman_if *__if = container_of(fm_if, struct __fman_if, __if);
+
+	assert(fman_ccsr_map_fd != -1);
+
+	out_be32(&((struct memac_regs *)__if->ccsr_map)->pause_quanta[0],
+		 pause_quanta);
+	return 0;
+}
+
+int
+fman_if_get_fdoff(struct fman_if *fm_if)
+{
+	u32 fmbm_ricp;
+	int fdoff;
+	int iceof_mask = 0x001f0000;
+	int icsz_mask = 0x0000001f;
+
+	struct __fman_if *__if = container_of(fm_if, struct __fman_if, __if);
+
+	assert(fman_ccsr_map_fd != -1);
+
+	fmbm_ricp =
+		   in_be32(&((struct rx_bmi_regs *)__if->bmi_map)->fmbm_ricp);
+	/*iceof + icsz*/
+	fdoff = ((fmbm_ricp & iceof_mask) >> 16) * 16 +
+		(fmbm_ricp & icsz_mask) * 16;
+
+	return fdoff;
+}
+
+void
+fman_if_set_err_fqid(struct fman_if *fm_if, uint32_t err_fqid)
+{
+	struct __fman_if *__if = container_of(fm_if, struct __fman_if, __if);
+
+	assert(fman_ccsr_map_fd != -1);
+
+	unsigned int *fmbm_refqid =
+			&((struct rx_bmi_regs *)__if->bmi_map)->fmbm_refqid;
+	out_be32(fmbm_refqid, err_fqid);
+}
+
+int
+fman_if_get_ic_params(struct fman_if *fm_if, struct fman_if_ic_params *icp)
+{
+	struct __fman_if *__if = container_of(fm_if, struct __fman_if, __if);
+	int val = 0;
+	int iceof_mask = 0x001f0000;
+	int icsz_mask = 0x0000001f;
+	int iciof_mask = 0x00000f00;
+
+	assert(fman_ccsr_map_fd != -1);
+
+	unsigned int *fmbm_ricp =
+		&((struct rx_bmi_regs *)__if->bmi_map)->fmbm_ricp;
+	val = in_be32(fmbm_ricp);
+
+	icp->iceof = (val & iceof_mask) >> 12;
+	icp->iciof = (val & iciof_mask) >> 4;
+	icp->icsz = (val & icsz_mask) << 4;
+
+	return 0;
+}
+
+int
+fman_if_set_ic_params(struct fman_if *fm_if,
+			  const struct fman_if_ic_params *icp)
+{
+	struct __fman_if *__if = container_of(fm_if, struct __fman_if, __if);
+	int val = 0;
+	int iceof_mask = 0x001f0000;
+	int icsz_mask = 0x0000001f;
+	int iciof_mask = 0x00000f00;
+
+	assert(fman_ccsr_map_fd != -1);
+
+	val |= (icp->iceof << 12) & iceof_mask;
+	val |= (icp->iciof << 4) & iciof_mask;
+	val |= (icp->icsz >> 4) & icsz_mask;
+
+	unsigned int *fmbm_ricp =
+		&((struct rx_bmi_regs *)__if->bmi_map)->fmbm_ricp;
+	out_be32(fmbm_ricp, val);
+
+	return 0;
+}
+
+void
+fman_if_set_fdoff(struct fman_if *fm_if, uint32_t fd_offset)
+{
+	struct __fman_if *__if = container_of(fm_if, struct __fman_if, __if);
+	unsigned int *fmbm_rebm;
+
+	assert(fman_ccsr_map_fd != -1);
+
+	fmbm_rebm = &((struct rx_bmi_regs *)__if->bmi_map)->fmbm_rebm;
+
+	out_be32(fmbm_rebm, in_be32(fmbm_rebm) | (fd_offset << 16));
+}
+
+void
+fman_if_set_maxfrm(struct fman_if *fm_if, uint16_t max_frm)
+{
+	struct __fman_if *__if = container_of(fm_if, struct __fman_if, __if);
+	unsigned int *reg_maxfrm;
+
+	assert(fman_ccsr_map_fd != -1);
+
+	reg_maxfrm = &((struct memac_regs *)__if->ccsr_map)->maxfrm;
+
+	out_be32(reg_maxfrm, (in_be32(reg_maxfrm) & 0xFFFF0000) | max_frm);
+}
+
+uint16_t
+fman_if_get_maxfrm(struct fman_if *fm_if)
+{
+	struct __fman_if *__if = container_of(fm_if, struct __fman_if, __if);
+	unsigned int *reg_maxfrm;
+
+	assert(fman_ccsr_map_fd != -1);
+
+	reg_maxfrm = &((struct memac_regs *)__if->ccsr_map)->maxfrm;
+
+	return (in_be32(reg_maxfrm) | 0x0000FFFF);
+}
+
+void
+fman_if_set_dnia(struct fman_if *fm_if, uint32_t nia)
+{
+	struct __fman_if *__if = container_of(fm_if, struct __fman_if, __if);
+	unsigned int *fmqm_pndn;
+
+	assert(fman_ccsr_map_fd != -1);
+
+	fmqm_pndn = &((struct fman_port_qmi_regs *)__if->qmi_map)->fmqm_pndn;
+
+	out_be32(fmqm_pndn, nia);
+}
+
+void
+fman_if_discard_rx_errors(struct fman_if *fm_if)
+{
+	struct __fman_if *__if = container_of(fm_if, struct __fman_if, __if);
+	unsigned int *fmbm_rfsdm, *fmbm_rfsem;
+
+	fmbm_rfsem = &((struct rx_bmi_regs *)__if->bmi_map)->fmbm_rfsem;
+	out_be32(fmbm_rfsem, 0);
+
+	/* Configure the discard mask to discard the error packets which have
+	 * DMA errors, Frame size error, Header error etc. The mask 0x010CE3F0
+	 * is to configured discard all the errors which come in the FD[STATUS]
+	 */
+	fmbm_rfsdm = &((struct rx_bmi_regs *)__if->bmi_map)->fmbm_rfsdm;
+	out_be32(fmbm_rfsdm, 0x010CE3F0);
+}
diff --git a/drivers/bus/dpaa/include/fsl_fman.h b/drivers/bus/dpaa/include/fsl_fman.h
new file mode 100644
index 0000000..ac38082
--- /dev/null
+++ b/drivers/bus/dpaa/include/fsl_fman.h
@@ -0,0 +1,174 @@
+/*-
+ * This file is provided under a dual BSD/GPLv2 license. When using or
+ * redistributing this file, you may do so under either license.
+ *
+ *   BSD LICENSE
+ *
+ * Copyright 2017 NXP.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *   GPL LICENSE SUMMARY
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __FSL_FMAN_H
+#define __FSL_FMAN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Status field in FD is updated on Rx side by FMAN with following information.
+ * Refer to field description in FM BG.
+ */
+struct fm_status_t {
+	unsigned int reserved0:3;
+	unsigned int dcl4c:1; /* Don't Check L4 Checksum */
+	unsigned int reserved1:1;
+	unsigned int ufd:1; /* Unsupported Format */
+	unsigned int lge:1; /* Length Error */
+	unsigned int dme:1; /* DMA Error */
+
+	unsigned int reserved2:4;
+	unsigned int fpe:1; /* Frame physical Error */
+	unsigned int fse:1; /* Frame Size Error */
+	unsigned int dis:1; /* Discard by Classification */
+	unsigned int reserved3:1;
+
+	unsigned int eof:1; /* Key Extraction goes out of frame */
+	unsigned int nss:1; /* No Scheme selected */
+	unsigned int kso:1; /* Key Size Overflow */
+	unsigned int reserved4:1;
+	unsigned int fcl:2; /* Frame Color */
+	unsigned int ipp:1; /* Illegal Policer Profile Selected */
+	unsigned int flm:1; /* Frame Length Mismatch */
+	unsigned int pte:1; /* Parser Timeout */
+	unsigned int isp:1; /* Invalid Soft Parser Instruction */
+	unsigned int phe:1; /* Header Error during parsing */
+	unsigned int frdr:1; /* Frame Dropped by disabled port */
+	unsigned int reserved5:4;
+} __attribute__ ((__packed__));
+
+/* Set MAC address for a particular interface */
+int fman_if_add_mac_addr(struct fman_if *p, uint8_t *eth, uint8_t addr_num);
+
+/* Remove a MAC address for a particular interface */
+void fman_if_clear_mac_addr(struct fman_if *p, uint8_t addr_num);
+
+/* Get the FMAN statistics */
+void fman_if_stats_get(struct fman_if *p, struct rte_eth_stats *stats);
+
+/* Reset the FMAN statistics */
+void fman_if_stats_reset(struct fman_if *p);
+
+/* Get all of the FMAN statistics */
+void fman_if_stats_get_all(struct fman_if *p, uint64_t *value, int n);
+
+/* Set ignore pause option for a specific interface */
+void fman_if_set_rx_ignore_pause_frames(struct fman_if *p, bool enable);
+
+/* Set max frame length */
+void fman_if_conf_max_frame_len(struct fman_if *p, unsigned int max_frame_len);
+
+/* Enable/disable Rx promiscuous mode on specified interface */
+void fman_if_promiscuous_enable(struct fman_if *p);
+void fman_if_promiscuous_disable(struct fman_if *p);
+
+/* Enable/disable Rx on specific interfaces */
+void fman_if_enable_rx(struct fman_if *p);
+void fman_if_disable_rx(struct fman_if *p);
+
+/* Enable/disable loopback on specific interfaces */
+void fman_if_loopback_enable(struct fman_if *p);
+void fman_if_loopback_disable(struct fman_if *p);
+
+/* Set buffer pool on specific interface */
+void fman_if_set_bp(struct fman_if *fm_if, unsigned int num, int bpid,
+		    size_t bufsize);
+
+/* Get Flow Control pause quanta on specific interface */
+int fman_if_get_fc_quanta(struct fman_if *fm_if);
+
+/* Set Flow Control pause quanta on specific interface */
+int fman_if_set_fc_quanta(struct fman_if *fm_if, u16 pause_quanta);
+
+/* Set default error fqid on specific interface */
+void fman_if_set_err_fqid(struct fman_if *fm_if, uint32_t err_fqid);
+
+/* Get IC transfer params */
+int fman_if_get_ic_params(struct fman_if *fm_if, struct fman_if_ic_params *icp);
+
+/* Set IC transfer params */
+int fman_if_set_ic_params(struct fman_if *fm_if,
+			  const struct fman_if_ic_params *icp);
+
+/* Get interface fd->offset value */
+int fman_if_get_fdoff(struct fman_if *fm_if);
+
+/* Set interface fd->offset value */
+void fman_if_set_fdoff(struct fman_if *fm_if, uint32_t fd_offset);
+
+/* Get interface Max Frame length (MTU) */
+uint16_t fman_if_get_maxfrm(struct fman_if *fm_if);
+
+/* Set interface  Max Frame length (MTU) */
+void fman_if_set_maxfrm(struct fman_if *fm_if, uint16_t max_frm);
+
+/* Set interface next invoked action for dequeue operation */
+void fman_if_set_dnia(struct fman_if *fm_if, uint32_t nia);
+
+/* discard error packets on rx */
+void fman_if_discard_rx_errors(struct fman_if *fm_if);
+
+void fman_if_set_mcast_filter_table(struct fman_if *p);
+
+void fman_if_reset_mcast_filter_table(struct fman_if *p);
+
+int fman_if_add_hash_mac_addr(struct fman_if *p, uint8_t *eth);
+
+int fman_if_get_primary_mac_addr(struct fman_if *p, uint8_t *eth);
+
+
+/* Enable/disable Rx on all interfaces */
+static inline void fman_if_enable_all_rx(void)
+{
+	struct fman_if *__if;
+
+	list_for_each_entry(__if, fman_if_list, node)
+		fman_if_enable_rx(__if);
+}
+
+static inline void fman_if_disable_all_rx(void)
+{
+	struct fman_if *__if;
+
+	list_for_each_entry(__if, fman_if_list, node)
+		fman_if_disable_rx(__if);
+}
+#endif /* __FSL_FMAN_H */
diff --git a/drivers/bus/dpaa/include/fsl_fman_crc64.h b/drivers/bus/dpaa/include/fsl_fman_crc64.h
new file mode 100644
index 0000000..af5803f
--- /dev/null
+++ b/drivers/bus/dpaa/include/fsl_fman_crc64.h
@@ -0,0 +1,263 @@
+/*-
+ * This file is provided under a dual BSD/GPLv2 license. When using or
+ * redistributing this file, you may do so under either license.
+ *
+ *   BSD LICENSE
+ *
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *   GPL LICENSE SUMMARY
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __FSL_FMAN_CRC64_H
+#define __FSL_FMAN_CRC64_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * This following definitions provide a software implementation of the CRC64
+ * algorithm implemented within Fman.
+ *
+ * The following example shows how to compute a CRC64 hash value based on
+ * SRC_IP, DST_IP and ESP_SPI values
+ *
+ *     #define compute_hash(saddr,daddr,spi) \
+ *        do { \
+ *           uint64_t result; \
+ *           result = fman_crc64_init(); \
+ *           result = fman_crc64_compute_32bit(saddr, result); \
+ *           result = fman_crc64_compute_32bit(daddr, result); \
+ *           result = fman_crc64_compute_32bit(spi, result); \
+ *           return (uint32_t) result & RC_HASH_MASK; \
+ *        } while (0);
+ *
+ * If hashing over a different number of fields (or of different types) is
+ * required, this can be implemented using the following primitives.
+ */
+
+/* The following table provides the constants used by the Fman CRC64
+ * implementation. The table is instantiated within the DPAA fman driver.
+ * However if the application is not going to be linked against the DPAA fman
+ * driver but will use this Fman CRC64 implementation, then it will need to
+ * instantiate this table by using the DECLARE_FMAN_CRC64_TABLE() macro.
+ */
+struct fman_crc64_t {
+	uint64_t initial;
+	uint64_t table[1 << 8];
+};
+extern struct fman_crc64_t FMAN_CRC64_ECMA_182;
+#define DECLARE_FMAN_CRC64_TABLE() \
+struct fman_crc64_t FMAN_CRC64_ECMA_182 = { \
+	0xFFFFFFFFFFFFFFFFULL, \
+	{ \
+		0x0000000000000000ULL, 0xb32e4cbe03a75f6fULL, \
+		0xf4843657a840a05bULL, 0x47aa7ae9abe7ff34ULL, \
+		0x7bd0c384ff8f5e33ULL, 0xc8fe8f3afc28015cULL, \
+		0x8f54f5d357cffe68ULL, 0x3c7ab96d5468a107ULL, \
+		0xf7a18709ff1ebc66ULL, 0x448fcbb7fcb9e309ULL, \
+		0x0325b15e575e1c3dULL, 0xb00bfde054f94352ULL, \
+		0x8c71448d0091e255ULL, 0x3f5f08330336bd3aULL, \
+		0x78f572daa8d1420eULL, 0xcbdb3e64ab761d61ULL, \
+		0x7d9ba13851336649ULL, 0xceb5ed8652943926ULL, \
+		0x891f976ff973c612ULL, 0x3a31dbd1fad4997dULL, \
+		0x064b62bcaebc387aULL, 0xb5652e02ad1b6715ULL, \
+		0xf2cf54eb06fc9821ULL, 0x41e11855055bc74eULL, \
+		0x8a3a2631ae2dda2fULL, 0x39146a8fad8a8540ULL, \
+		0x7ebe1066066d7a74ULL, 0xcd905cd805ca251bULL, \
+		0xf1eae5b551a2841cULL, 0x42c4a90b5205db73ULL, \
+		0x056ed3e2f9e22447ULL, 0xb6409f5cfa457b28ULL, \
+		0xfb374270a266cc92ULL, 0x48190ecea1c193fdULL, \
+		0x0fb374270a266cc9ULL, 0xbc9d3899098133a6ULL, \
+		0x80e781f45de992a1ULL, 0x33c9cd4a5e4ecdceULL, \
+		0x7463b7a3f5a932faULL, 0xc74dfb1df60e6d95ULL, \
+		0x0c96c5795d7870f4ULL, 0xbfb889c75edf2f9bULL, \
+		0xf812f32ef538d0afULL, 0x4b3cbf90f69f8fc0ULL, \
+		0x774606fda2f72ec7ULL, 0xc4684a43a15071a8ULL, \
+		0x83c230aa0ab78e9cULL, 0x30ec7c140910d1f3ULL, \
+		0x86ace348f355aadbULL, 0x3582aff6f0f2f5b4ULL, \
+		0x7228d51f5b150a80ULL, 0xc10699a158b255efULL, \
+		0xfd7c20cc0cdaf4e8ULL, 0x4e526c720f7dab87ULL, \
+		0x09f8169ba49a54b3ULL, 0xbad65a25a73d0bdcULL, \
+		0x710d64410c4b16bdULL, 0xc22328ff0fec49d2ULL, \
+		0x85895216a40bb6e6ULL, 0x36a71ea8a7ace989ULL, \
+		0x0adda7c5f3c4488eULL, 0xb9f3eb7bf06317e1ULL, \
+		0xfe5991925b84e8d5ULL, 0x4d77dd2c5823b7baULL, \
+		0x64b62bcaebc387a1ULL, 0xd7986774e864d8ceULL, \
+		0x90321d9d438327faULL, 0x231c512340247895ULL, \
+		0x1f66e84e144cd992ULL, 0xac48a4f017eb86fdULL, \
+		0xebe2de19bc0c79c9ULL, 0x58cc92a7bfab26a6ULL, \
+		0x9317acc314dd3bc7ULL, 0x2039e07d177a64a8ULL, \
+		0x67939a94bc9d9b9cULL, 0xd4bdd62abf3ac4f3ULL, \
+		0xe8c76f47eb5265f4ULL, 0x5be923f9e8f53a9bULL, \
+		0x1c4359104312c5afULL, 0xaf6d15ae40b59ac0ULL, \
+		0x192d8af2baf0e1e8ULL, 0xaa03c64cb957be87ULL, \
+		0xeda9bca512b041b3ULL, 0x5e87f01b11171edcULL, \
+		0x62fd4976457fbfdbULL, 0xd1d305c846d8e0b4ULL, \
+		0x96797f21ed3f1f80ULL, 0x2557339fee9840efULL, \
+		0xee8c0dfb45ee5d8eULL, 0x5da24145464902e1ULL, \
+		0x1a083bacedaefdd5ULL, 0xa9267712ee09a2baULL, \
+		0x955cce7fba6103bdULL, 0x267282c1b9c65cd2ULL, \
+		0x61d8f8281221a3e6ULL, 0xd2f6b4961186fc89ULL, \
+		0x9f8169ba49a54b33ULL, 0x2caf25044a02145cULL, \
+		0x6b055fede1e5eb68ULL, 0xd82b1353e242b407ULL, \
+		0xe451aa3eb62a1500ULL, 0x577fe680b58d4a6fULL, \
+		0x10d59c691e6ab55bULL, 0xa3fbd0d71dcdea34ULL, \
+		0x6820eeb3b6bbf755ULL, 0xdb0ea20db51ca83aULL, \
+		0x9ca4d8e41efb570eULL, 0x2f8a945a1d5c0861ULL, \
+		0x13f02d374934a966ULL, 0xa0de61894a93f609ULL, \
+		0xe7741b60e174093dULL, 0x545a57dee2d35652ULL, \
+		0xe21ac88218962d7aULL, 0x5134843c1b317215ULL, \
+		0x169efed5b0d68d21ULL, 0xa5b0b26bb371d24eULL, \
+		0x99ca0b06e7197349ULL, 0x2ae447b8e4be2c26ULL, \
+		0x6d4e3d514f59d312ULL, 0xde6071ef4cfe8c7dULL, \
+		0x15bb4f8be788911cULL, 0xa6950335e42fce73ULL, \
+		0xe13f79dc4fc83147ULL, 0x521135624c6f6e28ULL, \
+		0x6e6b8c0f1807cf2fULL, 0xdd45c0b11ba09040ULL, \
+		0x9aefba58b0476f74ULL, 0x29c1f6e6b3e0301bULL, \
+		0xc96c5795d7870f42ULL, 0x7a421b2bd420502dULL, \
+		0x3de861c27fc7af19ULL, 0x8ec62d7c7c60f076ULL, \
+		0xb2bc941128085171ULL, 0x0192d8af2baf0e1eULL, \
+		0x4638a2468048f12aULL, 0xf516eef883efae45ULL, \
+		0x3ecdd09c2899b324ULL, 0x8de39c222b3eec4bULL, \
+		0xca49e6cb80d9137fULL, 0x7967aa75837e4c10ULL, \
+		0x451d1318d716ed17ULL, 0xf6335fa6d4b1b278ULL, \
+		0xb199254f7f564d4cULL, 0x02b769f17cf11223ULL, \
+		0xb4f7f6ad86b4690bULL, 0x07d9ba1385133664ULL, \
+		0x4073c0fa2ef4c950ULL, 0xf35d8c442d53963fULL, \
+		0xcf273529793b3738ULL, 0x7c0979977a9c6857ULL, \
+		0x3ba3037ed17b9763ULL, 0x888d4fc0d2dcc80cULL, \
+		0x435671a479aad56dULL, 0xf0783d1a7a0d8a02ULL, \
+		0xb7d247f3d1ea7536ULL, 0x04fc0b4dd24d2a59ULL, \
+		0x3886b22086258b5eULL, 0x8ba8fe9e8582d431ULL, \
+		0xcc0284772e652b05ULL, 0x7f2cc8c92dc2746aULL, \
+		0x325b15e575e1c3d0ULL, 0x8175595b76469cbfULL, \
+		0xc6df23b2dda1638bULL, 0x75f16f0cde063ce4ULL, \
+		0x498bd6618a6e9de3ULL, 0xfaa59adf89c9c28cULL, \
+		0xbd0fe036222e3db8ULL, 0x0e21ac88218962d7ULL, \
+		0xc5fa92ec8aff7fb6ULL, 0x76d4de52895820d9ULL, \
+		0x317ea4bb22bfdfedULL, 0x8250e80521188082ULL, \
+		0xbe2a516875702185ULL, 0x0d041dd676d77eeaULL, \
+		0x4aae673fdd3081deULL, 0xf9802b81de97deb1ULL, \
+		0x4fc0b4dd24d2a599ULL, 0xfceef8632775faf6ULL, \
+		0xbb44828a8c9205c2ULL, 0x086ace348f355aadULL, \
+		0x34107759db5dfbaaULL, 0x873e3be7d8faa4c5ULL, \
+		0xc094410e731d5bf1ULL, 0x73ba0db070ba049eULL, \
+		0xb86133d4dbcc19ffULL, 0x0b4f7f6ad86b4690ULL, \
+		0x4ce50583738cb9a4ULL, 0xffcb493d702be6cbULL, \
+		0xc3b1f050244347ccULL, 0x709fbcee27e418a3ULL, \
+		0x3735c6078c03e797ULL, 0x841b8ab98fa4b8f8ULL, \
+		0xadda7c5f3c4488e3ULL, 0x1ef430e13fe3d78cULL, \
+		0x595e4a08940428b8ULL, 0xea7006b697a377d7ULL, \
+		0xd60abfdbc3cbd6d0ULL, 0x6524f365c06c89bfULL, \
+		0x228e898c6b8b768bULL, 0x91a0c532682c29e4ULL, \
+		0x5a7bfb56c35a3485ULL, 0xe955b7e8c0fd6beaULL, \
+		0xaeffcd016b1a94deULL, 0x1dd181bf68bdcbb1ULL, \
+		0x21ab38d23cd56ab6ULL, 0x9285746c3f7235d9ULL, \
+		0xd52f0e859495caedULL, 0x6601423b97329582ULL, \
+		0xd041dd676d77eeaaULL, 0x636f91d96ed0b1c5ULL, \
+		0x24c5eb30c5374ef1ULL, 0x97eba78ec690119eULL, \
+		0xab911ee392f8b099ULL, 0x18bf525d915feff6ULL, \
+		0x5f1528b43ab810c2ULL, 0xec3b640a391f4fadULL, \
+		0x27e05a6e926952ccULL, 0x94ce16d091ce0da3ULL, \
+		0xd3646c393a29f297ULL, 0x604a2087398eadf8ULL, \
+		0x5c3099ea6de60cffULL, 0xef1ed5546e415390ULL, \
+		0xa8b4afbdc5a6aca4ULL, 0x1b9ae303c601f3cbULL, \
+		0x56ed3e2f9e224471ULL, 0xe5c372919d851b1eULL, \
+		0xa26908783662e42aULL, 0x114744c635c5bb45ULL, \
+		0x2d3dfdab61ad1a42ULL, 0x9e13b115620a452dULL, \
+		0xd9b9cbfcc9edba19ULL, 0x6a978742ca4ae576ULL, \
+		0xa14cb926613cf817ULL, 0x1262f598629ba778ULL, \
+		0x55c88f71c97c584cULL, 0xe6e6c3cfcadb0723ULL, \
+		0xda9c7aa29eb3a624ULL, 0x69b2361c9d14f94bULL, \
+		0x2e184cf536f3067fULL, 0x9d36004b35545910ULL, \
+		0x2b769f17cf112238ULL, 0x9858d3a9ccb67d57ULL, \
+		0xdff2a94067518263ULL, 0x6cdce5fe64f6dd0cULL, \
+		0x50a65c93309e7c0bULL, 0xe388102d33392364ULL, \
+		0xa4226ac498dedc50ULL, 0x170c267a9b79833fULL, \
+		0xdcd7181e300f9e5eULL, 0x6ff954a033a8c131ULL, \
+		0x28532e49984f3e05ULL, 0x9b7d62f79be8616aULL, \
+		0xa707db9acf80c06dULL, 0x14299724cc279f02ULL, \
+		0x5383edcd67c06036ULL, 0xe0ada17364673f59ULL} \
+}
+
+/*
+ * Return the initial CRC seed. Use the value returned from this API as the
+ * "crc" parameter to the first call to add data.
+ */
+static inline uint64_t fman_crc64_init(void)
+{
+	return FMAN_CRC64_ECMA_182.initial;
+}
+
+/* Updates the CRC with arbitrary data */
+static inline uint64_t fman_crc64_update(uint64_t crc,
+					 void *data, unsigned int len)
+{
+	uint8_t *p = data;
+	while (len--)
+		crc = FMAN_CRC64_ECMA_182.table[(crc ^ *(p++)) & 0xff] ^
+				(crc >> 8);
+	return crc;
+}
+
+/* Shorthands for updating the CRC with 8/16/32 bits of data.
+ * IMPORTANT NOTE: the typed "data" arguments should not be mistaken for
+ * host-endian numerical values, the assumption is that these values contain
+ * big-endian (ie. network byte order) data.
+ */
+static inline uint64_t fman_crc64_compute_32bit(uint32_t data, uint64_t crc)
+{
+	return fman_crc64_update(crc, &data, sizeof(data));
+}
+static inline uint64_t fman_crc64_compute_16bit(uint16_t data, uint64_t crc)
+{
+	return fman_crc64_update(crc, &data, sizeof(data));
+}
+static inline uint64_t fman_crc64_compute_8bit(uint8_t data, uint64_t crc)
+{
+	return fman_crc64_update(crc, &data, sizeof(data));
+}
+
+/*
+ * Finalise the CRC (using 2's complement)
+ */
+static inline uint64_t fman_crc64_finish(uint64_t seed)
+{
+	return ~seed;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __FSL_FMAN_CRC64_H */
-- 
2.9.3

  parent reply	other threads:[~2017-09-28 11:23 UTC|newest]

Thread overview: 367+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-16  5:40 [PATCH 00/38] Introduce NXP DPAA Bus, Mempool and PMD Shreyansh Jain
2017-06-16  5:40 ` [PATCH 01/38] eal: add support for 24 40 and 48 bit operations Shreyansh Jain
2017-06-16  8:57   ` Bruce Richardson
2017-06-16  9:21     ` Shreyansh Jain
2017-06-16  9:42       ` Thomas Monjalon
2017-06-16 10:34       ` Adrien Mazarguil
2017-06-19 11:00         ` Shreyansh Jain
2017-06-19 13:52           ` Wiles, Keith
2017-06-20 10:43             ` Hemant Agrawal
2017-06-20 14:34               ` Wiles, Keith
2017-06-21  8:17                 ` Hemant Agrawal
2017-06-21  8:32                   ` Bruce Richardson
2017-06-21  9:02                   ` Adrien Mazarguil
2017-10-02 10:16   ` Avi Kivity
2017-06-16  5:40 ` [PATCH 02/38] config: add NXP DPAA SoC build configuration Shreyansh Jain
2017-06-16  5:40 ` [PATCH 03/38] bus/dpaa: introduce NXP DPAA Bus driver skeleton Shreyansh Jain
2017-06-16  5:40 ` [PATCH 04/38] bus/dpaa: add compatibility and helper macros Shreyansh Jain
2017-06-16  5:40 ` [PATCH 05/38] bus/dpaa: add OF parser for device scanning Shreyansh Jain
2017-06-16  5:40 ` [PATCH 06/38] bus/dpaa: introducing FMan configurations Shreyansh Jain
2017-06-16  5:40 ` [PATCH 07/38] bus/dpaa: add FMan hardware operations Shreyansh Jain
2017-06-16  5:40 ` [PATCH 08/38] bus/dpaa: enable DPAA IOCTL portal driver Shreyansh Jain
2017-06-16  5:40 ` [PATCH 09/38] bus/dpaa: add layer for interrupt emulation using pthread Shreyansh Jain
2017-06-16  5:40 ` [PATCH 10/38] bus/dpaa: add routines for managing a RB tree Shreyansh Jain
2017-06-16  5:40 ` [PATCH 11/38] bus/dpaa: add QMAN interface driver Shreyansh Jain
2017-06-16  5:40 ` [PATCH 12/38] bus/dpaa: add QMan driver core routines Shreyansh Jain
2017-06-16  5:40 ` [PATCH 13/38] bus/dpaa: add BMAN driver core Shreyansh Jain
2017-06-16  5:40 ` [PATCH 14/38] bus/dpaa: add support for FMAN frame queue lookup Shreyansh Jain
2017-06-16  5:40 ` [PATCH 15/38] bus/dpaa: add BMan hardware interfaces Shreyansh Jain
2017-06-16  5:40 ` [PATCH 16/38] bus/dpaa: add fman flow control threshold setting Shreyansh Jain
2017-06-16  5:40 ` [PATCH 17/38] bus/dpaa: integrate DPAA Bus with hardware blocks Shreyansh Jain
2017-06-16  5:40 ` [PATCH 18/38] doc: add NXP DPAA PMD documentation Shreyansh Jain
2017-06-28 15:51   ` Ferruh Yigit
2017-06-29 14:17     ` Shreyansh Jain
2017-06-16  5:40 ` [PATCH 19/38] mempool/dpaa: add support for NXP DPAA Mempool Shreyansh Jain
2017-06-16  5:40 ` [PATCH 20/38] maintainers: claim ownership of DPAA Mempool driver Shreyansh Jain
2017-06-16  5:40 ` [PATCH 21/38] drivers: enable compilation " Shreyansh Jain
2017-06-16  5:40 ` [PATCH 22/38] net/dpaa: add NXP DPAA PMD driver skeleton Shreyansh Jain
2017-06-28 15:41   ` Ferruh Yigit
2017-06-29 14:29     ` Shreyansh Jain
2017-07-02  6:47       ` Shreyansh Jain
2017-06-16  5:40 ` [PATCH 23/38] config: enable NXP DPAA PMD compilation Shreyansh Jain
2017-06-16  5:40 ` [PATCH 24/38] net/dpaa: add support for Tx and Rx queue setup Shreyansh Jain
2017-06-28 15:45   ` Ferruh Yigit
2017-06-29 14:55     ` Shreyansh Jain
2017-06-29 15:41       ` Ferruh Yigit
2017-06-30 11:48         ` Shreyansh Jain
2017-07-04 14:50         ` Shreyansh Jain
2017-06-16  5:40 ` [PATCH 25/38] net/dpaa: add support for MTU update Shreyansh Jain
2017-06-28 15:45   ` Ferruh Yigit
2017-06-29 14:56     ` Shreyansh Jain
2017-06-29 15:43       ` Ferruh Yigit
2017-06-16  5:40 ` [PATCH 26/38] net/dpaa: add support for jumbo frames Shreyansh Jain
2017-06-16  5:40 ` [PATCH 27/38] net/dpaa: add support for link status update Shreyansh Jain
2017-06-28 15:46   ` Ferruh Yigit
2017-06-29 14:57     ` Shreyansh Jain
2017-06-16  5:40 ` [PATCH 28/38] net/dpaa: add support for device info Shreyansh Jain
2017-06-16  5:40 ` [PATCH 29/38] net/dpaa: add support for promiscuous toggle Shreyansh Jain
2017-06-16  5:41 ` [PATCH 30/38] net/dpaa: add support for multicast toggle Shreyansh Jain
2017-06-28 15:47   ` Ferruh Yigit
2017-06-29 14:58     ` Shreyansh Jain
2017-06-16  5:41 ` [PATCH 31/38] net/dpaa: add support for basic stats Shreyansh Jain
2017-06-16  5:41 ` [PATCH 32/38] net/dpaa: add support for MAC address update Shreyansh Jain
2017-06-16  5:41 ` [PATCH 33/38] net/dpaa: add support for flow control Shreyansh Jain
2017-06-28 15:47   ` Ferruh Yigit
2017-06-30  9:37     ` Shreyansh Jain
2017-06-16  5:41 ` [PATCH 34/38] net/dpaa: add support for hashed RSS Shreyansh Jain
2017-06-28 15:48   ` Ferruh Yigit
2017-06-30 10:31     ` Shreyansh Jain
2017-06-30 11:39       ` Ferruh Yigit
2017-07-04 14:49         ` Shreyansh Jain
2017-06-16  5:41 ` [PATCH 35/38] net/dpaa: add support for packet type parsing Shreyansh Jain
2017-06-28 15:50   ` Ferruh Yigit
2017-06-30 11:40     ` Shreyansh Jain
2017-07-04 12:11       ` Shreyansh Jain
2017-06-16  5:41 ` [PATCH 36/38] net/dpaa: add support for checksum offload Shreyansh Jain
2017-06-28 15:50   ` Ferruh Yigit
2017-07-04 14:48     ` Shreyansh Jain
2017-06-16  5:41 ` [PATCH 37/38] net/dpaa: add support for Scattered Rx Shreyansh Jain
2017-06-16  5:41 ` [PATCH 38/38] net/dpaa: add packet dump for debugging Shreyansh Jain
2017-06-28 15:51   ` Ferruh Yigit
2017-06-30 11:47     ` Shreyansh Jain
2017-07-04 14:43 ` [PATCH v2 00/40] Introduce NXP DPAA Bus, Mempool and PMD Shreyansh Jain
2017-07-04 14:43   ` [PATCH v2 01/40] config: add NXP DPAA SoC build configuration Shreyansh Jain
2017-07-04 14:43   ` [PATCH v2 02/40] bus/dpaa: introduce NXP DPAA Bus driver skeleton Shreyansh Jain
2017-07-04 14:43   ` [PATCH v2 03/40] bus/dpaa: add compatibility and helper macros Shreyansh Jain
2017-07-04 14:43   ` [PATCH v2 04/40] bus/dpaa: add OF parser for device scanning Shreyansh Jain
2017-07-04 14:43   ` [PATCH v2 05/40] bus/dpaa: introducing FMan configurations Shreyansh Jain
2017-07-04 14:43   ` [PATCH v2 06/40] bus/dpaa: add FMan hardware operations Shreyansh Jain
2017-07-04 14:43   ` [PATCH v2 07/40] bus/dpaa: enable DPAA IOCTL portal driver Shreyansh Jain
2017-07-04 14:43   ` [PATCH v2 08/40] bus/dpaa: add layer for interrupt emulation using pthread Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 09/40] bus/dpaa: add routines for managing a RB tree Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 10/40] bus/dpaa: add QMAN interface driver Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 11/40] bus/dpaa: add QMan driver core routines Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 12/40] bus/dpaa: add BMAN driver core Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 13/40] bus/dpaa: add support for FMAN frame queue lookup Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 14/40] bus/dpaa: add BMan hardware interfaces Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 15/40] bus/dpaa: add fman flow control threshold setting Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 16/40] bus/dpaa: integrate DPAA Bus with hardware blocks Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 17/40] doc: add NXP DPAA PMD documentation Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 18/40] bus/dpaa: add DPAA mempool logging macros Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 19/40] mempool/dpaa: add support for NXP DPAA Mempool Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 20/40] drivers: enable compilation of DPAA Mempool driver Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 21/40] maintainers: claim ownership " Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 22/40] bus/dpaa: add DPAA PMD logging macros Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 23/40] net/dpaa: add NXP DPAA PMD driver skeleton Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 24/40] config: enable NXP DPAA PMD compilation Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 25/40] net/dpaa: add support for Tx and Rx queue setup Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 26/40] net/dpaa: add support for MTU update Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 27/40] net/dpaa: add support for jumbo frames Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 28/40] net/dpaa: add support for link status update Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 29/40] net/dpaa: add support for device info and speed capability Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 30/40] net/dpaa: add support for promiscuous toggle Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 31/40] net/dpaa: add support for multicast toggle Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 32/40] net/dpaa: add support for MAC address update Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 33/40] net/dpaa: add support for basic stats Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 34/40] net/dpaa: add support for flow control Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 35/40] net/dpaa: add support for hashed RSS Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 36/40] net/dpaa: add support for packet type parsing Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 37/40] net/dpaa: add support for checksum offload Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 38/40] net/dpaa: add support for Scattered Rx Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 39/40] net/dpaa: add packet dump for debugging Shreyansh Jain
2017-07-04 14:44   ` [PATCH v2 40/40] net/dpaa: support for firmware version get API Shreyansh Jain
2017-07-05  0:13   ` [PATCH v2 00/40] Introduce NXP DPAA Bus, Mempool and PMD Thomas Monjalon
2017-07-05  4:38     ` Shreyansh Jain
2017-07-05  6:28       ` Thomas Monjalon
2017-08-23 14:11   ` [PATCH v3 " Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 01/40] config: add NXP DPAA SoC build configuration Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 02/40] bus/dpaa: introduce NXP DPAA Bus driver skeleton Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 03/40] bus/dpaa: add compatibility and helper macros Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 04/40] bus/dpaa: add OF parser for device scanning Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 05/40] bus/dpaa: introducing FMan configurations Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 06/40] bus/dpaa: add FMan hardware operations Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 07/40] bus/dpaa: enable DPAA IOCTL portal driver Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 08/40] bus/dpaa: add layer for interrupt emulation using pthread Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 09/40] bus/dpaa: add routines for managing a RB tree Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 10/40] bus/dpaa: add QMAN interface driver Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 11/40] bus/dpaa: add QMan driver core routines Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 12/40] bus/dpaa: add BMAN driver core Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 13/40] bus/dpaa: add support for FMAN frame queue lookup Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 14/40] bus/dpaa: add BMan hardware interfaces Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 15/40] bus/dpaa: add fman flow control threshold setting Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 16/40] bus/dpaa: integrate DPAA Bus with hardware blocks Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 17/40] doc: add NXP DPAA PMD documentation Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 18/40] bus/dpaa: add DPAA mempool logging macros Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 19/40] mempool/dpaa: add support for NXP DPAA Mempool Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 20/40] drivers: enable compilation of DPAA Mempool driver Shreyansh Jain
2017-09-21 21:55       ` Thomas Monjalon
2017-09-22  6:35         ` Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 21/40] maintainers: claim ownership " Shreyansh Jain
2017-09-21 21:56       ` Thomas Monjalon
2017-09-22  6:47         ` Shreyansh Jain
2017-09-22  6:53           ` Thomas Monjalon
2017-09-22  7:37             ` Shreyansh Jain
2017-09-22  7:35               ` Thomas Monjalon
2017-09-27  8:30                 ` Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 22/40] bus/dpaa: add DPAA PMD logging macros Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 23/40] net/dpaa: add NXP DPAA PMD driver skeleton Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 24/40] config: enable NXP DPAA PMD compilation Shreyansh Jain
2017-09-21 22:03       ` Thomas Monjalon
2017-09-22  6:51         ` Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 25/40] net/dpaa: add support for Tx and Rx queue setup Shreyansh Jain
2017-08-23 14:11     ` [PATCH v3 26/40] net/dpaa: add support for MTU update Shreyansh Jain
2017-09-21 22:07       ` Thomas Monjalon
2017-09-22  6:48         ` Shreyansh Jain
2017-08-23 14:12     ` [PATCH v3 27/40] net/dpaa: add support for jumbo frames Shreyansh Jain
2017-08-23 14:12     ` [PATCH v3 28/40] net/dpaa: add support for link status update Shreyansh Jain
2017-08-23 14:12     ` [PATCH v3 29/40] net/dpaa: add support for device info and speed capability Shreyansh Jain
2017-08-23 14:12     ` [PATCH v3 30/40] net/dpaa: add support for promiscuous toggle Shreyansh Jain
2017-08-23 14:12     ` [PATCH v3 31/40] net/dpaa: add support for multicast toggle Shreyansh Jain
2017-08-23 14:12     ` [PATCH v3 32/40] net/dpaa: add support for MAC address update Shreyansh Jain
2017-08-23 14:12     ` [PATCH v3 33/40] net/dpaa: add support for basic stats Shreyansh Jain
2017-08-23 14:12     ` [PATCH v3 34/40] net/dpaa: add support for flow control Shreyansh Jain
2017-08-23 14:12     ` [PATCH v3 35/40] net/dpaa: add support for hashed RSS Shreyansh Jain
2017-08-23 14:12     ` [PATCH v3 36/40] net/dpaa: add support for packet type parsing Shreyansh Jain
2017-08-23 14:12     ` [PATCH v3 37/40] net/dpaa: add support for checksum offload Shreyansh Jain
2017-08-23 14:12     ` [PATCH v3 38/40] net/dpaa: add support for Scattered Rx Shreyansh Jain
2017-08-23 14:12     ` [PATCH v3 39/40] net/dpaa: add packet dump for debugging Shreyansh Jain
2017-08-23 14:12     ` [PATCH v3 40/40] net/dpaa: support for firmware version get API Shreyansh Jain
2017-09-09 11:20     ` [PATCH v4 00/41] Introduce NXP DPAA Bus, Mempool and PMD Shreyansh Jain
2017-09-09 11:20       ` [PATCH v4 01/41] config: add NXP DPAA SoC build configuration Shreyansh Jain
2017-09-09 11:20       ` [PATCH v4 02/41] bus/dpaa: introduce NXP DPAA Bus driver skeleton Shreyansh Jain
2017-09-18 14:47         ` Ferruh Yigit
2017-09-19 13:14           ` Shreyansh Jain
2017-09-19 13:33             ` Ferruh Yigit
2017-09-25 14:32             ` Shreyansh Jain
2017-09-25 15:11               ` Ferruh Yigit
2017-09-26 11:26                 ` Shreyansh Jain
2017-09-27  9:30                 ` Shreyansh Jain
2017-09-09 11:20       ` [PATCH v4 03/41] bus/dpaa: add compatibility and helper macros Shreyansh Jain
2017-09-18 14:49         ` Ferruh Yigit
2017-09-19 13:18           ` Shreyansh Jain
2017-09-19 13:40             ` Ferruh Yigit
2017-09-19 13:57               ` Shreyansh Jain
2017-09-26 12:43                 ` Shreyansh Jain
2017-09-27 23:09                   ` Ferruh Yigit
2017-09-09 11:20       ` [PATCH v4 04/41] bus/dpaa: add OF parser for device scanning Shreyansh Jain
2017-09-18 14:49         ` Ferruh Yigit
2017-09-19 13:37           ` Shreyansh Jain
2017-09-19 14:15             ` Ferruh Yigit
2017-09-19 20:01               ` Thomas Monjalon
2017-09-20 20:39                 ` Jan Viktorin
2017-09-09 11:20       ` [PATCH v4 05/41] bus/dpaa: introducing FMan configurations Shreyansh Jain
2017-09-18 14:50         ` Ferruh Yigit
2017-09-18 16:15           ` Thomas Monjalon
2017-09-18 17:12             ` Hemant Agrawal
2017-09-19 13:43           ` Shreyansh Jain
2017-09-09 11:20       ` [PATCH v4 06/41] bus/dpaa: add FMan hardware operations Shreyansh Jain
2017-09-09 11:20       ` [PATCH v4 07/41] bus/dpaa: enable DPAA IOCTL portal driver Shreyansh Jain
2017-09-18 14:51         ` Ferruh Yigit
2017-09-19 14:17           ` Shreyansh Jain
2017-09-09 11:20       ` [PATCH v4 08/41] bus/dpaa: add layer for interrupt emulation using pthread Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 09/41] bus/dpaa: add routines for managing a RB tree Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 10/41] bus/dpaa: add QMAN interface driver Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 11/41] bus/dpaa: add QMan driver core routines Shreyansh Jain
2017-09-18 14:53         ` Ferruh Yigit
2017-09-19 14:18           ` Shreyansh Jain
2017-09-28 11:45             ` Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 12/41] bus/dpaa: add BMAN driver core Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 13/41] bus/dpaa: add support for FMAN frame queue lookup Shreyansh Jain
2017-09-18 14:51         ` Ferruh Yigit
2017-09-28 11:47           ` Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 14/41] bus/dpaa: add BMan hardware interfaces Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 15/41] bus/dpaa: add fman flow control threshold setting Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 16/41] bus/dpaa: integrate DPAA Bus with hardware blocks Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 17/41] doc: add NXP DPAA PMD documentation Shreyansh Jain
2017-09-18 14:53         ` Ferruh Yigit
2017-09-19 14:25           ` Shreyansh Jain
2017-09-28 11:49             ` Shreyansh Jain
2017-09-18 18:33         ` Mcnamara, John
2017-09-09 11:21       ` [PATCH v4 18/41] bus/dpaa: add DPAA mempool logging macros Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 19/41] mempool/dpaa: add support for NXP DPAA Mempool Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 20/41] drivers: enable compilation of DPAA Mempool driver Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 21/41] maintainers: claim ownership " Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 22/41] bus/dpaa: add DPAA PMD logging macros Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 23/41] net/dpaa: add NXP DPAA PMD driver skeleton Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 24/41] config: enable NXP DPAA PMD compilation Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 25/41] net/dpaa: add support for Tx and Rx queue setup Shreyansh Jain
2017-09-18 14:55         ` Ferruh Yigit
2017-09-21 12:59           ` Shreyansh Jain
2017-09-28 11:51             ` Shreyansh Jain
2017-09-18 14:55         ` Ferruh Yigit
2017-09-21 13:00           ` Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 26/41] net/dpaa: add support for MTU update Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 27/41] net/dpaa: add support for jumbo frames Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 28/41] net/dpaa: add support for link status update Shreyansh Jain
2017-09-18 14:56         ` Ferruh Yigit
2017-09-21 13:09           ` Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 29/41] net/dpaa: add support for device info and speed capability Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 30/41] net/dpaa: add support for promiscuous toggle Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 31/41] net/dpaa: add support for multicast toggle Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 32/41] net/dpaa: add support for MAC address update Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 33/41] net/dpaa: add support for basic stats Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 34/41] net/dpaa: add support for flow control Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 35/41] net/dpaa: add support for hashed RSS Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 36/41] net/dpaa: add support for packet type parsing Shreyansh Jain
2017-09-18 14:56         ` Ferruh Yigit
2017-09-21 13:16           ` Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 37/41] net/dpaa: add support for checksum offload Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 38/41] net/dpaa: add support for Scattered Rx Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 39/41] net/dpaa: add packet dump for debugging Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 40/41] net/dpaa: support for firmware version get API Shreyansh Jain
2017-09-18 14:57         ` Ferruh Yigit
2017-09-21 13:18           ` Shreyansh Jain
2017-09-09 11:21       ` [PATCH v4 41/41] net/dpaa: support for extended statistics Shreyansh Jain
2017-09-18 14:57         ` Ferruh Yigit
2017-09-21 13:26           ` Shreyansh Jain
2017-09-27  8:26             ` Shreyansh Jain
2017-09-27 23:37               ` Ferruh Yigit
2017-09-28  2:30                 ` Shreyansh Jain
2017-09-28  2:52                   ` Shreyansh Jain
2017-09-28  9:26                     ` Ferruh Yigit
2017-09-21 22:09       ` [PATCH v4 00/41] Introduce NXP DPAA Bus, Mempool and PMD Thomas Monjalon
2017-09-21 22:10       ` Thomas Monjalon
2017-09-22  6:25         ` Shreyansh Jain
2017-09-22  6:33           ` Thomas Monjalon
2017-09-22 13:06         ` Shreyansh Jain
2017-09-22 13:13           ` Thomas Monjalon
2017-09-22 14:00             ` Shreyansh Jain
2017-09-22 14:19               ` Thomas Monjalon
2017-09-23 10:39                 ` Shreyansh Jain
2017-09-28 11:33       ` [PATCH v5 00/40] " Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 01/40] config: add NXP DPAA SoC build configuration Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 02/40] bus/dpaa: introduce NXP DPAA Bus driver skeleton Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 03/40] bus/dpaa: add compatibility and helper macros Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 04/40] bus/dpaa: add OF parser for device scanning Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 05/40] bus/dpaa: introducing FMan configurations Shreyansh Jain
2017-09-28 11:33         ` Shreyansh Jain [this message]
2017-09-28 11:33         ` [PATCH v5 07/40] bus/dpaa: enable DPAA IOCTL portal driver Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 08/40] bus/dpaa: add layer for interrupt emulation using pthread Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 09/40] bus/dpaa: add routines for managing a RB tree Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 10/40] bus/dpaa: add QMAN interface driver Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 11/40] bus/dpaa: add QMan driver core routines Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 12/40] bus/dpaa: add BMAN driver core Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 13/40] bus/dpaa: support FMAN frame queue lookup Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 14/40] bus/dpaa: add BMan hardware interfaces Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 15/40] bus/dpaa: add fman flow control threshold setting Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 16/40] bus/dpaa: integrate DPAA Bus with hardware blocks Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 17/40] doc: add NXP DPAA PMD documentation Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 18/40] bus/dpaa: add DPAA mempool logging macros Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 19/40] mempool/dpaa: support NXP DPAA Mempool Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 20/40] config: enable compilation of DPAA Mempool driver Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 21/40] bus/dpaa: add DPAA PMD logging macros Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 22/40] net/dpaa: add NXP DPAA PMD driver skeleton Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 23/40] config: enable NXP DPAA PMD compilation Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 24/40] net/dpaa: support Tx and Rx queue setup Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 25/40] net/dpaa: support MTU update Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 26/40] net/dpaa: support jumbo frames Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 27/40] net/dpaa: support link status update Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 28/40] net/dpaa: support device info and speed capability Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 29/40] net/dpaa: support promiscuous toggle Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 30/40] net/dpaa: support multicast toggle Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 31/40] net/dpaa: support MAC address update Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 32/40] net/dpaa: support basic stats Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 33/40] net/dpaa: support flow control Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 34/40] net/dpaa: support hashed RSS Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 35/40] net/dpaa: support packet type parsing Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 36/40] net/dpaa: support checksum offload Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 37/40] net/dpaa: support Scattered Rx Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 38/40] net/dpaa: add packet dump for debugging Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 39/40] net/dpaa: support firmware version get API Shreyansh Jain
2017-09-28 11:33         ` [PATCH v5 40/40] net/dpaa: support extended statistics Shreyansh Jain
2017-09-28 12:29         ` [PATCH v6 00/40] Introduce NXP DPAA Bus, Mempool and PMD Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 01/40] config: add NXP DPAA SoC build configuration Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 02/40] bus/dpaa: introduce NXP DPAA Bus driver skeleton Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 03/40] bus/dpaa: add compatibility and helper macros Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 04/40] bus/dpaa: add OF parser for device scanning Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 05/40] bus/dpaa: introducing FMan configurations Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 06/40] bus/dpaa: add FMan hardware operations Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 07/40] bus/dpaa: enable DPAA IOCTL portal driver Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 08/40] bus/dpaa: add layer for interrupt emulation using pthread Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 09/40] bus/dpaa: add routines for managing a RB tree Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 10/40] bus/dpaa: add QMAN interface driver Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 11/40] bus/dpaa: add QMan driver core routines Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 12/40] bus/dpaa: add BMAN driver core Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 13/40] bus/dpaa: support FMAN frame queue lookup Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 14/40] bus/dpaa: add BMan hardware interfaces Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 15/40] bus/dpaa: add fman flow control threshold setting Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 16/40] bus/dpaa: integrate DPAA Bus with hardware blocks Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 17/40] doc: add NXP DPAA PMD documentation Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 18/40] bus/dpaa: add DPAA mempool logging macros Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 19/40] mempool/dpaa: support NXP DPAA Mempool Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 20/40] config: enable compilation of DPAA Mempool driver Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 21/40] bus/dpaa: add DPAA PMD logging macros Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 22/40] net/dpaa: add NXP DPAA PMD driver skeleton Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 23/40] config: enable NXP DPAA PMD compilation Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 24/40] net/dpaa: support Tx and Rx queue setup Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 25/40] net/dpaa: support MTU update Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 26/40] net/dpaa: support jumbo frames Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 27/40] net/dpaa: support link status update Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 28/40] net/dpaa: support device info and speed capability Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 29/40] net/dpaa: support promiscuous toggle Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 30/40] net/dpaa: support multicast toggle Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 31/40] net/dpaa: support MAC address update Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 32/40] net/dpaa: support basic stats Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 33/40] net/dpaa: support flow control Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 34/40] net/dpaa: support hashed RSS Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 35/40] net/dpaa: support packet type parsing Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 36/40] net/dpaa: support checksum offload Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 37/40] net/dpaa: support Scattered Rx Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 38/40] net/dpaa: add packet dump for debugging Shreyansh Jain
2017-09-28 12:29           ` [PATCH v6 39/40] net/dpaa: support firmware version get API Shreyansh Jain
2017-09-28 12:30           ` [PATCH v6 40/40] net/dpaa: support extended statistics Shreyansh Jain
2017-09-28 14:10           ` [PATCH 1/2] bus/dpaa: fix incorrect ccsr mem allocation Shreyansh Jain
2017-09-28 14:10             ` [PATCH 2/2] config: fix DPAA PMD linking Shreyansh Jain
2017-09-28 14:12             ` [PATCH 1/2] bus/dpaa: fix incorrect ccsr mem allocation Shreyansh Jain
2017-10-02 23:05             ` Ferruh Yigit
2017-10-02 23:05           ` [PATCH v6 00/40] Introduce NXP DPAA Bus, Mempool and PMD Ferruh Yigit

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