From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751267AbdJBJOj (ORCPT ); Mon, 2 Oct 2017 05:14:39 -0400 Received: from mx2.suse.de ([195.135.220.15]:43380 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751241AbdJBJM4 (ORCPT ); Mon, 2 Oct 2017 05:12:56 -0400 From: Jiri Slaby To: mingo@redhat.com Cc: tglx@linutronix.de, hpa@zytor.com, x86@kernel.org, linux-kernel@vger.kernel.org, Jiri Slaby , Boris Ostrovsky , Juergen Gross , xen-devel@lists.xenproject.org Subject: [PATCH v4 21/27] x86_64: assembly, add ENDs to some functions and relabel with SYM_CODE_* Date: Mon, 2 Oct 2017 11:12:40 +0200 Message-Id: <20171002091246.28432-21-jslaby@suse.cz> X-Mailer: git-send-email 2.14.2 In-Reply-To: <20171002091246.28432-1-jslaby@suse.cz> References: <20171002091246.28432-1-jslaby@suse.cz> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org All these are functions which are invoked from elsewhere, but they are not typical C functions. So we annotate them (as global) using the new SYM_CODE_START. All these were not balanced with any END, so mark their ends by SYM_CODE_END, appropriatelly. Signed-off-by: Jiri Slaby Cc: Boris Ostrovsky Cc: Juergen Gross Cc: Thomas Gleixner Cc: Ingo Molnar Cc: "H. Peter Anvin" Cc: x86@kernel.org Cc: xen-devel@lists.xenproject.org --- arch/x86/boot/compressed/head_64.S | 3 ++- arch/x86/platform/olpc/xo1-wakeup.S | 3 ++- arch/x86/power/hibernate_asm_64.S | 6 ++++-- arch/x86/realmode/rm/reboot.S | 3 ++- arch/x86/realmode/rm/trampoline_64.S | 10 +++++++--- arch/x86/realmode/rm/wakeup_asm.S | 3 ++- arch/x86/xen/xen-asm_64.S | 6 ++++-- 7 files changed, 23 insertions(+), 11 deletions(-) diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S index 1a2dd7b18a40..11b8ebc2f08a 100644 --- a/arch/x86/boot/compressed/head_64.S +++ b/arch/x86/boot/compressed/head_64.S @@ -232,7 +232,7 @@ ENDPROC(efi32_stub_entry) .code64 .org 0x200 -ENTRY(startup_64) +SYM_CODE_START(startup_64) /* * 64bit entry is 0x200 and it is ABI so immutable! * We come here either from startup_32 or directly from a @@ -352,6 +352,7 @@ lvl5: */ leaq relocated(%rbx), %rax jmp *%rax +SYM_CODE_END(startup_64) #ifdef CONFIG_EFI_STUB diff --git a/arch/x86/platform/olpc/xo1-wakeup.S b/arch/x86/platform/olpc/xo1-wakeup.S index 948deb289753..71ff5814fca4 100644 --- a/arch/x86/platform/olpc/xo1-wakeup.S +++ b/arch/x86/platform/olpc/xo1-wakeup.S @@ -89,7 +89,7 @@ restore_registers: ret -ENTRY(do_olpc_suspend_lowlevel) +SYM_CODE_START(do_olpc_suspend_lowlevel) call save_processor_state call save_registers @@ -109,6 +109,7 @@ ret_point: call restore_registers call restore_processor_state ret +SYM_CODE_END(do_olpc_suspend_lowlevel) .data saved_gdt: .long 0,0 diff --git a/arch/x86/power/hibernate_asm_64.S b/arch/x86/power/hibernate_asm_64.S index ce8da3a0412c..44755a847856 100644 --- a/arch/x86/power/hibernate_asm_64.S +++ b/arch/x86/power/hibernate_asm_64.S @@ -53,7 +53,7 @@ ENTRY(swsusp_arch_suspend) ret ENDPROC(swsusp_arch_suspend) -ENTRY(restore_image) +SYM_CODE_START(restore_image) /* prepare to jump to the image kernel */ movq restore_jump_address(%rip), %r8 movq restore_cr3(%rip), %r9 @@ -68,9 +68,10 @@ ENTRY(restore_image) /* jump to relocated restore code */ movq relocated_restore_code(%rip), %rcx jmpq *%rcx +SYM_CODE_END(restore_image) /* code below has been relocated to a safe page */ -ENTRY(core_restore_code) +SYM_CODE_START(core_restore_code) /* switch to temporary page tables */ movq %rax, %cr3 /* flush TLB */ @@ -98,6 +99,7 @@ ENTRY(core_restore_code) .Ldone: /* jump to the restore_registers address from the image header */ jmpq *%r8 +SYM_CODE_END(core_restore_code) /* code below belongs to the image kernel */ .align PAGE_SIZE diff --git a/arch/x86/realmode/rm/reboot.S b/arch/x86/realmode/rm/reboot.S index 49cf0f9d513e..ff01bc5b485d 100644 --- a/arch/x86/realmode/rm/reboot.S +++ b/arch/x86/realmode/rm/reboot.S @@ -18,7 +18,7 @@ */ .section ".text32", "ax" .code32 -ENTRY(machine_real_restart_asm) +SYM_CODE_START(machine_real_restart_asm) #ifdef CONFIG_X86_64 /* Switch to trampoline GDT as it is guaranteed < 4 GiB */ @@ -62,6 +62,7 @@ SYM_CODE_INNER_LABEL_NOALIGN(machine_real_restart_paging_off, SYM_V_GLOBAL) movl %ecx, %gs movl %ecx, %ss ljmpw $8, $1f +SYM_CODE_END(machine_real_restart_asm) /* * This is 16-bit protected mode code to disable paging and the cache, diff --git a/arch/x86/realmode/rm/trampoline_64.S b/arch/x86/realmode/rm/trampoline_64.S index 7f579f8dfcd9..2d02e38b68aa 100644 --- a/arch/x86/realmode/rm/trampoline_64.S +++ b/arch/x86/realmode/rm/trampoline_64.S @@ -37,7 +37,7 @@ .code16 .balign PAGE_SIZE -ENTRY(trampoline_start) +SYM_CODE_START(trampoline_start) cli # We should be safe anyway wbinvd @@ -80,12 +80,14 @@ ENTRY(trampoline_start) no_longmode: hlt jmp no_longmode +SYM_CODE_END(trampoline_start) + #include "../kernel/verify_cpu.S" .section ".text32","ax" .code32 .balign 4 -ENTRY(startup_32) +SYM_CODE_START(startup_32) movl %edx, %ss addl $pa_real_mode_base, %esp movl %edx, %ds @@ -139,13 +141,15 @@ ENTRY(startup_32) * the new gdt/idt that has __KERNEL_CS with CS.L = 1. */ ljmpl $__KERNEL_CS, $pa_startup_64 +SYM_CODE_END(startup_32) .section ".text64","ax" .code64 .balign 4 -ENTRY(startup_64) +SYM_CODE_START(startup_64) # Now jump into the kernel using virtual addresses jmpq *tr_start(%rip) +SYM_CODE_END(startup_64) .section ".rodata","a" # Duplicate the global descriptor table diff --git a/arch/x86/realmode/rm/wakeup_asm.S b/arch/x86/realmode/rm/wakeup_asm.S index 4eaad1c4aed1..30e14a513e5e 100644 --- a/arch/x86/realmode/rm/wakeup_asm.S +++ b/arch/x86/realmode/rm/wakeup_asm.S @@ -36,7 +36,7 @@ SYM_DATA_END(wakeup_header) .code16 .balign 16 -ENTRY(wakeup_start) +SYM_CODE_START(wakeup_start) cli cld @@ -134,6 +134,7 @@ ENTRY(wakeup_start) #else jmp trampoline_start #endif +SYM_CODE_END(wakeup_start) bogus_real_magic: 1: diff --git a/arch/x86/xen/xen-asm_64.S b/arch/x86/xen/xen-asm_64.S index f7e9a8344910..4afa50c40f12 100644 --- a/arch/x86/xen/xen-asm_64.S +++ b/arch/x86/xen/xen-asm_64.S @@ -69,11 +69,12 @@ hypercall_iret = hypercall_page + __HYPERVISOR_iret * 32 * r11 }<-- pushed by hypercall page * rsp->rax } */ -ENTRY(xen_iret) +SYM_CODE_START(xen_iret) pushq $0 jmp hypercall_iret +SYM_CODE_END(xen_iret) -ENTRY(xen_sysret64) +SYM_CODE_START(xen_sysret64) /* * We're already on the usermode stack at this point, but * still with the kernel gs, so we can easily switch back @@ -89,6 +90,7 @@ ENTRY(xen_sysret64) pushq $VGCF_in_syscall jmp hypercall_iret +SYM_CODE_END(xen_sysret64) /* * Xen handles syscall callbacks much like ordinary exceptions, which -- 2.14.2 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jiri Slaby Subject: [PATCH v4 21/27] x86_64: assembly, add ENDs to some functions and relabel with SYM_CODE_* Date: Mon, 2 Oct 2017 11:12:40 +0200 Message-ID: <20171002091246.28432-21-jslaby@suse.cz> References: <20171002091246.28432-1-jslaby@suse.cz> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dywmX-00028n-7w for xen-devel@lists.xenproject.org; Mon, 02 Oct 2017 09:12:57 +0000 In-Reply-To: <20171002091246.28432-1-jslaby@suse.cz> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" To: mingo@redhat.com Cc: Juergen Gross , x86@kernel.org, linux-kernel@vger.kernel.org, hpa@zytor.com, xen-devel@lists.xenproject.org, Boris Ostrovsky , Jiri Slaby , tglx@linutronix.de List-Id: xen-devel@lists.xenproject.org QWxsIHRoZXNlIGFyZSBmdW5jdGlvbnMgd2hpY2ggYXJlIGludm9rZWQgZnJvbSBlbHNld2hlcmUs IGJ1dCB0aGV5IGFyZQpub3QgdHlwaWNhbCBDIGZ1bmN0aW9ucy4gU28gd2UgYW5ub3RhdGUgdGhl bSAoYXMgZ2xvYmFsKSB1c2luZyB0aGUgbmV3ClNZTV9DT0RFX1NUQVJULiBBbGwgdGhlc2Ugd2Vy ZSBub3QgYmFsYW5jZWQgd2l0aCBhbnkgRU5ELCBzbyBtYXJrIHRoZWlyCmVuZHMgYnkgU1lNX0NP REVfRU5ELCBhcHByb3ByaWF0ZWxseS4KClNpZ25lZC1vZmYtYnk6IEppcmkgU2xhYnkgPGpzbGFi eUBzdXNlLmN6PgpDYzogQm9yaXMgT3N0cm92c2t5IDxib3Jpcy5vc3Ryb3Zza3lAb3JhY2xlLmNv bT4KQ2M6IEp1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT4KQ2M6IFRob21hcyBHbGVpeG5l ciA8dGdseEBsaW51dHJvbml4LmRlPgpDYzogSW5nbyBNb2xuYXIgPG1pbmdvQHJlZGhhdC5jb20+ CkNjOiAiSC4gUGV0ZXIgQW52aW4iIDxocGFAenl0b3IuY29tPgpDYzogeDg2QGtlcm5lbC5vcmcK Q2M6IHhlbi1kZXZlbEBsaXN0cy54ZW5wcm9qZWN0Lm9yZwotLS0KIGFyY2gveDg2L2Jvb3QvY29t cHJlc3NlZC9oZWFkXzY0LlMgICB8ICAzICsrLQogYXJjaC94ODYvcGxhdGZvcm0vb2xwYy94bzEt d2FrZXVwLlMgIHwgIDMgKystCiBhcmNoL3g4Ni9wb3dlci9oaWJlcm5hdGVfYXNtXzY0LlMgICAg fCAgNiArKysrLS0KIGFyY2gveDg2L3JlYWxtb2RlL3JtL3JlYm9vdC5TICAgICAgICB8ICAzICsr LQogYXJjaC94ODYvcmVhbG1vZGUvcm0vdHJhbXBvbGluZV82NC5TIHwgMTAgKysrKysrKy0tLQog YXJjaC94ODYvcmVhbG1vZGUvcm0vd2FrZXVwX2FzbS5TICAgIHwgIDMgKystCiBhcmNoL3g4Ni94 ZW4veGVuLWFzbV82NC5TICAgICAgICAgICAgfCAgNiArKysrLS0KIDcgZmlsZXMgY2hhbmdlZCwg MjMgaW5zZXJ0aW9ucygrKSwgMTEgZGVsZXRpb25zKC0pCgpkaWZmIC0tZ2l0IGEvYXJjaC94ODYv Ym9vdC9jb21wcmVzc2VkL2hlYWRfNjQuUyBiL2FyY2gveDg2L2Jvb3QvY29tcHJlc3NlZC9oZWFk XzY0LlMKaW5kZXggMWEyZGQ3YjE4YTQwLi4xMWI4ZWJjMmYwOGEgMTAwNjQ0Ci0tLSBhL2FyY2gv eDg2L2Jvb3QvY29tcHJlc3NlZC9oZWFkXzY0LlMKKysrIGIvYXJjaC94ODYvYm9vdC9jb21wcmVz c2VkL2hlYWRfNjQuUwpAQCAtMjMyLDcgKzIzMiw3IEBAIEVORFBST0MoZWZpMzJfc3R1Yl9lbnRy eSkKIAogCS5jb2RlNjQKIAkub3JnIDB4MjAwCi1FTlRSWShzdGFydHVwXzY0KQorU1lNX0NPREVf U1RBUlQoc3RhcnR1cF82NCkKIAkvKgogCSAqIDY0Yml0IGVudHJ5IGlzIDB4MjAwIGFuZCBpdCBp cyBBQkkgc28gaW1tdXRhYmxlIQogCSAqIFdlIGNvbWUgaGVyZSBlaXRoZXIgZnJvbSBzdGFydHVw XzMyIG9yIGRpcmVjdGx5IGZyb20gYQpAQCAtMzUyLDYgKzM1Miw3IEBAIGx2bDU6CiAgKi8KIAls ZWFxCXJlbG9jYXRlZCglcmJ4KSwgJXJheAogCWptcAkqJXJheAorU1lNX0NPREVfRU5EKHN0YXJ0 dXBfNjQpCiAKICNpZmRlZiBDT05GSUdfRUZJX1NUVUIKIApkaWZmIC0tZ2l0IGEvYXJjaC94ODYv cGxhdGZvcm0vb2xwYy94bzEtd2FrZXVwLlMgYi9hcmNoL3g4Ni9wbGF0Zm9ybS9vbHBjL3hvMS13 YWtldXAuUwppbmRleCA5NDhkZWIyODk3NTMuLjcxZmY1ODE0ZmNhNCAxMDA2NDQKLS0tIGEvYXJj aC94ODYvcGxhdGZvcm0vb2xwYy94bzEtd2FrZXVwLlMKKysrIGIvYXJjaC94ODYvcGxhdGZvcm0v b2xwYy94bzEtd2FrZXVwLlMKQEAgLTg5LDcgKzg5LDcgQEAgcmVzdG9yZV9yZWdpc3RlcnM6CiAK IAlyZXQKIAotRU5UUlkoZG9fb2xwY19zdXNwZW5kX2xvd2xldmVsKQorU1lNX0NPREVfU1RBUlQo ZG9fb2xwY19zdXNwZW5kX2xvd2xldmVsKQogCWNhbGwJc2F2ZV9wcm9jZXNzb3Jfc3RhdGUKIAlj YWxsCXNhdmVfcmVnaXN0ZXJzCiAKQEAgLTEwOSw2ICsxMDksNyBAQCByZXRfcG9pbnQ6CiAJY2Fs bAlyZXN0b3JlX3JlZ2lzdGVycwogCWNhbGwJcmVzdG9yZV9wcm9jZXNzb3Jfc3RhdGUKIAlyZXQK K1NZTV9DT0RFX0VORChkb19vbHBjX3N1c3BlbmRfbG93bGV2ZWwpCiAKIC5kYXRhCiBzYXZlZF9n ZHQ6ICAgICAgICAgICAgIC5sb25nICAgMCwwCmRpZmYgLS1naXQgYS9hcmNoL3g4Ni9wb3dlci9o aWJlcm5hdGVfYXNtXzY0LlMgYi9hcmNoL3g4Ni9wb3dlci9oaWJlcm5hdGVfYXNtXzY0LlMKaW5k ZXggY2U4ZGEzYTA0MTJjLi40NDc1NWE4NDc4NTYgMTAwNjQ0Ci0tLSBhL2FyY2gveDg2L3Bvd2Vy L2hpYmVybmF0ZV9hc21fNjQuUworKysgYi9hcmNoL3g4Ni9wb3dlci9oaWJlcm5hdGVfYXNtXzY0 LlMKQEAgLTUzLDcgKzUzLDcgQEAgRU5UUlkoc3dzdXNwX2FyY2hfc3VzcGVuZCkKIAlyZXQKIEVO RFBST0Moc3dzdXNwX2FyY2hfc3VzcGVuZCkKIAotRU5UUlkocmVzdG9yZV9pbWFnZSkKK1NZTV9D T0RFX1NUQVJUKHJlc3RvcmVfaW1hZ2UpCiAJLyogcHJlcGFyZSB0byBqdW1wIHRvIHRoZSBpbWFn ZSBrZXJuZWwgKi8KIAltb3ZxCXJlc3RvcmVfanVtcF9hZGRyZXNzKCVyaXApLCAlcjgKIAltb3Zx CXJlc3RvcmVfY3IzKCVyaXApLCAlcjkKQEAgLTY4LDkgKzY4LDEwIEBAIEVOVFJZKHJlc3RvcmVf aW1hZ2UpCiAJLyoganVtcCB0byByZWxvY2F0ZWQgcmVzdG9yZSBjb2RlICovCiAJbW92cQlyZWxv Y2F0ZWRfcmVzdG9yZV9jb2RlKCVyaXApLCAlcmN4CiAJam1wcQkqJXJjeAorU1lNX0NPREVfRU5E KHJlc3RvcmVfaW1hZ2UpCiAKIAkvKiBjb2RlIGJlbG93IGhhcyBiZWVuIHJlbG9jYXRlZCB0byBh IHNhZmUgcGFnZSAqLwotRU5UUlkoY29yZV9yZXN0b3JlX2NvZGUpCitTWU1fQ09ERV9TVEFSVChj b3JlX3Jlc3RvcmVfY29kZSkKIAkvKiBzd2l0Y2ggdG8gdGVtcG9yYXJ5IHBhZ2UgdGFibGVzICov CiAJbW92cQklcmF4LCAlY3IzCiAJLyogZmx1c2ggVExCICovCkBAIC05OCw2ICs5OSw3IEBAIEVO VFJZKGNvcmVfcmVzdG9yZV9jb2RlKQogLkxkb25lOgogCS8qIGp1bXAgdG8gdGhlIHJlc3RvcmVf cmVnaXN0ZXJzIGFkZHJlc3MgZnJvbSB0aGUgaW1hZ2UgaGVhZGVyICovCiAJam1wcQkqJXI4CitT WU1fQ09ERV9FTkQoY29yZV9yZXN0b3JlX2NvZGUpCiAKIAkgLyogY29kZSBiZWxvdyBiZWxvbmdz IHRvIHRoZSBpbWFnZSBrZXJuZWwgKi8KIAkuYWxpZ24gUEFHRV9TSVpFCmRpZmYgLS1naXQgYS9h cmNoL3g4Ni9yZWFsbW9kZS9ybS9yZWJvb3QuUyBiL2FyY2gveDg2L3JlYWxtb2RlL3JtL3JlYm9v dC5TCmluZGV4IDQ5Y2YwZjlkNTEzZS4uZmYwMWJjNWI0ODVkIDEwMDY0NAotLS0gYS9hcmNoL3g4 Ni9yZWFsbW9kZS9ybS9yZWJvb3QuUworKysgYi9hcmNoL3g4Ni9yZWFsbW9kZS9ybS9yZWJvb3Qu UwpAQCAtMTgsNyArMTgsNyBAQAogICovCiAJLnNlY3Rpb24gIi50ZXh0MzIiLCAiYXgiCiAJLmNv ZGUzMgotRU5UUlkobWFjaGluZV9yZWFsX3Jlc3RhcnRfYXNtKQorU1lNX0NPREVfU1RBUlQobWFj aGluZV9yZWFsX3Jlc3RhcnRfYXNtKQogCiAjaWZkZWYgQ09ORklHX1g4Nl82NAogCS8qIFN3aXRj aCB0byB0cmFtcG9saW5lIEdEVCBhcyBpdCBpcyBndWFyYW50ZWVkIDwgNCBHaUIgKi8KQEAgLTYy LDYgKzYyLDcgQEAgU1lNX0NPREVfSU5ORVJfTEFCRUxfTk9BTElHTihtYWNoaW5lX3JlYWxfcmVz dGFydF9wYWdpbmdfb2ZmLCBTWU1fVl9HTE9CQUwpCiAJbW92bAklZWN4LCAlZ3MKIAltb3ZsCSVl Y3gsICVzcwogCWxqbXB3CSQ4LCAkMWYKK1NZTV9DT0RFX0VORChtYWNoaW5lX3JlYWxfcmVzdGFy dF9hc20pCiAKIC8qCiAgKiBUaGlzIGlzIDE2LWJpdCBwcm90ZWN0ZWQgbW9kZSBjb2RlIHRvIGRp c2FibGUgcGFnaW5nIGFuZCB0aGUgY2FjaGUsCmRpZmYgLS1naXQgYS9hcmNoL3g4Ni9yZWFsbW9k ZS9ybS90cmFtcG9saW5lXzY0LlMgYi9hcmNoL3g4Ni9yZWFsbW9kZS9ybS90cmFtcG9saW5lXzY0 LlMKaW5kZXggN2Y1NzlmOGRmY2Q5Li4yZDAyZTM4YjY4YWEgMTAwNjQ0Ci0tLSBhL2FyY2gveDg2 L3JlYWxtb2RlL3JtL3RyYW1wb2xpbmVfNjQuUworKysgYi9hcmNoL3g4Ni9yZWFsbW9kZS9ybS90 cmFtcG9saW5lXzY0LlMKQEAgLTM3LDcgKzM3LDcgQEAKIAkuY29kZTE2CiAKIAkuYmFsaWduCVBB R0VfU0laRQotRU5UUlkodHJhbXBvbGluZV9zdGFydCkKK1NZTV9DT0RFX1NUQVJUKHRyYW1wb2xp bmVfc3RhcnQpCiAJY2xpCQkJIyBXZSBzaG91bGQgYmUgc2FmZSBhbnl3YXkKIAl3YmludmQKIApA QCAtODAsMTIgKzgwLDE0IEBAIEVOVFJZKHRyYW1wb2xpbmVfc3RhcnQpCiBub19sb25nbW9kZToK IAlobHQKIAlqbXAgbm9fbG9uZ21vZGUKK1NZTV9DT0RFX0VORCh0cmFtcG9saW5lX3N0YXJ0KQor CiAjaW5jbHVkZSAiLi4va2VybmVsL3ZlcmlmeV9jcHUuUyIKIAogCS5zZWN0aW9uICIudGV4dDMy IiwiYXgiCiAJLmNvZGUzMgogCS5iYWxpZ24gNAotRU5UUlkoc3RhcnR1cF8zMikKK1NZTV9DT0RF X1NUQVJUKHN0YXJ0dXBfMzIpCiAJbW92bAklZWR4LCAlc3MKIAlhZGRsCSRwYV9yZWFsX21vZGVf YmFzZSwgJWVzcAogCW1vdmwJJWVkeCwgJWRzCkBAIC0xMzksMTMgKzE0MSwxNSBAQCBFTlRSWShz dGFydHVwXzMyKQogCSAqIHRoZSBuZXcgZ2R0L2lkdCB0aGF0IGhhcyBfX0tFUk5FTF9DUyB3aXRo IENTLkwgPSAxLgogCSAqLwogCWxqbXBsCSRfX0tFUk5FTF9DUywgJHBhX3N0YXJ0dXBfNjQKK1NZ TV9DT0RFX0VORChzdGFydHVwXzMyKQogCiAJLnNlY3Rpb24gIi50ZXh0NjQiLCJheCIKIAkuY29k ZTY0CiAJLmJhbGlnbiA0Ci1FTlRSWShzdGFydHVwXzY0KQorU1lNX0NPREVfU1RBUlQoc3RhcnR1 cF82NCkKIAkjIE5vdyBqdW1wIGludG8gdGhlIGtlcm5lbCB1c2luZyB2aXJ0dWFsIGFkZHJlc3Nl cwogCWptcHEJKnRyX3N0YXJ0KCVyaXApCitTWU1fQ09ERV9FTkQoc3RhcnR1cF82NCkKIAogCS5z ZWN0aW9uICIucm9kYXRhIiwiYSIKIAkjIER1cGxpY2F0ZSB0aGUgZ2xvYmFsIGRlc2NyaXB0b3Ig dGFibGUKZGlmZiAtLWdpdCBhL2FyY2gveDg2L3JlYWxtb2RlL3JtL3dha2V1cF9hc20uUyBiL2Fy Y2gveDg2L3JlYWxtb2RlL3JtL3dha2V1cF9hc20uUwppbmRleCA0ZWFhZDFjNGFlZDEuLjMwZTE0 YTUxM2U1ZSAxMDA2NDQKLS0tIGEvYXJjaC94ODYvcmVhbG1vZGUvcm0vd2FrZXVwX2FzbS5TCisr KyBiL2FyY2gveDg2L3JlYWxtb2RlL3JtL3dha2V1cF9hc20uUwpAQCAtMzYsNyArMzYsNyBAQCBT WU1fREFUQV9FTkQod2FrZXVwX2hlYWRlcikKIAkuY29kZTE2CiAKIAkuYmFsaWduCTE2Ci1FTlRS WSh3YWtldXBfc3RhcnQpCitTWU1fQ09ERV9TVEFSVCh3YWtldXBfc3RhcnQpCiAJY2xpCiAJY2xk CiAKQEAgLTEzNCw2ICsxMzQsNyBAQCBFTlRSWSh3YWtldXBfc3RhcnQpCiAjZWxzZQogCWptcAl0 cmFtcG9saW5lX3N0YXJ0CiAjZW5kaWYKK1NZTV9DT0RFX0VORCh3YWtldXBfc3RhcnQpCiAKIGJv Z3VzX3JlYWxfbWFnaWM6CiAxOgpkaWZmIC0tZ2l0IGEvYXJjaC94ODYveGVuL3hlbi1hc21fNjQu UyBiL2FyY2gveDg2L3hlbi94ZW4tYXNtXzY0LlMKaW5kZXggZjdlOWE4MzQ0OTEwLi40YWZhNTBj NDBmMTIgMTAwNjQ0Ci0tLSBhL2FyY2gveDg2L3hlbi94ZW4tYXNtXzY0LlMKKysrIGIvYXJjaC94 ODYveGVuL3hlbi1hc21fNjQuUwpAQCAtNjksMTEgKzY5LDEyIEBAIGh5cGVyY2FsbF9pcmV0ID0g aHlwZXJjYWxsX3BhZ2UgKyBfX0hZUEVSVklTT1JfaXJldCAqIDMyCiAgKglyMTEJCX08LS0gcHVz aGVkIGJ5IGh5cGVyY2FsbCBwYWdlCiAgKiByc3AtPnJheAkJfQogICovCi1FTlRSWSh4ZW5faXJl dCkKK1NZTV9DT0RFX1NUQVJUKHhlbl9pcmV0KQogCXB1c2hxICQwCiAJam1wIGh5cGVyY2FsbF9p cmV0CitTWU1fQ09ERV9FTkQoeGVuX2lyZXQpCiAKLUVOVFJZKHhlbl9zeXNyZXQ2NCkKK1NZTV9D T0RFX1NUQVJUKHhlbl9zeXNyZXQ2NCkKIAkvKgogCSAqIFdlJ3JlIGFscmVhZHkgb24gdGhlIHVz ZXJtb2RlIHN0YWNrIGF0IHRoaXMgcG9pbnQsIGJ1dAogCSAqIHN0aWxsIHdpdGggdGhlIGtlcm5l bCBncywgc28gd2UgY2FuIGVhc2lseSBzd2l0Y2ggYmFjawpAQCAtODksNiArOTAsNyBAQCBFTlRS WSh4ZW5fc3lzcmV0NjQpCiAKIAlwdXNocSAkVkdDRl9pbl9zeXNjYWxsCiAJam1wIGh5cGVyY2Fs bF9pcmV0CitTWU1fQ09ERV9FTkQoeGVuX3N5c3JldDY0KQogCiAvKgogICogWGVuIGhhbmRsZXMg c3lzY2FsbCBjYWxsYmFja3MgbXVjaCBsaWtlIG9yZGluYXJ5IGV4Y2VwdGlvbnMsIHdoaWNoCi0t IAoyLjE0LjIKCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f XwpYZW4tZGV2ZWwgbWFpbGluZyBsaXN0Clhlbi1kZXZlbEBsaXN0cy54ZW4ub3JnCmh0dHBzOi8v bGlzdHMueGVuLm9yZy94ZW4tZGV2ZWwK