From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jarkko Sakkinen Subject: [PATCH RFC v3 03/12] x86: define the feature control MSR's SGX enable bit Date: Tue, 10 Oct 2017 17:32:49 +0300 Message-ID: <20171010143258.21623-4-jarkko.sakkinen@linux.intel.com> References: <20171010143258.21623-1-jarkko.sakkinen@linux.intel.com> Return-path: Received: from mga05.intel.com ([192.55.52.43]:52005 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932075AbdJJOdK (ORCPT ); Tue, 10 Oct 2017 10:33:10 -0400 In-Reply-To: <20171010143258.21623-1-jarkko.sakkinen@linux.intel.com> Sender: platform-driver-x86-owner@vger.kernel.org List-ID: To: intel-sgx-kernel-dev@lists.01.org Cc: platform-driver-x86@vger.kernel.org, Sean Christopherson , Jarkko Sakkinen From: Sean Christopherson Signed-off-by: Sean Christopherson Signed-off-by: Jarkko Sakkinen --- arch/x86/include/asm/msr-index.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 17f5c12e1afd..b35cb98b5d60 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -435,6 +435,7 @@ #define FEATURE_CONTROL_LOCKED (1<<0) #define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX (1<<1) #define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX (1<<2) +#define FEATURE_CONTROL_SGX_ENABLE (1<<18) #define FEATURE_CONTROL_LMCE (1<<20) #define MSR_IA32_APICBASE 0x0000001b -- 2.14.1