diff for duplicates of <20171018143629.29302-7-miquel.raynal@free-electrons.com>
diff --git a/a/content_digest b/N1/content_digest
index 64a451e..d668efb 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -33,34 +33,16 @@
" linux-arm-kernel\@lists.infradead.org",
" linux-kernel\@vger.kernel.org",
" linux-mediatek\@lists.infradead.org",
- " linux-mtd\@lists.infradead.org",
- " Marc Gonzalez <marc_gonzalez\@sigmadesigns.com>",
- " Marek Vasut <marek.vasut\@gmail.com>",
- " Mark Rutland <mark.rutland\@arm.com>",
- " Masahiro Yamada <yamada.masahiro\@socionext.com>",
- " Matthias Brugger <matthias.bgg\@gmail.com>",
- " Maxime Ripard <maxime.ripard\@free-electrons.com>",
- " Maxim Levitsky <maximlevitsky\@gmail.com>",
- " Richard Weinberger <richard\@nod.at>",
- " Robert Jarzmik <robert.jarzmik\@free.fr>",
- " Rob Herring <robh+dt\@kernel.org>",
- " Russell King <linux\@armlinux.org.uk>",
- " Sebastian Hesselbarth <sebastian.hesselbarth\@gmail.com>",
- " Stefan Agner <stefan\@agner.ch>",
- " Sylvain Lemieux <slemieux.tyco\@gmail.com>",
- " Vladimir Zapolskiy <vz\@mleia.com>",
- " Wenyou Yang <wenyou.yang\@atmel.com>",
- " Will Deacon <will.deacon\@arm.com>\0"
+ " linux-mtd\@lists.infradead.org\0"
]
[
- "Cc\0Thomas Petazzoni <thomas.petazzoni\@free-electrons.com>",
+ "Cc\0Hanna Hawa <hannah\@marvell.com>",
" Antoine Tenart <antoine.tenart\@free-electrons.com>",
- " Miquel Raynal <miquel.raynal\@free-electrons.com>",
- " Igor Grinberg <grinberg\@compulab.co.il>",
" Nadav Haklai <nadavh\@marvell.com>",
- " Ofer Heifetz <oferh\@marvell.com>",
" Neta Zur Hershkovits <neta\@marvell.com>",
- " Hanna Hawa <hannah\@marvell.com>\0"
+ " Igor Grinberg <grinberg\@compulab.co.il>",
+ " Miquel Raynal <miquel.raynal\@free-electrons.com>",
+ " Ofer Heifetz <oferh\@marvell.com>\0"
]
[
"\0000:1\0"
@@ -2550,4 +2532,4 @@
"2.11.0"
]
-c31b81fc18d36daa23a18e9a27c4299bdf15891fc4e13ef82e0feb8f9c7e19e0
+80071db646eb2e3967d5ce8e71e56be24c480b0d91051a04b9f3182db87b9a32
diff --git a/a/1.txt b/N2/1.txt
index 08f6758..578d08f 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -306,7 +306,7 @@ index 000000000000..557817a6f4b6
+ * The Nand Flash Controller has up to 4 CE and 2 RB pins. The CE selection
+ * is made by a field in NDCB0 register, and in another field in NDCB2 register.
+ * The datasheet describes the logic with an error: ADDR5 field is once
-+ * declared at the beginning of NDCB2, and another time at its end. Because the
++ * declared at the beginning of NDCB2, and another time@its end. Because the
+ * ADDR5 field of NDCB2 may be used by other bytes, it would be more logical
+ * to use the last bit of this field instead of the first ones.
+ *
@@ -1352,7 +1352,7 @@ index 000000000000..557817a6f4b6
+ for (chunk = 0; chunk < nchunks; chunk++) {
+ /*
+ * OOB are not 8-bytes aligned anyway so change the column
-+ * at each cycle
++ *@each cycle
+ */
+ nand_change_write_column_op(chip, chunk * (lt->data_bytes +
+ oob_size),
diff --git a/a/content_digest b/N2/content_digest
index 64a451e..5ced66b 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -2,7 +2,7 @@
"ref\00020171018143629.29302-1-miquel.raynal\@free-electrons.com\0"
]
[
- "From\0Miquel Raynal <miquel.raynal\@free-electrons.com>\0"
+ "From\0miquel.raynal\@free-electrons.com (Miquel Raynal)\0"
]
[
"Subject\0[RFC 06/12] mtd: nand: add reworked Marvell NAND controller driver\0"
@@ -11,56 +11,7 @@
"Date\0Wed, 18 Oct 2017 16:36:23 +0200\0"
]
[
- "To\0Andrew Lunn <andrew\@lunn.ch>",
- " bcm-kernel-feedback-list\@broadcom.com",
- " Boris Brezillon <boris.brezillon\@free-electrons.com>",
- " Brian Norris <computersforpeace\@gmail.com>",
- " Catalin Marinas <catalin.marinas\@arm.com>",
- " Chen-Yu Tsai <wens\@csie.org>",
- " Cyrille Pitchen <cyrille.pitchen\@wedev4u.fr>",
- " Daniel Mack <daniel\@zonque.org>",
- " David Woodhouse <dwmw2\@infradead.org>",
- " devel\@driverdev.osuosl.org",
- " devicetree\@vger.kernel.org",
- " Ezequiel Garcia <ezequiel.garcia\@free-electrons.com>",
- " Greg Kroah-Hartman <gregkh\@linuxfoundation.org>",
- " Gregory Clement <gregory.clement\@free-electrons.com>",
- " Han Xu <han.xu\@nxp.com>",
- " Haojian Zhuang <haojian.zhuang\@gmail.com>",
- " Jason Cooper <jason\@lakedaemon.net>",
- " Josh Wu <rainyfeeling\@outlook.com>",
- " Kamal Dasu <kdasu.kdev\@gmail.com>",
- " linux-arm-kernel\@lists.infradead.org",
- " linux-kernel\@vger.kernel.org",
- " linux-mediatek\@lists.infradead.org",
- " linux-mtd\@lists.infradead.org",
- " Marc Gonzalez <marc_gonzalez\@sigmadesigns.com>",
- " Marek Vasut <marek.vasut\@gmail.com>",
- " Mark Rutland <mark.rutland\@arm.com>",
- " Masahiro Yamada <yamada.masahiro\@socionext.com>",
- " Matthias Brugger <matthias.bgg\@gmail.com>",
- " Maxime Ripard <maxime.ripard\@free-electrons.com>",
- " Maxim Levitsky <maximlevitsky\@gmail.com>",
- " Richard Weinberger <richard\@nod.at>",
- " Robert Jarzmik <robert.jarzmik\@free.fr>",
- " Rob Herring <robh+dt\@kernel.org>",
- " Russell King <linux\@armlinux.org.uk>",
- " Sebastian Hesselbarth <sebastian.hesselbarth\@gmail.com>",
- " Stefan Agner <stefan\@agner.ch>",
- " Sylvain Lemieux <slemieux.tyco\@gmail.com>",
- " Vladimir Zapolskiy <vz\@mleia.com>",
- " Wenyou Yang <wenyou.yang\@atmel.com>",
- " Will Deacon <will.deacon\@arm.com>\0"
-]
-[
- "Cc\0Thomas Petazzoni <thomas.petazzoni\@free-electrons.com>",
- " Antoine Tenart <antoine.tenart\@free-electrons.com>",
- " Miquel Raynal <miquel.raynal\@free-electrons.com>",
- " Igor Grinberg <grinberg\@compulab.co.il>",
- " Nadav Haklai <nadavh\@marvell.com>",
- " Ofer Heifetz <oferh\@marvell.com>",
- " Neta Zur Hershkovits <neta\@marvell.com>",
- " Hanna Hawa <hannah\@marvell.com>\0"
+ "To\0linux-arm-kernel\@lists.infradead.org\0"
]
[
"\0000:1\0"
@@ -377,7 +328,7 @@
"+ * The Nand Flash Controller has up to 4 CE and 2 RB pins. The CE selection\n",
"+ * is made by a field in NDCB0 register, and in another field in NDCB2 register.\n",
"+ * The datasheet describes the logic with an error: ADDR5 field is once\n",
- "+ * declared at the beginning of NDCB2, and another time at its end. Because the\n",
+ "+ * declared at the beginning of NDCB2, and another time\@its end. Because the\n",
"+ * ADDR5 field of NDCB2 may be used by other bytes, it would be more logical\n",
"+ * to use the last bit of this field instead of the first ones.\n",
"+ *\n",
@@ -1423,7 +1374,7 @@
"+\tfor (chunk = 0; chunk < nchunks; chunk++) {\n",
"+\t\t/*\n",
"+\t\t * OOB are not 8-bytes aligned anyway so change the column\n",
- "+\t\t * at each cycle\n",
+ "+\t\t *\@each cycle\n",
"+\t\t */\n",
"+\t\tnand_change_write_column_op(chip, chunk * (lt->data_bytes +\n",
"+\t\t\t\t\t\t\t oob_size),\n",
@@ -2550,4 +2501,4 @@
"2.11.0"
]
-c31b81fc18d36daa23a18e9a27c4299bdf15891fc4e13ef82e0feb8f9c7e19e0
+ab08cd89c5b96937ff66b3486cfa0c0b8103720ccf639ba35e961e24e4e0f820
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