From: hch@lst.de (Christoph Hellwig)
Subject: [PATCHv2 1/5] nvme: Centralize AEN defines
Date: Sat, 21 Oct 2017 10:06:19 +0200 [thread overview]
Message-ID: <20171021080619.GB20906@lst.de> (raw)
In-Reply-To: <20171020221924.30659-2-keith.busch@intel.com>
> + ctrl->event_limit = NVME_AEN_COMMANDS;
Can we keep the NR_? E.g. NVME_NR_AEN_COMMANDS?
> + struct nvme_fc_fcp_op aen_ops[NVME_AEN_COMMANDS];
>
> struct nvme_ctrl ctrl;
> };
> @@ -1322,7 +1313,7 @@ nvme_fc_abort_aen_ops(struct nvme_fc_ctrl *ctrl)
> unsigned long flags;
> int i, ret;
>
> - for (i = 0; i < NVME_FC_NR_AEN_COMMANDS; i++, aen_op++) {
> + for (i = 0; i < NVME_AEN_COMMANDS; i++, aen_op++) {
> if (atomic_read(&aen_op->state) != FCPOP_STATE_ACTIVE)
> continue;
Kill the array and loop?
> - ctrl->admin_tag_set.queue_depth = NVME_FC_AQ_BLKMQ_DEPTH;
> + ctrl->admin_tag_set.queue_depth = NVME_AQ_BLK_MQ_DEPTH - 1;
Shouldn't the -1 be factored into NVME_AQ_BLK_MQ_DEPTH? Either way
I think we need some constant for it, and move the explanation for it
from the PCI driver to the core somehow.
next prev parent reply other threads:[~2017-10-21 8:06 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-20 22:19 [PATCHv2 0/5] AEN and userspace updates Keith Busch
2017-10-20 22:19 ` [PATCHv2 1/5] nvme: Centralize AEN defines Keith Busch
2017-10-21 8:06 ` Christoph Hellwig [this message]
2017-10-20 22:19 ` [PATCHv2 2/5] nvme/fc: remove unused "queue_size" field Keith Busch
2017-10-20 23:06 ` James Smart
2017-10-20 22:19 ` [PATCHv2 3/5] nvme: Single AEN request Keith Busch
2017-10-21 8:06 ` Christoph Hellwig
2017-10-20 22:19 ` [PATCHv2 4/5] nvme: Unexport starting async event work Keith Busch
2017-10-21 8:07 ` Christoph Hellwig
2017-10-20 22:19 ` [PATCHv2 5/5] nvme: Send uevent for unhandled AEN completions Keith Busch
2017-10-20 22:29 ` Keith Busch
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