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From: Luc MICHEL <luc.michel@git.antfield.fr>
To: qemu-devel@nongnu.org
Cc: Luc MICHEL <luc.michel@git.antfield.fr>,
	qemu-ppc@nongnu.org, David Gibson <david@gibson.dropbear.id.au>,
	Alexander Graf <agraf@suse.de>
Subject: [Qemu-devel] [PATCH 0/1] target-ppc: booke206 tlb: fix tlbwe instruction
Date: Thu,  2 Nov 2017 11:35:58 +0100	[thread overview]
Message-ID: <20171102103559.7382-1-luc.michel@git.antfield.fr> (raw)

Hi,

I was experiencing random segmentation faults of userland applications
in a guest e500 powerpc Linux. After investigating, I found that this
bug appeared with commit 9fb044911444fdd09f5f072ad0ca269d7f8b841d. This
commit introduces more MMU indices to avoid unnecessary TLB flushes when
the CPU changes mode.

It triggers a new bug however, that I finally traced down into the tlbwe
instructions simulation. When replacing a valid TLB entry with a new
one, the previous page was not flushed from QEMU TLB.

This fixes my random crashes in guest Linux. Note that I think there is
a similar issue in booke206_invalidate_ea_tlb but in my case, Linux
never triggers this code so I was not able to test.

Luc MICHEL (1):
  target-ppc: Fix booke206 tlbwe TLB instruction

 target/ppc/mmu_helper.c | 23 ++++++++++++++++++-----
 1 file changed, 18 insertions(+), 5 deletions(-)

-- 
2.14.3

             reply	other threads:[~2017-11-02 10:34 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-02 10:35 Luc MICHEL [this message]
2017-11-02 10:35 ` [Qemu-devel] [PATCH 1/1] target-ppc: Fix booke206 tlbwe TLB instruction Luc MICHEL
2017-11-06  6:16   ` David Gibson
2017-11-14 16:28     ` Luc Michel
2017-12-15 12:46       ` David Gibson

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