[PATCH] drm/i915: Reserve powerctx for chv from the stolen allocator

[PATCH] drm/i915: Reserve powerctx for chv from the stolen allocator

[Chris Wilson]

Ensure that we do not overwrite the cherryview power context by
reserving its range in the stolen allocator; exactly like how we handle
the same reservation for valleyview.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h |  3 +-
 drivers/gpu/drm/i915/intel_pm.c | 97 +++++++++++++++--------------------------
 2 files changed, 37 insertions(+), 63 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 72bb5b51035a..d6462388c3a6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1377,6 +1377,7 @@ struct intel_rps {
 };
 
 struct intel_rc6 {
+	struct drm_i915_gem_object *pctx;
 	bool enabled;
 };
 
@@ -2464,8 +2465,6 @@ struct drm_i915_private {
 
 	struct i915_gpu_error gpu_error;
 
-	struct drm_i915_gem_object *vlv_pctx;
-
 	/* list of fbdev register on this device */
 	struct intel_fbdev *fbdev;
 	struct work_struct fbdev_suspend_work;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 07118c0b69d3..1a0cf53e0638 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7034,7 +7034,7 @@ static void valleyview_check_pctx(struct drm_i915_private *dev_priv)
 	unsigned long pctx_addr = I915_READ(VLV_PCBR) & ~4095;
 
 	WARN_ON(pctx_addr != dev_priv->mm.stolen_base +
-			     dev_priv->vlv_pctx->stolen->start);
+			     dev_priv->gt_pm.rc6.pctx->stolen->start);
 }
 
 
@@ -7046,77 +7046,54 @@ static void cherryview_check_pctx(struct drm_i915_private *dev_priv)
 	WARN_ON((pctx_addr >> VLV_PCBR_ADDR_SHIFT) == 0);
 }
 
-static void cherryview_setup_pctx(struct drm_i915_private *dev_priv)
-{
-	struct i915_ggtt *ggtt = &dev_priv->ggtt;
-	unsigned long pctx_paddr, paddr;
-	u32 pcbr;
-	int pctx_size = 32*1024;
-
-	pcbr = I915_READ(VLV_PCBR);
-	if ((pcbr >> VLV_PCBR_ADDR_SHIFT) == 0) {
-		DRM_DEBUG_DRIVER("BIOS didn't set up PCBR, fixing up\n");
-		paddr = (dev_priv->mm.stolen_base +
-			 (ggtt->stolen_size - pctx_size));
-
-		pctx_paddr = (paddr & (~4095));
-		I915_WRITE(VLV_PCBR, pctx_paddr);
-	}
-
-	DRM_DEBUG_DRIVER("PCBR: 0x%08x\n", I915_READ(VLV_PCBR));
-}
-
-static void valleyview_setup_pctx(struct drm_i915_private *dev_priv)
+static void setup_pctx(struct drm_i915_private *dev_priv, int pctx_size)
 {
 	struct drm_i915_gem_object *pctx;
-	unsigned long pctx_paddr;
 	u32 pcbr;
-	int pctx_size = 24*1024;
 
 	pcbr = I915_READ(VLV_PCBR);
 	if (pcbr) {
 		/* BIOS set it up already, grab the pre-alloc'd space */
-		int pcbr_offset;
+		u32 start = round_down(pcbr, 4096);
+		u32 end = round_up(pcbr + pctx_size, 4096);
 
-		pcbr_offset = (pcbr & (~4095)) - dev_priv->mm.stolen_base;
 		pctx = i915_gem_object_create_stolen_for_preallocated(dev_priv,
-								      pcbr_offset,
+								      start - dev_priv->mm.stolen_base,
 								      I915_GTT_OFFSET_NONE,
-								      pctx_size);
-		goto out;
-	}
+								      end - start);
+	} else {
+		DRM_DEBUG_DRIVER("BIOS didn't set up PCBR, fixing up\n");
 
-	DRM_DEBUG_DRIVER("BIOS didn't set up PCBR, fixing up\n");
+		/*
+		 * From the Gunit register HAS:
+		 * The Gfx driver is expected to program this register and
+		 * ensure proper allocation within Gfx stolen memory.  For
+		 * example, this register should be programmed such than the
+		 * PCBR range does not overlap with other ranges, such as the
+		 * frame buffer, protected memory, or any other relevant ranges.
+		 */
+		pctx = i915_gem_object_create_stolen(dev_priv, pctx_size);
+		if (!pctx) {
+			DRM_DEBUG("not enough stolen space for PCTX, disabling\n");
+			return;
+		}
 
-	/*
-	 * From the Gunit register HAS:
-	 * The Gfx driver is expected to program this register and ensure
-	 * proper allocation within Gfx stolen memory.  For example, this
-	 * register should be programmed such than the PCBR range does not
-	 * overlap with other ranges, such as the frame buffer, protected
-	 * memory, or any other relevant ranges.
-	 */
-	pctx = i915_gem_object_create_stolen(dev_priv, pctx_size);
-	if (!pctx) {
-		DRM_DEBUG("not enough stolen space for PCTX, disabling\n");
-		goto out;
+		I915_WRITE(VLV_PCBR,
+			   dev_priv->mm.stolen_base + pctx->stolen->start);
 	}
+	DRM_DEBUG_DRIVER("PCBR: 0x%08x [0x%08x]\n", I915_READ(VLV_PCBR), pcbr);
 
-	pctx_paddr = dev_priv->mm.stolen_base + pctx->stolen->start;
-	I915_WRITE(VLV_PCBR, pctx_paddr);
-
-out:
-	DRM_DEBUG_DRIVER("PCBR: 0x%08x\n", I915_READ(VLV_PCBR));
-	dev_priv->vlv_pctx = pctx;
+	dev_priv->gt_pm.rc6.pctx = pctx;
 }
 
-static void valleyview_cleanup_pctx(struct drm_i915_private *dev_priv)
+static void cherryview_setup_pctx(struct drm_i915_private *dev_priv)
 {
-	if (WARN_ON(!dev_priv->vlv_pctx))
-		return;
+	setup_pctx(dev_priv, 32 << 10);
+}
 
-	i915_gem_object_put(dev_priv->vlv_pctx);
-	dev_priv->vlv_pctx = NULL;
+static void valleyview_setup_pctx(struct drm_i915_private *dev_priv)
+{
+	setup_pctx(dev_priv, 24 << 10);
 }
 
 static void vlv_init_gpll_ref_freq(struct drm_i915_private *dev_priv)
@@ -7225,11 +7202,6 @@ static void cherryview_init_gt_powersave(struct drm_i915_private *dev_priv)
 		  "Odd GPU freq values\n");
 }
 
-static void valleyview_cleanup_gt_powersave(struct drm_i915_private *dev_priv)
-{
-	valleyview_cleanup_pctx(dev_priv);
-}
-
 static void cherryview_enable_rc6(struct drm_i915_private *dev_priv)
 {
 	struct intel_engine_cs *engine;
@@ -7949,8 +7921,11 @@ void intel_init_gt_powersave(struct drm_i915_private *dev_priv)
 
 void intel_cleanup_gt_powersave(struct drm_i915_private *dev_priv)
 {
-	if (IS_VALLEYVIEW(dev_priv))
-		valleyview_cleanup_gt_powersave(dev_priv);
+	struct drm_i915_gem_object *pctx;
+
+	pctx = fetch_and_zero(&dev_priv->gt_pm.rc6.pctx);
+	if (pctx)
+		i915_gem_object_put(pctx);
 
 	if (!i915_modparams.enable_rc6)
 		intel_runtime_pm_put(dev_priv);
-- 
2.15.0

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✗ Fi.CI.BAT: failure for drm/i915: Reserve powerctx for chv from the stolen allocator

[Patchwork]

== Series Details ==

Series: drm/i915: Reserve powerctx for chv from the stolen allocator
URL   : https://patchwork.freedesktop.org/series/33192/
State : failure

== Summary ==

Series 33192v1 drm/i915: Reserve powerctx for chv from the stolen allocator
https://patchwork.freedesktop.org/api/1.0/series/33192/revisions/1/mbox/

Test gem_exec_reloc:
        Subgroup basic-gtt-cpu-noreloc:
                pass       -> INCOMPLETE (fi-byt-j1900)
Test kms_flip:
        Subgroup basic-plain-flip:
                pass       -> DMESG-WARN (fi-skl-6700k)
Test kms_force_connector_basic:
        Subgroup force-connector-state:
                skip       -> INCOMPLETE (fi-skl-6700k)
Test kms_pipe_crc_basic:
        Subgroup hang-read-crc-pipe-a:
                pass       -> SKIP       (fi-hsw-4770r)
        Subgroup read-crc-pipe-b-frame-sequence:
                pass       -> INCOMPLETE (fi-cnl-y) fdo#102035
        Subgroup read-crc-pipe-c:
                dmesg-warn -> PASS       (fi-bsw-n3050)

fdo#102035 https://bugs.freedesktop.org/show_bug.cgi?id=102035

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:447s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:453s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:381s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:537s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:279s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:516s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:512s
fi-byt-j1900     total:93   pass:74   dwarn:0   dfail:0   fail:0   skip:18 
fi-byt-n2820     total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  time:483s
fi-cnl-y         total:242  pass:217  dwarn:0   dfail:0   fail:0   skip:24 
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:434s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:261s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:579s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:433s
fi-hsw-4770r     total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:429s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:430s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:504s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:457s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:495s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:580s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:478s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:588s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:572s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:453s
fi-skl-6600u     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:597s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:648s
fi-skl-6700k     total:221  pass:203  dwarn:1   dfail:0   fail:0   skip:16 
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:505s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:461s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:572s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:423s

8b0ae6b50a229dc661a02f4034252ee854cc9b83 drm-tip: 2017y-11m-03d-17h-15m-57s UTC integration manifest
d7673df9ff9b drm/i915: Reserve powerctx for chv from the stolen allocator

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6962/
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Re: [PATCH] drm/i915: Reserve powerctx for chv from the stolen allocator

[Ville Syrjälä]

On Sat, Nov 04, 2017 at 09:43:38PM +0000, Chris Wilson wrote:
> Ensure that we do not overwrite the cherryview power context by
> reserving its range in the stolen allocator; exactly like how we handle
> the same reservation for valleyview.

IIRC CHV pctx must live inside the "reserved" region. So this
should never happen.

> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h |  3 +-
>  drivers/gpu/drm/i915/intel_pm.c | 97 +++++++++++++++--------------------------
>  2 files changed, 37 insertions(+), 63 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 72bb5b51035a..d6462388c3a6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1377,6 +1377,7 @@ struct intel_rps {
>  };
>  
>  struct intel_rc6 {
> +	struct drm_i915_gem_object *pctx;
>  	bool enabled;
>  };
>  
> @@ -2464,8 +2465,6 @@ struct drm_i915_private {
>  
>  	struct i915_gpu_error gpu_error;
>  
> -	struct drm_i915_gem_object *vlv_pctx;
> -
>  	/* list of fbdev register on this device */
>  	struct intel_fbdev *fbdev;
>  	struct work_struct fbdev_suspend_work;
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 07118c0b69d3..1a0cf53e0638 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -7034,7 +7034,7 @@ static void valleyview_check_pctx(struct drm_i915_private *dev_priv)
>  	unsigned long pctx_addr = I915_READ(VLV_PCBR) & ~4095;
>  
>  	WARN_ON(pctx_addr != dev_priv->mm.stolen_base +
> -			     dev_priv->vlv_pctx->stolen->start);
> +			     dev_priv->gt_pm.rc6.pctx->stolen->start);
>  }
>  
>  
> @@ -7046,77 +7046,54 @@ static void cherryview_check_pctx(struct drm_i915_private *dev_priv)
>  	WARN_ON((pctx_addr >> VLV_PCBR_ADDR_SHIFT) == 0);
>  }
>  
> -static void cherryview_setup_pctx(struct drm_i915_private *dev_priv)
> -{
> -	struct i915_ggtt *ggtt = &dev_priv->ggtt;
> -	unsigned long pctx_paddr, paddr;
> -	u32 pcbr;
> -	int pctx_size = 32*1024;
> -
> -	pcbr = I915_READ(VLV_PCBR);
> -	if ((pcbr >> VLV_PCBR_ADDR_SHIFT) == 0) {
> -		DRM_DEBUG_DRIVER("BIOS didn't set up PCBR, fixing up\n");
> -		paddr = (dev_priv->mm.stolen_base +
> -			 (ggtt->stolen_size - pctx_size));
> -
> -		pctx_paddr = (paddr & (~4095));
> -		I915_WRITE(VLV_PCBR, pctx_paddr);
> -	}
> -
> -	DRM_DEBUG_DRIVER("PCBR: 0x%08x\n", I915_READ(VLV_PCBR));
> -}
> -
> -static void valleyview_setup_pctx(struct drm_i915_private *dev_priv)
> +static void setup_pctx(struct drm_i915_private *dev_priv, int pctx_size)
>  {
>  	struct drm_i915_gem_object *pctx;
> -	unsigned long pctx_paddr;
>  	u32 pcbr;
> -	int pctx_size = 24*1024;
>  
>  	pcbr = I915_READ(VLV_PCBR);
>  	if (pcbr) {
>  		/* BIOS set it up already, grab the pre-alloc'd space */
> -		int pcbr_offset;
> +		u32 start = round_down(pcbr, 4096);
> +		u32 end = round_up(pcbr + pctx_size, 4096);
>  
> -		pcbr_offset = (pcbr & (~4095)) - dev_priv->mm.stolen_base;
>  		pctx = i915_gem_object_create_stolen_for_preallocated(dev_priv,
> -								      pcbr_offset,
> +								      start - dev_priv->mm.stolen_base,
>  								      I915_GTT_OFFSET_NONE,
> -								      pctx_size);
> -		goto out;
> -	}
> +								      end - start);
> +	} else {
> +		DRM_DEBUG_DRIVER("BIOS didn't set up PCBR, fixing up\n");
>  
> -	DRM_DEBUG_DRIVER("BIOS didn't set up PCBR, fixing up\n");
> +		/*
> +		 * From the Gunit register HAS:
> +		 * The Gfx driver is expected to program this register and
> +		 * ensure proper allocation within Gfx stolen memory.  For
> +		 * example, this register should be programmed such than the
> +		 * PCBR range does not overlap with other ranges, such as the
> +		 * frame buffer, protected memory, or any other relevant ranges.
> +		 */
> +		pctx = i915_gem_object_create_stolen(dev_priv, pctx_size);
> +		if (!pctx) {
> +			DRM_DEBUG("not enough stolen space for PCTX, disabling\n");
> +			return;
> +		}
>  
> -	/*
> -	 * From the Gunit register HAS:
> -	 * The Gfx driver is expected to program this register and ensure
> -	 * proper allocation within Gfx stolen memory.  For example, this
> -	 * register should be programmed such than the PCBR range does not
> -	 * overlap with other ranges, such as the frame buffer, protected
> -	 * memory, or any other relevant ranges.
> -	 */
> -	pctx = i915_gem_object_create_stolen(dev_priv, pctx_size);
> -	if (!pctx) {
> -		DRM_DEBUG("not enough stolen space for PCTX, disabling\n");
> -		goto out;
> +		I915_WRITE(VLV_PCBR,
> +			   dev_priv->mm.stolen_base + pctx->stolen->start);
>  	}
> +	DRM_DEBUG_DRIVER("PCBR: 0x%08x [0x%08x]\n", I915_READ(VLV_PCBR), pcbr);
>  
> -	pctx_paddr = dev_priv->mm.stolen_base + pctx->stolen->start;
> -	I915_WRITE(VLV_PCBR, pctx_paddr);
> -
> -out:
> -	DRM_DEBUG_DRIVER("PCBR: 0x%08x\n", I915_READ(VLV_PCBR));
> -	dev_priv->vlv_pctx = pctx;
> +	dev_priv->gt_pm.rc6.pctx = pctx;
>  }
>  
> -static void valleyview_cleanup_pctx(struct drm_i915_private *dev_priv)
> +static void cherryview_setup_pctx(struct drm_i915_private *dev_priv)
>  {
> -	if (WARN_ON(!dev_priv->vlv_pctx))
> -		return;
> +	setup_pctx(dev_priv, 32 << 10);
> +}
>  
> -	i915_gem_object_put(dev_priv->vlv_pctx);
> -	dev_priv->vlv_pctx = NULL;
> +static void valleyview_setup_pctx(struct drm_i915_private *dev_priv)
> +{
> +	setup_pctx(dev_priv, 24 << 10);
>  }
>  
>  static void vlv_init_gpll_ref_freq(struct drm_i915_private *dev_priv)
> @@ -7225,11 +7202,6 @@ static void cherryview_init_gt_powersave(struct drm_i915_private *dev_priv)
>  		  "Odd GPU freq values\n");
>  }
>  
> -static void valleyview_cleanup_gt_powersave(struct drm_i915_private *dev_priv)
> -{
> -	valleyview_cleanup_pctx(dev_priv);
> -}
> -
>  static void cherryview_enable_rc6(struct drm_i915_private *dev_priv)
>  {
>  	struct intel_engine_cs *engine;
> @@ -7949,8 +7921,11 @@ void intel_init_gt_powersave(struct drm_i915_private *dev_priv)
>  
>  void intel_cleanup_gt_powersave(struct drm_i915_private *dev_priv)
>  {
> -	if (IS_VALLEYVIEW(dev_priv))
> -		valleyview_cleanup_gt_powersave(dev_priv);
> +	struct drm_i915_gem_object *pctx;
> +
> +	pctx = fetch_and_zero(&dev_priv->gt_pm.rc6.pctx);
> +	if (pctx)
> +		i915_gem_object_put(pctx);
>  
>  	if (!i915_modparams.enable_rc6)
>  		intel_runtime_pm_put(dev_priv);
> -- 
> 2.15.0
> 
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH] drm/i915: Reserve powerctx for chv from the stolen allocator

[Chris Wilson]

Quoting Ville Syrjälä (2017-11-06 14:23:24)
> On Sat, Nov 04, 2017 at 09:43:38PM +0000, Chris Wilson wrote:
> > Ensure that we do not overwrite the cherryview power context by
> > reserving its range in the stolen allocator; exactly like how we handle
> > the same reservation for valleyview.
> 
> IIRC CHV pctx must live inside the "reserved" region. So this
> should never happen.

It's supposed to. Otoh, the duplication for no good reason is inane.
Then to complete the picture, we should be able to merge this with ilk
powerctx, should we resurrect it.
-Chris
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Re: [PATCH] drm/i915: Reserve powerctx for chv from the stolen allocator

[Ville Syrjälä]

On Mon, Nov 06, 2017 at 02:32:50PM +0000, Chris Wilson wrote:
> Quoting Ville Syrjälä (2017-11-06 14:23:24)
> > On Sat, Nov 04, 2017 at 09:43:38PM +0000, Chris Wilson wrote:
> > > Ensure that we do not overwrite the cherryview power context by
> > > reserving its range in the stolen allocator; exactly like how we handle
> > > the same reservation for valleyview.
> > 
> > IIRC CHV pctx must live inside the "reserved" region. So this
> > should never happen.
> 
> It's supposed to. Otoh, the duplication for no good reason is inane.

Well, it's not really duplication because it allocates the object in a
different place. VLV wants it below the reserved region, CHV wants it
inside the reserved region. Given that the reserved region isn't part of
the mm we can't use the VLV code to allocate the pctx correctly for CHV.

> Then to complete the picture, we should be able to merge this with ilk
> powerctx, should we resurrect it.
> -Chris

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH] drm/i915: Reserve powerctx for chv from the stolen allocator

[Chris Wilson]

Quoting Ville Syrjälä (2017-11-06 14:43:12)
> On Mon, Nov 06, 2017 at 02:32:50PM +0000, Chris Wilson wrote:
> > Quoting Ville Syrjälä (2017-11-06 14:23:24)
> > > On Sat, Nov 04, 2017 at 09:43:38PM +0000, Chris Wilson wrote:
> > > > Ensure that we do not overwrite the cherryview power context by
> > > > reserving its range in the stolen allocator; exactly like how we handle
> > > > the same reservation for valleyview.
> > > 
> > > IIRC CHV pctx must live inside the "reserved" region. So this
> > > should never happen.
> > 
> > It's supposed to. Otoh, the duplication for no good reason is inane.
> 
> Well, it's not really duplication because it allocates the object in a
> different place. VLV wants it below the reserved region, CHV wants it
> inside the reserved region. Given that the reserved region isn't part of
> the mm we can't use the VLV code to allocate the pctx correctly for CHV.

There's no reason why we can't allow the preallocations to be inside the
reserved portion while preventing allocations from it, it's just a
matter of tracking. It's just so aggravating to have multiple drivers
making independent decisions on shared resources.
-Chris
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