* [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
@ 2017-11-08 23:30 Rodrigo Vivi
2017-11-08 23:48 ` ✗ Fi.CI.BAT: warning for " Patchwork
` (13 more replies)
0 siblings, 14 replies; 25+ messages in thread
From: Rodrigo Vivi @ 2017-11-08 23:30 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
PM Rsp is not sent when plane is turned off at around the
time that a PM fill Req is received by display
WA: disable arbiter clock gating, set bit [27] of 0x46530
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++
2 files changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 6ef33422f762..fc8c5f8260f6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3819,6 +3819,7 @@ enum {
* GEN9 clock gating regs
*/
#define GEN9_CLKGATE_DIS_0 _MMIO(0x46530)
+#define DARBF_GATING_DIS (1 << 27)
#define PWM2_GATING_DIS (1 << 14)
#define PWM1_GATING_DIS (1 << 13)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index e09377df590d..e642e8983035 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -127,6 +127,10 @@ static void glk_init_clock_gating(struct drm_i915_private *dev_priv)
u32 val;
gen9_init_clock_gating(dev_priv);
+ /* Display WA #1185 WaDisableDARBFClkGating:glk */
+ I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
+ DARBF_GATING_DIS);
+
/*
* WaDisablePWMClockGating:glk
* Backlight PWM may stop in the asserted state, causing backlight
@@ -8528,6 +8532,10 @@ static void cnl_init_clock_gating(struct drm_i915_private *dev_priv)
u32 val;
cnp_init_clock_gating(dev_priv);
+ /* Display WA #1185 WaDisableDARBFClkGating:cnl */
+ I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
+ DARBF_GATING_DIS);
+
/* This is not an Wa. Enable for better image quality */
I915_WRITE(_3D_CHICKEN3,
_MASKED_BIT_ENABLE(_3D_CHICKEN3_AA_LINE_QUALITY_FIX_ENABLE));
--
2.13.6
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* ✗ Fi.CI.BAT: warning for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
2017-11-08 23:30 [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk Rodrigo Vivi
@ 2017-11-08 23:48 ` Patchwork
2017-11-09 0:31 ` ✗ Fi.CI.IGT: failure " Patchwork
` (12 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2017-11-08 23:48 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
URL : https://patchwork.freedesktop.org/series/33463/
State : warning
== Summary ==
Series 33463v1 drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
https://patchwork.freedesktop.org/api/1.0/series/33463/revisions/1/mbox/
Test chamelium:
Subgroup dp-crc-fast:
fail -> PASS (fi-kbl-7500u) fdo#102514
Test kms_addfb_basic:
Subgroup bad-pitch-256:
pass -> DMESG-WARN (fi-bdw-gvtdvm)
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail -> PASS (fi-gdg-551) fdo#102618
Test drv_module_reload:
Subgroup basic-reload-inject:
pass -> DMESG-WARN (fi-skl-6770hq)
fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618
fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:446s
fi-bdw-gvtdvm total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:452s
fi-blb-e6850 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:378s
fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:537s
fi-bwr-2160 total:289 pass:183 dwarn:0 dfail:0 fail:0 skip:106 time:273s
fi-bxt-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:501s
fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:503s
fi-byt-j1900 total:289 pass:254 dwarn:0 dfail:0 fail:0 skip:35 time:495s
fi-byt-n2820 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:486s
fi-elk-e7500 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:425s
fi-gdg-551 total:289 pass:178 dwarn:1 dfail:0 fail:1 skip:109 time:264s
fi-glk-1 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:542s
fi-hsw-4770 total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:429s
fi-hsw-4770r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:441s
fi-ilk-650 total:289 pass:228 dwarn:0 dfail:0 fail:0 skip:61 time:426s
fi-ivb-3520m total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:476s
fi-ivb-3770 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:459s
fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:489s
fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:517s
fi-kbl-7567u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:476s
fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:540s
fi-pnv-d510 total:289 pass:222 dwarn:1 dfail:0 fail:0 skip:66 time:571s
fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:450s
fi-skl-6600u total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:550s
fi-skl-6700hq total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:559s
fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:514s
fi-skl-6770hq total:289 pass:268 dwarn:1 dfail:0 fail:0 skip:20 time:500s
fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:461s
fi-snb-2520m total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:572s
fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:0 skip:40 time:423s
Blacklisted hosts:
fi-cfl-s total:289 pass:254 dwarn:3 dfail:0 fail:0 skip:32 time:540s
d284738777d7fd37505baef575e8229dee710deb drm-tip: 2017y-11m-08d-17h-36m-01s UTC integration manifest
fa60ba06f2a4 drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7020/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✗ Fi.CI.IGT: failure for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
2017-11-08 23:30 [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk Rodrigo Vivi
2017-11-08 23:48 ` ✗ Fi.CI.BAT: warning for " Patchwork
@ 2017-11-09 0:31 ` Patchwork
2017-11-09 0:55 ` ✓ Fi.CI.BAT: success " Patchwork
` (11 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2017-11-09 0:31 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
URL : https://patchwork.freedesktop.org/series/33463/
State : failure
== Summary ==
Test kms_cursor_crc:
Subgroup cursor-256x256-suspend:
pass -> FAIL (shard-hsw)
Test kms_flip:
Subgroup vblank-vs-suspend-interruptible:
skip -> PASS (shard-hsw) fdo#100368
Test kms_busy:
Subgroup extended-modeset-hang-newfb-with-reset-render-a:
pass -> DMESG-WARN (shard-hsw) fdo#102249
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102249 https://bugs.freedesktop.org/show_bug.cgi?id=102249
shard-hsw total:2540 pass:1431 dwarn:1 dfail:0 fail:11 skip:1097 time:9269s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7020/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
2017-11-08 23:30 [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk Rodrigo Vivi
2017-11-08 23:48 ` ✗ Fi.CI.BAT: warning for " Patchwork
2017-11-09 0:31 ` ✗ Fi.CI.IGT: failure " Patchwork
@ 2017-11-09 0:55 ` Patchwork
2017-11-09 1:31 ` ✗ Fi.CI.BAT: warning " Patchwork
` (10 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2017-11-09 0:55 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
URL : https://patchwork.freedesktop.org/series/33463/
State : success
== Summary ==
Series 33463v1 drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
https://patchwork.freedesktop.org/api/1.0/series/33463/revisions/1/mbox/
fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:442s
fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:458s
fi-blb-e6850 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:382s
fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:542s
fi-bwr-2160 total:289 pass:183 dwarn:0 dfail:0 fail:0 skip:106 time:275s
fi-bxt-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:497s
fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:503s
fi-byt-j1900 total:289 pass:254 dwarn:0 dfail:0 fail:0 skip:35 time:494s
fi-byt-n2820 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:488s
fi-elk-e7500 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:425s
fi-gdg-551 total:289 pass:178 dwarn:1 dfail:0 fail:1 skip:109 time:265s
fi-glk-1 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:537s
fi-hsw-4770 total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:430s
fi-hsw-4770r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:444s
fi-ilk-650 total:289 pass:228 dwarn:0 dfail:0 fail:0 skip:61 time:423s
fi-ivb-3520m total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:478s
fi-ivb-3770 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:461s
fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:483s
fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:524s
fi-kbl-7567u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:478s
fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:546s
fi-pnv-d510 total:289 pass:222 dwarn:1 dfail:0 fail:0 skip:66 time:576s
fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:458s
fi-skl-6600u total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:544s
fi-skl-6700hq total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:570s
fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:520s
fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:499s
fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:463s
fi-snb-2520m total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:557s
fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:0 skip:40 time:420s
Blacklisted hosts:
fi-cfl-s total:289 pass:254 dwarn:3 dfail:0 fail:0 skip:32 time:531s
fi-cnl-y total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:559s
1446a30948d7c5570e5cfc40678dbdd74e152498 drm-tip: 2017y-11m-08d-21h-46m-48s UTC integration manifest
fdaf68c2ff2c drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7022/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✗ Fi.CI.BAT: warning for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
2017-11-08 23:30 [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk Rodrigo Vivi
` (2 preceding siblings ...)
2017-11-09 0:55 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2017-11-09 1:31 ` Patchwork
2017-11-09 13:20 ` [PATCH] " Imre Deak
` (9 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2017-11-09 1:31 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
URL : https://patchwork.freedesktop.org/series/33463/
State : warning
== Summary ==
Series 33463v1 drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
https://patchwork.freedesktop.org/api/1.0/series/33463/revisions/1/mbox/
Test kms_flip:
Subgroup basic-flip-vs-modeset:
pass -> DMESG-WARN (fi-snb-2600)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-a:
pass -> SKIP (fi-hsw-4770r)
fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:440s
fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:450s
fi-blb-e6850 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:378s
fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:525s
fi-bwr-2160 total:289 pass:183 dwarn:0 dfail:0 fail:0 skip:106 time:273s
fi-bxt-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:507s
fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:501s
fi-byt-j1900 total:289 pass:254 dwarn:0 dfail:0 fail:0 skip:35 time:495s
fi-byt-n2820 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:487s
fi-elk-e7500 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:426s
fi-gdg-551 total:289 pass:178 dwarn:1 dfail:0 fail:1 skip:109 time:261s
fi-glk-1 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:536s
fi-hsw-4770 total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:427s
fi-hsw-4770r total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:425s
fi-ilk-650 total:289 pass:228 dwarn:0 dfail:0 fail:0 skip:61 time:425s
fi-ivb-3520m total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:478s
fi-ivb-3770 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:459s
fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:486s
fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:525s
fi-kbl-7567u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:480s
fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:536s
fi-pnv-d510 total:289 pass:222 dwarn:1 dfail:0 fail:0 skip:66 time:565s
fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:456s
fi-skl-6600u total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:545s
fi-skl-6700hq total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:566s
fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:525s
fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:492s
fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:456s
fi-snb-2520m total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:558s
fi-snb-2600 total:289 pass:248 dwarn:1 dfail:0 fail:0 skip:40 time:416s
Blacklisted hosts:
fi-cfl-s total:289 pass:254 dwarn:3 dfail:0 fail:0 skip:32 time:515s
fi-cnl-y total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:558s
1446a30948d7c5570e5cfc40678dbdd74e152498 drm-tip: 2017y-11m-08d-21h-46m-48s UTC integration manifest
11eb06cfcb55 drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7024/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
2017-11-08 23:30 [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk Rodrigo Vivi
` (3 preceding siblings ...)
2017-11-09 1:31 ` ✗ Fi.CI.BAT: warning " Patchwork
@ 2017-11-09 13:20 ` Imre Deak
2017-11-09 13:45 ` Ville Syrjälä
` (8 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Imre Deak @ 2017-11-09 13:20 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
On Wed, Nov 08, 2017 at 03:30:16PM -0800, Rodrigo Vivi wrote:
> PM Rsp is not sent when plane is turned off at around the
> time that a PM fill Req is received by display
>
> WA: disable arbiter clock gating, set bit [27] of 0x46530
>
> Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++
> 2 files changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 6ef33422f762..fc8c5f8260f6 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3819,6 +3819,7 @@ enum {
> * GEN9 clock gating regs
> */
> #define GEN9_CLKGATE_DIS_0 _MMIO(0x46530)
> +#define DARBF_GATING_DIS (1 << 27)
> #define PWM2_GATING_DIS (1 << 14)
> #define PWM1_GATING_DIS (1 << 13)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index e09377df590d..e642e8983035 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -127,6 +127,10 @@ static void glk_init_clock_gating(struct drm_i915_private *dev_priv)
> u32 val;
> gen9_init_clock_gating(dev_priv);
>
> + /* Display WA #1185 WaDisableDARBFClkGating:glk */
> + I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
> + DARBF_GATING_DIS);
> +
Could be part of the following write. Either way:
Reviewed-by: Imre Deak <imre.deak@intel.com>
> /*
> * WaDisablePWMClockGating:glk
> * Backlight PWM may stop in the asserted state, causing backlight
> @@ -8528,6 +8532,10 @@ static void cnl_init_clock_gating(struct drm_i915_private *dev_priv)
> u32 val;
> cnp_init_clock_gating(dev_priv);
>
> + /* Display WA #1185 WaDisableDARBFClkGating:cnl */
> + I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
> + DARBF_GATING_DIS);
> +
> /* This is not an Wa. Enable for better image quality */
> I915_WRITE(_3D_CHICKEN3,
> _MASKED_BIT_ENABLE(_3D_CHICKEN3_AA_LINE_QUALITY_FIX_ENABLE));
> --
> 2.13.6
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
2017-11-08 23:30 [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk Rodrigo Vivi
` (4 preceding siblings ...)
2017-11-09 13:20 ` [PATCH] " Imre Deak
@ 2017-11-09 13:45 ` Ville Syrjälä
2017-11-09 17:58 ` Rodrigo Vivi
2017-11-09 22:26 ` Rodrigo Vivi
2017-11-09 22:43 ` ✓ Fi.CI.BAT: success for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev2) Patchwork
` (7 subsequent siblings)
13 siblings, 2 replies; 25+ messages in thread
From: Ville Syrjälä @ 2017-11-09 13:45 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx, Runyan, Arthur J
On Wed, Nov 08, 2017 at 03:30:16PM -0800, Rodrigo Vivi wrote:
> PM Rsp is not sent when plane is turned off at around the
> time that a PM fill Req is received by display
Do we know what the impact of this is? The HSD just seems to say
"Detection method: Hang" which isn't partciluarly helpful.
To me this smells vaguely of WaRsPkgCStateDisplayPMReq:hsw which
will cause a system hang if we don't do it early enough. Do we have
similar concerns here? (and if so please look at commit f72b84c677d6
("drm/i915: Move init_clock_gating() back to where it was"))
Maybe we should start a new init_clock_gating/init_workarounds thing
just for the display, and add all new stuff there? And then we can
start moving the old display w/as etc. there as well.
>
> WA: disable arbiter clock gating, set bit [27] of 0x46530
>
> Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++
> 2 files changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 6ef33422f762..fc8c5f8260f6 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3819,6 +3819,7 @@ enum {
> * GEN9 clock gating regs
> */
> #define GEN9_CLKGATE_DIS_0 _MMIO(0x46530)
> +#define DARBF_GATING_DIS (1 << 27)
> #define PWM2_GATING_DIS (1 << 14)
> #define PWM1_GATING_DIS (1 << 13)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index e09377df590d..e642e8983035 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -127,6 +127,10 @@ static void glk_init_clock_gating(struct drm_i915_private *dev_priv)
> u32 val;
> gen9_init_clock_gating(dev_priv);
>
> + /* Display WA #1185 WaDisableDARBFClkGating:glk */
> + I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
> + DARBF_GATING_DIS);
> +
> /*
> * WaDisablePWMClockGating:glk
> * Backlight PWM may stop in the asserted state, causing backlight
> @@ -8528,6 +8532,10 @@ static void cnl_init_clock_gating(struct drm_i915_private *dev_priv)
> u32 val;
> cnp_init_clock_gating(dev_priv);
>
> + /* Display WA #1185 WaDisableDARBFClkGating:cnl */
> + I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
> + DARBF_GATING_DIS);
> +
> /* This is not an Wa. Enable for better image quality */
> I915_WRITE(_3D_CHICKEN3,
> _MASKED_BIT_ENABLE(_3D_CHICKEN3_AA_LINE_QUALITY_FIX_ENABLE));
> --
> 2.13.6
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
2017-11-09 13:45 ` Ville Syrjälä
@ 2017-11-09 17:58 ` Rodrigo Vivi
2017-11-09 18:05 ` Chris Wilson
2017-11-09 22:26 ` Rodrigo Vivi
1 sibling, 1 reply; 25+ messages in thread
From: Rodrigo Vivi @ 2017-11-09 17:58 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, Runyan, Arthur J
On Thu, Nov 09, 2017 at 01:45:04PM +0000, Ville Syrjälä wrote:
> On Wed, Nov 08, 2017 at 03:30:16PM -0800, Rodrigo Vivi wrote:
> > PM Rsp is not sent when plane is turned off at around the
> > time that a PM fill Req is received by display
>
> Do we know what the impact of this is? The HSD just seems to say
> "Detection method: Hang" which isn't partciluarly helpful.
>
> To me this smells vaguely of WaRsPkgCStateDisplayPMReq:hsw which
> will cause a system hang if we don't do it early enough. Do we have
> similar concerns here?
Well, I do have a bad display hang here and this patch didn't help...
> (and if so please look at commit f72b84c677d6
> ("drm/i915: Move init_clock_gating() back to where it was"))
oh cool! thanks I will take a look on this...
>
> Maybe we should start a new init_clock_gating/init_workarounds thing
> just for the display, and add all new stuff there? And then we can
> start moving the old display w/as etc. there as well.
Maybe this is a work for that series that Oscar is working on?
Thanks,
Rodrigo.
>
> >
> > WA: disable arbiter clock gating, set bit [27] of 0x46530
> >
> > Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> > Cc: Imre Deak <imre.deak@intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++
> > 2 files changed, 9 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 6ef33422f762..fc8c5f8260f6 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -3819,6 +3819,7 @@ enum {
> > * GEN9 clock gating regs
> > */
> > #define GEN9_CLKGATE_DIS_0 _MMIO(0x46530)
> > +#define DARBF_GATING_DIS (1 << 27)
> > #define PWM2_GATING_DIS (1 << 14)
> > #define PWM1_GATING_DIS (1 << 13)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index e09377df590d..e642e8983035 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -127,6 +127,10 @@ static void glk_init_clock_gating(struct drm_i915_private *dev_priv)
> > u32 val;
> > gen9_init_clock_gating(dev_priv);
> >
> > + /* Display WA #1185 WaDisableDARBFClkGating:glk */
> > + I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
> > + DARBF_GATING_DIS);
> > +
> > /*
> > * WaDisablePWMClockGating:glk
> > * Backlight PWM may stop in the asserted state, causing backlight
> > @@ -8528,6 +8532,10 @@ static void cnl_init_clock_gating(struct drm_i915_private *dev_priv)
> > u32 val;
> > cnp_init_clock_gating(dev_priv);
> >
> > + /* Display WA #1185 WaDisableDARBFClkGating:cnl */
> > + I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
> > + DARBF_GATING_DIS);
> > +
> > /* This is not an Wa. Enable for better image quality */
> > I915_WRITE(_3D_CHICKEN3,
> > _MASKED_BIT_ENABLE(_3D_CHICKEN3_AA_LINE_QUALITY_FIX_ENABLE));
> > --
> > 2.13.6
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
2017-11-09 17:58 ` Rodrigo Vivi
@ 2017-11-09 18:05 ` Chris Wilson
0 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2017-11-09 18:05 UTC (permalink / raw)
To: Rodrigo Vivi, Ville Syrjälä; +Cc: intel-gfx, Runyan, Arthur J
Quoting Rodrigo Vivi (2017-11-09 17:58:52)
> On Thu, Nov 09, 2017 at 01:45:04PM +0000, Ville Syrjälä wrote:
> > On Wed, Nov 08, 2017 at 03:30:16PM -0800, Rodrigo Vivi wrote:
> > > PM Rsp is not sent when plane is turned off at around the
> > > time that a PM fill Req is received by display
> >
> > Do we know what the impact of this is? The HSD just seems to say
> > "Detection method: Hang" which isn't partciluarly helpful.
> >
> > To me this smells vaguely of WaRsPkgCStateDisplayPMReq:hsw which
> > will cause a system hang if we don't do it early enough. Do we have
> > similar concerns here?
>
> Well, I do have a bad display hang here and this patch didn't help...
>
> > (and if so please look at commit f72b84c677d6
> > ("drm/i915: Move init_clock_gating() back to where it was"))
>
> oh cool! thanks I will take a look on this...
>
> >
> > Maybe we should start a new init_clock_gating/init_workarounds thing
> > just for the display, and add all new stuff there? And then we can
> > start moving the old display w/as etc. there as well.
>
> Maybe this is a work for that series that Oscar is working on?
It is something we all need input on to make sure the lessons learnt,
are.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
2017-11-09 13:45 ` Ville Syrjälä
2017-11-09 17:58 ` Rodrigo Vivi
@ 2017-11-09 22:26 ` Rodrigo Vivi
2017-11-10 20:13 ` Ville Syrjälä
1 sibling, 1 reply; 25+ messages in thread
From: Rodrigo Vivi @ 2017-11-09 22:26 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
Display is not sending a PMRsp when a PMReq is received
at the same time that all planes are turned off.
State machine in the dcprunit is stuck in the WAIT4DONE
state which means that there is no fill_done.
WA: disable arbiter clock gating, set bit [27] of 0x46530
v2: As Ville pointed out, based on the description the issue
can happen when disabling the planes, similar to
WaRsPkgCStateDisplayPMReq:hsw
Also description of the issue was updated on commit
message to make it more clear that we need this
earlier.
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_display.c | 24 +++++++++++++++---------
2 files changed, 16 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 6ef33422f762..fc8c5f8260f6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3819,6 +3819,7 @@ enum {
* GEN9 clock gating regs
*/
#define GEN9_CLKGATE_DIS_0 _MMIO(0x46530)
+#define DARBF_GATING_DIS (1 << 27)
#define PWM2_GATING_DIS (1 << 14)
#define PWM1_GATING_DIS (1 << 13)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 84817ccc5305..a038610b66cc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15080,6 +15080,20 @@ get_encoder_power_domains(struct drm_i915_private *dev_priv)
}
}
+/* System hang if this isn't done before disabling all planes! */
+static void intel_early_display_was(struct drm_i915_private *dev_priv)
+{
+ /* Display WA #1185 WaDisableDARBFClkGating:cnl,glk */
+ if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
+ I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
+ DARBF_GATING_DIS);
+
+ /* WaRsPkgCStateDisplayPMReq:hsw */
+ if (IS_HASWELL(dev_priv))
+ I915_WRITE(CHICKEN_PAR1_1,
+ I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
+}
+
/* Scan out the current hw modeset state,
* and sanitizes it to the current state
*/
@@ -15093,15 +15107,7 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
struct intel_encoder *encoder;
int i;
- if (IS_HASWELL(dev_priv)) {
- /*
- * WaRsPkgCStateDisplayPMReq:hsw
- * System hang if this isn't done before disabling all planes!
- */
- I915_WRITE(CHICKEN_PAR1_1,
- I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
- }
-
+ intel_early_display_was(dev_priv);
intel_modeset_readout_hw_state(dev);
/* HW state is read out, now we need to sanitize this mess. */
--
2.13.6
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev2)
2017-11-08 23:30 [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk Rodrigo Vivi
` (5 preceding siblings ...)
2017-11-09 13:45 ` Ville Syrjälä
@ 2017-11-09 22:43 ` Patchwork
2017-11-09 23:25 ` ✗ Fi.CI.IGT: failure " Patchwork
` (6 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2017-11-09 22:43 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev2)
URL : https://patchwork.freedesktop.org/series/33463/
State : success
== Summary ==
Series 33463v2 drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
https://patchwork.freedesktop.org/api/1.0/series/33463/revisions/2/mbox/
Test chamelium:
Subgroup dp-crc-fast:
fail -> PASS (fi-kbl-7500u) fdo#102514
Test kms_pipe_crc_basic:
Subgroup read-crc-pipe-a-frame-sequence:
skip -> PASS (fi-hsw-4770r)
fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514
fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:446s
fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:451s
fi-blb-e6850 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:382s
fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:545s
fi-bwr-2160 total:289 pass:183 dwarn:0 dfail:0 fail:0 skip:106 time:275s
fi-bxt-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:511s
fi-byt-j1900 total:289 pass:254 dwarn:0 dfail:0 fail:0 skip:35 time:495s
fi-byt-n2820 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:488s
fi-elk-e7500 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:429s
fi-gdg-551 total:289 pass:178 dwarn:1 dfail:0 fail:1 skip:109 time:263s
fi-glk-1 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:539s
fi-hsw-4770 total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:432s
fi-hsw-4770r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:436s
fi-ilk-650 total:289 pass:228 dwarn:0 dfail:0 fail:0 skip:61 time:425s
fi-ivb-3520m total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:473s
fi-ivb-3770 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:461s
fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:492s
fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:520s
fi-kbl-7567u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:475s
fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:532s
fi-pnv-d510 total:289 pass:222 dwarn:1 dfail:0 fail:0 skip:66 time:570s
fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:454s
fi-skl-6600u total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:548s
fi-skl-6700hq total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:565s
fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:518s
fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:501s
fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:463s
fi-snb-2520m total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:575s
fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:0 skip:40 time:420s
Blacklisted hosts:
fi-cfl-s total:289 pass:244 dwarn:12 dfail:1 fail:0 skip:32 time:545s
fi-cnl-y total:243 pass:218 dwarn:0 dfail:0 fail:0 skip:24
fi-glk-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:491s
fi-bxt-j4205 failed to connect after reboot
bd1f3f04014b597b479785e6125d8bde41939c8c drm-tip: 2017y-11m-09d-18h-20m-22s UTC integration manifest
a9c2c7ad9896 drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7046/
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✗ Fi.CI.IGT: failure for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev2)
2017-11-08 23:30 [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk Rodrigo Vivi
` (6 preceding siblings ...)
2017-11-09 22:43 ` ✓ Fi.CI.BAT: success for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev2) Patchwork
@ 2017-11-09 23:25 ` Patchwork
2017-11-10 21:18 ` ✓ Fi.CI.BAT: success for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev3) Patchwork
` (5 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2017-11-09 23:25 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev2)
URL : https://patchwork.freedesktop.org/series/33463/
State : failure
== Summary ==
Test drv_module_reload:
Subgroup basic-no-display:
dmesg-warn -> PASS (shard-hsw) fdo#102707
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-primscrn-pri-indfb-draw-blt:
pass -> FAIL (shard-hsw)
fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
shard-hsw total:2584 pass:1451 dwarn:2 dfail:2 fail:11 skip:1118 time:9352s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7046/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
2017-11-09 22:26 ` Rodrigo Vivi
@ 2017-11-10 20:13 ` Ville Syrjälä
2017-11-10 20:24 ` Rodrigo Vivi
0 siblings, 1 reply; 25+ messages in thread
From: Ville Syrjälä @ 2017-11-10 20:13 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
On Thu, Nov 09, 2017 at 02:26:32PM -0800, Rodrigo Vivi wrote:
> Display is not sending a PMRsp when a PMReq is received
> at the same time that all planes are turned off.
> State machine in the dcprunit is stuck in the WAIT4DONE
> state which means that there is no fill_done.
>
> WA: disable arbiter clock gating, set bit [27] of 0x46530
>
> v2: As Ville pointed out, based on the description the issue
> can happen when disabling the planes, similar to
> WaRsPkgCStateDisplayPMReq:hsw
> Also description of the issue was updated on commit
> message to make it more clear that we need this
> earlier.
I guess we don't know exactly if this has the same ordering requirements
as WaRsPkgCStateDisplayPMReq:hsw. But playing it safe can't hurt I
suppose.
>
> Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_display.c | 24 +++++++++++++++---------
> 2 files changed, 16 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 6ef33422f762..fc8c5f8260f6 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3819,6 +3819,7 @@ enum {
> * GEN9 clock gating regs
> */
> #define GEN9_CLKGATE_DIS_0 _MMIO(0x46530)
> +#define DARBF_GATING_DIS (1 << 27)
> #define PWM2_GATING_DIS (1 << 14)
> #define PWM1_GATING_DIS (1 << 13)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 84817ccc5305..a038610b66cc 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -15080,6 +15080,20 @@ get_encoder_power_domains(struct drm_i915_private *dev_priv)
> }
> }
>
> +/* System hang if this isn't done before disabling all planes! */
> +static void intel_early_display_was(struct drm_i915_private *dev_priv)
> +{
> + /* Display WA #1185 WaDisableDARBFClkGating:cnl,glk */
> + if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
Bspec says GLK isn't affected.
> + I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
> + DARBF_GATING_DIS);
> +
> + /* WaRsPkgCStateDisplayPMReq:hsw */
Please keep the comment about the hsw system hangs here. The next guy to
touch this code is probably not going to be aware of it, or may simply
have forgotten it already.
With that those addresses this is
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> + if (IS_HASWELL(dev_priv))
> + I915_WRITE(CHICKEN_PAR1_1,
> + I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
> +}
> +
> /* Scan out the current hw modeset state,
> * and sanitizes it to the current state
> */
> @@ -15093,15 +15107,7 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
> struct intel_encoder *encoder;
> int i;
>
> - if (IS_HASWELL(dev_priv)) {
> - /*
> - * WaRsPkgCStateDisplayPMReq:hsw
> - * System hang if this isn't done before disabling all planes!
> - */
> - I915_WRITE(CHICKEN_PAR1_1,
> - I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
> - }
> -
> + intel_early_display_was(dev_priv);
> intel_modeset_readout_hw_state(dev);
>
> /* HW state is read out, now we need to sanitize this mess. */
> --
> 2.13.6
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
2017-11-10 20:13 ` Ville Syrjälä
@ 2017-11-10 20:24 ` Rodrigo Vivi
2017-11-10 20:44 ` Ville Syrjälä
0 siblings, 1 reply; 25+ messages in thread
From: Rodrigo Vivi @ 2017-11-10 20:24 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Fri, Nov 10, 2017 at 08:13:44PM +0000, Ville Syrjälä wrote:
> On Thu, Nov 09, 2017 at 02:26:32PM -0800, Rodrigo Vivi wrote:
> > Display is not sending a PMRsp when a PMReq is received
> > at the same time that all planes are turned off.
> > State machine in the dcprunit is stuck in the WAIT4DONE
> > state which means that there is no fill_done.
> >
> > WA: disable arbiter clock gating, set bit [27] of 0x46530
> >
> > v2: As Ville pointed out, based on the description the issue
> > can happen when disabling the planes, similar to
> > WaRsPkgCStateDisplayPMReq:hsw
> > Also description of the issue was updated on commit
> > message to make it more clear that we need this
> > earlier.
>
> I guess we don't know exactly if this has the same ordering requirements
> as WaRsPkgCStateDisplayPMReq:hsw. But playing it safe can't hurt I
> suppose.
>
> >
> > Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> > Cc: Imre Deak <imre.deak@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > drivers/gpu/drm/i915/intel_display.c | 24 +++++++++++++++---------
> > 2 files changed, 16 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 6ef33422f762..fc8c5f8260f6 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -3819,6 +3819,7 @@ enum {
> > * GEN9 clock gating regs
> > */
> > #define GEN9_CLKGATE_DIS_0 _MMIO(0x46530)
> > +#define DARBF_GATING_DIS (1 << 27)
> > #define PWM2_GATING_DIS (1 << 14)
> > #define PWM1_GATING_DIS (1 << 13)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 84817ccc5305..a038610b66cc 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -15080,6 +15080,20 @@ get_encoder_power_domains(struct drm_i915_private *dev_priv)
> > }
> > }
> >
> > +/* System hang if this isn't done before disabling all planes! */
> > +static void intel_early_display_was(struct drm_i915_private *dev_priv)
> > +{
> > + /* Display WA #1185 WaDisableDARBFClkGating:cnl,glk */
> > + if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
>
> Bspec says GLK isn't affected.
Bspec refers to GLK as Gen10 display...
so GEN10:All is also GLK...
but if you look 2 columns ahead you see this:
GEN:BUG:1947072 [CNL, GLK]
>
> > + I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
> > + DARBF_GATING_DIS);
> > +
> > + /* WaRsPkgCStateDisplayPMReq:hsw */
>
> Please keep the comment about the hsw system hangs here. The next guy to
> touch this code is probably not going to be aware of it, or may simply
> have forgotten it already.
makes sense...
should I keep the one in the function comment as well? and duplicate
the comment on the new one or since we are not that sure we just leave
the comment close to the hsw one?
>
> With that those addresses this is
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
thanks
>
> > + if (IS_HASWELL(dev_priv))
> > + I915_WRITE(CHICKEN_PAR1_1,
> > + I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
> > +}
> > +
> > /* Scan out the current hw modeset state,
> > * and sanitizes it to the current state
> > */
> > @@ -15093,15 +15107,7 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
> > struct intel_encoder *encoder;
> > int i;
> >
> > - if (IS_HASWELL(dev_priv)) {
> > - /*
> > - * WaRsPkgCStateDisplayPMReq:hsw
> > - * System hang if this isn't done before disabling all planes!
> > - */
> > - I915_WRITE(CHICKEN_PAR1_1,
> > - I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
> > - }
> > -
> > + intel_early_display_was(dev_priv);
> > intel_modeset_readout_hw_state(dev);
> >
> > /* HW state is read out, now we need to sanitize this mess. */
> > --
> > 2.13.6
>
> --
> Ville Syrjälä
> Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
2017-11-10 20:24 ` Rodrigo Vivi
@ 2017-11-10 20:44 ` Ville Syrjälä
2017-11-10 20:58 ` Rodrigo Vivi
0 siblings, 1 reply; 25+ messages in thread
From: Ville Syrjälä @ 2017-11-10 20:44 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
On Fri, Nov 10, 2017 at 12:24:24PM -0800, Rodrigo Vivi wrote:
> On Fri, Nov 10, 2017 at 08:13:44PM +0000, Ville Syrjälä wrote:
> > On Thu, Nov 09, 2017 at 02:26:32PM -0800, Rodrigo Vivi wrote:
> > > Display is not sending a PMRsp when a PMReq is received
> > > at the same time that all planes are turned off.
> > > State machine in the dcprunit is stuck in the WAIT4DONE
> > > state which means that there is no fill_done.
> > >
> > > WA: disable arbiter clock gating, set bit [27] of 0x46530
> > >
> > > v2: As Ville pointed out, based on the description the issue
> > > can happen when disabling the planes, similar to
> > > WaRsPkgCStateDisplayPMReq:hsw
> > > Also description of the issue was updated on commit
> > > message to make it more clear that we need this
> > > earlier.
> >
> > I guess we don't know exactly if this has the same ordering requirements
> > as WaRsPkgCStateDisplayPMReq:hsw. But playing it safe can't hurt I
> > suppose.
> >
> > >
> > > Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> > > Cc: Imre Deak <imre.deak@intel.com>
> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > > drivers/gpu/drm/i915/intel_display.c | 24 +++++++++++++++---------
> > > 2 files changed, 16 insertions(+), 9 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > > index 6ef33422f762..fc8c5f8260f6 100644
> > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > @@ -3819,6 +3819,7 @@ enum {
> > > * GEN9 clock gating regs
> > > */
> > > #define GEN9_CLKGATE_DIS_0 _MMIO(0x46530)
> > > +#define DARBF_GATING_DIS (1 << 27)
> > > #define PWM2_GATING_DIS (1 << 14)
> > > #define PWM1_GATING_DIS (1 << 13)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > > index 84817ccc5305..a038610b66cc 100644
> > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > @@ -15080,6 +15080,20 @@ get_encoder_power_domains(struct drm_i915_private *dev_priv)
> > > }
> > > }
> > >
> > > +/* System hang if this isn't done before disabling all planes! */
> > > +static void intel_early_display_was(struct drm_i915_private *dev_priv)
> > > +{
> > > + /* Display WA #1185 WaDisableDARBFClkGating:cnl,glk */
> > > + if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
> >
> > Bspec says GLK isn't affected.
>
> Bspec refers to GLK as Gen10 display...
> so GEN10:All is also GLK...
> but if you look 2 columns ahead you see this:
> GEN:BUG:1947072 [CNL, GLK]
Ah. And the hsd does indeed list glk as well.
>
> >
> > > + I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
> > > + DARBF_GATING_DIS);
> > > +
> > > + /* WaRsPkgCStateDisplayPMReq:hsw */
> >
> > Please keep the comment about the hsw system hangs here. The next guy to
> > touch this code is probably not going to be aware of it, or may simply
> > have forgotten it already.
>
> makes sense...
> should I keep the one in the function comment as well? and duplicate
> the comment on the new one or since we are not that sure we just leave
> the comment close to the hsw one?
I'd just keep it on the hsw one since we know that's how it works
on hsw. Having it on the cnl/glk one would be more speculation at
this point.
>
> >
> > With that those addresses this is
> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> thanks
>
> >
> > > + if (IS_HASWELL(dev_priv))
> > > + I915_WRITE(CHICKEN_PAR1_1,
> > > + I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
> > > +}
> > > +
> > > /* Scan out the current hw modeset state,
> > > * and sanitizes it to the current state
> > > */
> > > @@ -15093,15 +15107,7 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
> > > struct intel_encoder *encoder;
> > > int i;
> > >
> > > - if (IS_HASWELL(dev_priv)) {
> > > - /*
> > > - * WaRsPkgCStateDisplayPMReq:hsw
> > > - * System hang if this isn't done before disabling all planes!
> > > - */
> > > - I915_WRITE(CHICKEN_PAR1_1,
> > > - I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
> > > - }
> > > -
> > > + intel_early_display_was(dev_priv);
> > > intel_modeset_readout_hw_state(dev);
> > >
> > > /* HW state is read out, now we need to sanitize this mess. */
> > > --
> > > 2.13.6
> >
> > --
> > Ville Syrjälä
> > Intel OTC
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
2017-11-10 20:44 ` Ville Syrjälä
@ 2017-11-10 20:58 ` Rodrigo Vivi
2017-11-10 21:11 ` Ville Syrjälä
0 siblings, 1 reply; 25+ messages in thread
From: Rodrigo Vivi @ 2017-11-10 20:58 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
Display is not sending a PMRsp when a PMReq is received
at the same time that all planes are turned off.
State machine in the dcprunit is stuck in the WAIT4DONE
state which means that there is no fill_done.
WA: disable arbiter clock gating, set bit [27] of 0x46530
v2: As Ville pointed out, based on the description the issue
can happen when disabling the planes, similar to
WaRsPkgCStateDisplayPMReq:hsw
Also description of the issue was updated on commit
message to make it more clear that we need this
earlier.
v3: Restore comment about possibility to system hang
to where we are sure about it, without speculation. (Ville).
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_display.c | 24 +++++++++++++++---------
2 files changed, 16 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 6ef33422f762..fc8c5f8260f6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3819,6 +3819,7 @@ enum {
* GEN9 clock gating regs
*/
#define GEN9_CLKGATE_DIS_0 _MMIO(0x46530)
+#define DARBF_GATING_DIS (1 << 27)
#define PWM2_GATING_DIS (1 << 14)
#define PWM1_GATING_DIS (1 << 13)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5c7540f3f5dc..282a4664a517 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15081,6 +15081,20 @@ get_encoder_power_domains(struct drm_i915_private *dev_priv)
}
}
+/* System hang if this isn't done before disabling all planes! */
+static void intel_early_display_was(struct drm_i915_private *dev_priv)
+{
+ /* Display WA #1185 WaDisableDARBFClkGating:cnl,glk */
+ if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
+ I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
+ DARBF_GATING_DIS);
+
+ /* WaRsPkgCStateDisplayPMReq:hsw */
+ if (IS_HASWELL(dev_priv))
+ I915_WRITE(CHICKEN_PAR1_1,
+ I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
+}
+
/* Scan out the current hw modeset state,
* and sanitizes it to the current state
*/
@@ -15094,15 +15108,7 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
struct intel_encoder *encoder;
int i;
- if (IS_HASWELL(dev_priv)) {
- /*
- * WaRsPkgCStateDisplayPMReq:hsw
- * System hang if this isn't done before disabling all planes!
- */
- I915_WRITE(CHICKEN_PAR1_1,
- I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
- }
-
+ intel_early_display_was(dev_priv);
intel_modeset_readout_hw_state(dev);
/* HW state is read out, now we need to sanitize this mess. */
--
2.13.6
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* Re: [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
2017-11-10 20:58 ` Rodrigo Vivi
@ 2017-11-10 21:11 ` Ville Syrjälä
2017-11-10 21:17 ` Rodrigo Vivi
2017-11-11 0:03 ` Rodrigo Vivi
0 siblings, 2 replies; 25+ messages in thread
From: Ville Syrjälä @ 2017-11-10 21:11 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
On Fri, Nov 10, 2017 at 12:58:50PM -0800, Rodrigo Vivi wrote:
> Display is not sending a PMRsp when a PMReq is received
> at the same time that all planes are turned off.
> State machine in the dcprunit is stuck in the WAIT4DONE
> state which means that there is no fill_done.
>
> WA: disable arbiter clock gating, set bit [27] of 0x46530
>
> v2: As Ville pointed out, based on the description the issue
> can happen when disabling the planes, similar to
> WaRsPkgCStateDisplayPMReq:hsw
> Also description of the issue was updated on commit
> message to make it more clear that we need this
> earlier.
> v3: Restore comment about possibility to system hang
> to where we are sure about it, without speculation. (Ville).
>
> Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
^ double sob
The dangers of adding tags below your sob line and using -s...
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_display.c | 24 +++++++++++++++---------
> 2 files changed, 16 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 6ef33422f762..fc8c5f8260f6 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3819,6 +3819,7 @@ enum {
> * GEN9 clock gating regs
> */
> #define GEN9_CLKGATE_DIS_0 _MMIO(0x46530)
> +#define DARBF_GATING_DIS (1 << 27)
> #define PWM2_GATING_DIS (1 << 14)
> #define PWM1_GATING_DIS (1 << 13)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5c7540f3f5dc..282a4664a517 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -15081,6 +15081,20 @@ get_encoder_power_domains(struct drm_i915_private *dev_priv)
> }
> }
>
> +/* System hang if this isn't done before disabling all planes! */
> +static void intel_early_display_was(struct drm_i915_private *dev_priv)
> +{
> + /* Display WA #1185 WaDisableDARBFClkGating:cnl,glk */
> + if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
> + I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
> + DARBF_GATING_DIS);
> +
> + /* WaRsPkgCStateDisplayPMReq:hsw */
> + if (IS_HASWELL(dev_priv))
> + I915_WRITE(CHICKEN_PAR1_1,
> + I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
> +}
> +
> /* Scan out the current hw modeset state,
> * and sanitizes it to the current state
> */
> @@ -15094,15 +15108,7 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
> struct intel_encoder *encoder;
> int i;
>
> - if (IS_HASWELL(dev_priv)) {
> - /*
> - * WaRsPkgCStateDisplayPMReq:hsw
> - * System hang if this isn't done before disabling all planes!
> - */
> - I915_WRITE(CHICKEN_PAR1_1,
> - I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
> - }
> -
> + intel_early_display_was(dev_priv);
> intel_modeset_readout_hw_state(dev);
>
> /* HW state is read out, now we need to sanitize this mess. */
> --
> 2.13.6
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
2017-11-10 21:11 ` Ville Syrjälä
@ 2017-11-10 21:17 ` Rodrigo Vivi
2017-11-11 0:03 ` Rodrigo Vivi
1 sibling, 0 replies; 25+ messages in thread
From: Rodrigo Vivi @ 2017-11-10 21:17 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Fri, Nov 10, 2017 at 09:11:01PM +0000, Ville Syrjälä wrote:
> On Fri, Nov 10, 2017 at 12:58:50PM -0800, Rodrigo Vivi wrote:
> > Display is not sending a PMRsp when a PMReq is received
> > at the same time that all planes are turned off.
> > State machine in the dcprunit is stuck in the WAIT4DONE
> > state which means that there is no fill_done.
> >
> > WA: disable arbiter clock gating, set bit [27] of 0x46530
> >
> > v2: As Ville pointed out, based on the description the issue
> > can happen when disabling the planes, similar to
> > WaRsPkgCStateDisplayPMReq:hsw
> > Also description of the issue was updated on commit
> > message to make it more clear that we need this
> > earlier.
> > v3: Restore comment about possibility to system hang
> > to where we are sure about it, without speculation. (Ville).
> >
> > Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> > Cc: Imre Deak <imre.deak@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> ^ double sob
>
> The dangers of adding tags below your sob line and using -s...
exactly!
thanks a lot for noticing that... I will remove when merging...
>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > drivers/gpu/drm/i915/intel_display.c | 24 +++++++++++++++---------
> > 2 files changed, 16 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 6ef33422f762..fc8c5f8260f6 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -3819,6 +3819,7 @@ enum {
> > * GEN9 clock gating regs
> > */
> > #define GEN9_CLKGATE_DIS_0 _MMIO(0x46530)
> > +#define DARBF_GATING_DIS (1 << 27)
> > #define PWM2_GATING_DIS (1 << 14)
> > #define PWM1_GATING_DIS (1 << 13)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 5c7540f3f5dc..282a4664a517 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -15081,6 +15081,20 @@ get_encoder_power_domains(struct drm_i915_private *dev_priv)
> > }
> > }
> >
> > +/* System hang if this isn't done before disabling all planes! */
> > +static void intel_early_display_was(struct drm_i915_private *dev_priv)
> > +{
> > + /* Display WA #1185 WaDisableDARBFClkGating:cnl,glk */
> > + if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
> > + I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
> > + DARBF_GATING_DIS);
> > +
> > + /* WaRsPkgCStateDisplayPMReq:hsw */
> > + if (IS_HASWELL(dev_priv))
> > + I915_WRITE(CHICKEN_PAR1_1,
> > + I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
> > +}
> > +
> > /* Scan out the current hw modeset state,
> > * and sanitizes it to the current state
> > */
> > @@ -15094,15 +15108,7 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
> > struct intel_encoder *encoder;
> > int i;
> >
> > - if (IS_HASWELL(dev_priv)) {
> > - /*
> > - * WaRsPkgCStateDisplayPMReq:hsw
> > - * System hang if this isn't done before disabling all planes!
> > - */
> > - I915_WRITE(CHICKEN_PAR1_1,
> > - I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
> > - }
> > -
> > + intel_early_display_was(dev_priv);
> > intel_modeset_readout_hw_state(dev);
> >
> > /* HW state is read out, now we need to sanitize this mess. */
> > --
> > 2.13.6
>
> --
> Ville Syrjälä
> Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev3)
2017-11-08 23:30 [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk Rodrigo Vivi
` (7 preceding siblings ...)
2017-11-09 23:25 ` ✗ Fi.CI.IGT: failure " Patchwork
@ 2017-11-10 21:18 ` Patchwork
2017-11-10 23:00 ` ✓ Fi.CI.IGT: " Patchwork
` (4 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2017-11-10 21:18 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev3)
URL : https://patchwork.freedesktop.org/series/33463/
State : success
== Summary ==
Series 33463v3 drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
https://patchwork.freedesktop.org/api/1.0/series/33463/revisions/3/mbox/
Test gem_exec_reloc:
Subgroup basic-gtt-read-active:
fail -> PASS (fi-gdg-551) fdo#102582
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-a:
pass -> FAIL (fi-ivb-3520m) fdo#103375 +2
fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:445s
fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:460s
fi-blb-e6850 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:381s
fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:541s
fi-bwr-2160 total:289 pass:183 dwarn:0 dfail:0 fail:0 skip:106 time:274s
fi-bxt-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:503s
fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:506s
fi-byt-j1900 total:289 pass:254 dwarn:0 dfail:0 fail:0 skip:35 time:495s
fi-byt-n2820 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:487s
fi-elk-e7500 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:430s
fi-gdg-551 total:289 pass:178 dwarn:1 dfail:0 fail:1 skip:109 time:265s
fi-glk-1 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:541s
fi-hsw-4770 total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:433s
fi-hsw-4770r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:439s
fi-ilk-650 total:289 pass:228 dwarn:0 dfail:0 fail:0 skip:61 time:432s
fi-ivb-3520m total:289 pass:257 dwarn:0 dfail:0 fail:3 skip:29 time:429s
fi-ivb-3770 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:463s
fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:483s
fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:528s
fi-kbl-7567u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:479s
fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:538s
fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:457s
fi-skl-6600u total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:541s
fi-skl-6700hq total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:564s
fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:519s
fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:496s
fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:463s
fi-snb-2520m total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:557s
fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:0 skip:40 time:420s
Blacklisted hosts:
fi-cfl-s total:289 pass:254 dwarn:3 dfail:0 fail:0 skip:32 time:530s
fi-cnl-y total:289 pass:261 dwarn:0 dfail:0 fail:1 skip:27 time:560s
fi-glk-dsi total:289 pass:163 dwarn:0 dfail:10 fail:2 skip:114 time:412s
1342299348dec3bd4890284390a2209a00beafce drm-tip: 2017y-11m-10d-18h-11m-22s UTC integration manifest
2ef738bbac89 drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7070/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev3)
2017-11-08 23:30 [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk Rodrigo Vivi
` (8 preceding siblings ...)
2017-11-10 21:18 ` ✓ Fi.CI.BAT: success for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev3) Patchwork
@ 2017-11-10 23:00 ` Patchwork
2017-11-11 0:22 ` ✗ Fi.CI.BAT: warning for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev4) Patchwork
` (3 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2017-11-10 23:00 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev3)
URL : https://patchwork.freedesktop.org/series/33463/
State : success
== Summary ==
Test kms_setmode:
Subgroup basic:
fail -> PASS (shard-hsw) fdo#99912
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
shard-hsw total:2584 pass:1471 dwarn:4 dfail:2 fail:8 skip:1099 time:9488s
Blacklisted hosts:
shard-apl total:2584 pass:1622 dwarn:2 dfail:1 fail:23 skip:936 time:13156s
shard-kbl total:2565 pass:1710 dwarn:4 dfail:1 fail:22 skip:827 time:10598s
shard-snb total:2511 pass:1172 dwarn:3 dfail:2 fail:12 skip:1322 time:7451s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7070/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
2017-11-10 21:11 ` Ville Syrjälä
2017-11-10 21:17 ` Rodrigo Vivi
@ 2017-11-11 0:03 ` Rodrigo Vivi
1 sibling, 0 replies; 25+ messages in thread
From: Rodrigo Vivi @ 2017-11-11 0:03 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
Display is not sending a PMRsp when a PMReq is received
at the same time that all planes are turned off.
State machine in the dcprunit is stuck in the WAIT4DONE
state which means that there is no fill_done.
WA: disable arbiter clock gating, set bit [27] of 0x46530
v2: As Ville pointed out, based on the description the issue
can happen when disabling the planes, similar to
WaRsPkgCStateDisplayPMReq:hsw
Also description of the issue was updated on commit
message to make it more clear that we need this
earlier.
v3: Restore comment about possibility to system hang
to where we are sure about it, without speculation. (Ville).
v4: Remove doubled sob. Actually do v3 changes :/
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_display.c | 27 ++++++++++++++++++---------
2 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 6ef33422f762..fc8c5f8260f6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3819,6 +3819,7 @@ enum {
* GEN9 clock gating regs
*/
#define GEN9_CLKGATE_DIS_0 _MMIO(0x46530)
+#define DARBF_GATING_DIS (1 << 27)
#define PWM2_GATING_DIS (1 << 14)
#define PWM1_GATING_DIS (1 << 13)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5c7540f3f5dc..60458ad12fae 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15081,6 +15081,23 @@ get_encoder_power_domains(struct drm_i915_private *dev_priv)
}
}
+static void intel_early_display_was(struct drm_i915_private *dev_priv)
+{
+ /* Display WA #1185 WaDisableDARBFClkGating:cnl,glk */
+ if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
+ I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
+ DARBF_GATING_DIS);
+
+ if (IS_HASWELL(dev_priv)) {
+ /*
+ * WaRsPkgCStateDisplayPMReq:hsw
+ * System hang if this isn't done before disabling all planes!
+ */
+ I915_WRITE(CHICKEN_PAR1_1,
+ I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
+ }
+}
+
/* Scan out the current hw modeset state,
* and sanitizes it to the current state
*/
@@ -15094,15 +15111,7 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
struct intel_encoder *encoder;
int i;
- if (IS_HASWELL(dev_priv)) {
- /*
- * WaRsPkgCStateDisplayPMReq:hsw
- * System hang if this isn't done before disabling all planes!
- */
- I915_WRITE(CHICKEN_PAR1_1,
- I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
- }
-
+ intel_early_display_was(dev_priv);
intel_modeset_readout_hw_state(dev);
/* HW state is read out, now we need to sanitize this mess. */
--
2.13.6
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* ✗ Fi.CI.BAT: warning for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev4)
2017-11-08 23:30 [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk Rodrigo Vivi
` (9 preceding siblings ...)
2017-11-10 23:00 ` ✓ Fi.CI.IGT: " Patchwork
@ 2017-11-11 0:22 ` Patchwork
2017-11-13 23:01 ` ✗ Fi.CI.BAT: failure " Patchwork
` (2 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2017-11-11 0:22 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev4)
URL : https://patchwork.freedesktop.org/series/33463/
State : warning
== Summary ==
Series 33463v4 drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
https://patchwork.freedesktop.org/api/1.0/series/33463/revisions/4/mbox/
Test gem_exec_reloc:
Subgroup basic-gtt-read-active:
fail -> PASS (fi-gdg-551) fdo#102582
Test kms_force_connector_basic:
Subgroup prune-stale-modes:
pass -> SKIP (fi-snb-2600)
fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:442s
fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:455s
fi-blb-e6850 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:380s
fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:536s
fi-bwr-2160 total:289 pass:183 dwarn:0 dfail:0 fail:0 skip:106 time:277s
fi-bxt-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:499s
fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:510s
fi-byt-j1900 total:289 pass:254 dwarn:0 dfail:0 fail:0 skip:35 time:494s
fi-byt-n2820 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:485s
fi-elk-e7500 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:431s
fi-gdg-551 total:289 pass:178 dwarn:1 dfail:0 fail:1 skip:109 time:261s
fi-glk-1 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:539s
fi-hsw-4770 total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:432s
fi-hsw-4770r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:429s
fi-ilk-650 total:289 pass:228 dwarn:0 dfail:0 fail:0 skip:61 time:427s
fi-ivb-3520m total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:484s
fi-ivb-3770 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:463s
fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:482s
fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:522s
fi-kbl-7567u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:472s
fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:531s
fi-skl-6600u total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:543s
fi-skl-6700hq total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:565s
fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:520s
fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:506s
fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:457s
fi-snb-2520m total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:559s
fi-snb-2600 total:289 pass:248 dwarn:0 dfail:0 fail:0 skip:41 time:417s
Blacklisted hosts:
fi-cfl-s total:289 pass:254 dwarn:3 dfail:0 fail:0 skip:32 time:535s
fi-glk-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:486s
fi-skl-6260u failed to connect after reboot
1342299348dec3bd4890284390a2209a00beafce drm-tip: 2017y-11m-10d-18h-11m-22s UTC integration manifest
29f56c1e996d drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7077/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev4)
2017-11-08 23:30 [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk Rodrigo Vivi
` (10 preceding siblings ...)
2017-11-11 0:22 ` ✗ Fi.CI.BAT: warning for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev4) Patchwork
@ 2017-11-13 23:01 ` Patchwork
2017-11-14 0:38 ` ✓ Fi.CI.BAT: success " Patchwork
2017-11-14 1:31 ` ✓ Fi.CI.IGT: " Patchwork
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2017-11-13 23:01 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev4)
URL : https://patchwork.freedesktop.org/series/33463/
State : failure
== Summary ==
Series 33463v4 drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
https://patchwork.freedesktop.org/api/1.0/series/33463/revisions/4/mbox/
Test chamelium:
Subgroup dp-crc-fast:
fail -> PASS (fi-kbl-7500u) fdo#102514
Test vgem_basic:
Subgroup dmabuf-export:
pass -> INCOMPLETE (fi-byt-n2820) fdo#103714
pass -> INCOMPLETE (fi-bsw-n3050)
incomplete -> PASS (fi-glk-1) fdo#103706
Subgroup unload:
notrun -> INCOMPLETE (fi-glk-1) fdo#103702
fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514
fdo#103714 https://bugs.freedesktop.org/show_bug.cgi?id=103714
fdo#103706 https://bugs.freedesktop.org/show_bug.cgi?id=103706
fdo#103702 https://bugs.freedesktop.org/show_bug.cgi?id=103702
fi-bdw-5557u total:285 pass:263 dwarn:0 dfail:1 fail:0 skip:20
fi-bdw-gvtdvm total:285 pass:260 dwarn:0 dfail:1 fail:0 skip:23
fi-blb-e6850 total:285 pass:218 dwarn:1 dfail:1 fail:0 skip:64
fi-bsw-n3050 total:278 pass:231 dwarn:0 dfail:1 fail:0 skip:45
fi-bwr-2160 total:285 pass:178 dwarn:0 dfail:1 fail:0 skip:105
fi-bxt-dsi total:285 pass:254 dwarn:0 dfail:1 fail:0 skip:29
fi-bxt-j4205 total:278 pass:248 dwarn:0 dfail:1 fail:0 skip:28
fi-byt-j1900 total:285 pass:249 dwarn:0 dfail:1 fail:0 skip:34
fi-byt-n2820 total:278 pass:238 dwarn:0 dfail:1 fail:0 skip:38
fi-gdg-551 total:285 pass:174 dwarn:0 dfail:1 fail:1 skip:108
fi-glk-1 total:285 pass:256 dwarn:0 dfail:1 fail:0 skip:27
fi-hsw-4770 total:285 pass:257 dwarn:0 dfail:1 fail:0 skip:26
fi-hsw-4770r total:285 pass:257 dwarn:0 dfail:1 fail:0 skip:26
fi-ilk-650 total:285 pass:223 dwarn:0 dfail:1 fail:0 skip:60
fi-ivb-3520m total:285 pass:255 dwarn:0 dfail:1 fail:0 skip:28
fi-ivb-3770 total:285 pass:255 dwarn:0 dfail:1 fail:0 skip:28
fi-kbl-7500u total:285 pass:259 dwarn:1 dfail:1 fail:0 skip:23
fi-kbl-7560u total:285 pass:265 dwarn:0 dfail:1 fail:0 skip:18
fi-kbl-7567u total:285 pass:264 dwarn:0 dfail:1 fail:0 skip:19
fi-kbl-r total:285 pass:257 dwarn:0 dfail:1 fail:0 skip:26
fi-pnv-d510 total:285 pass:217 dwarn:1 dfail:1 fail:0 skip:65
fi-skl-6260u total:285 pass:264 dwarn:0 dfail:1 fail:0 skip:19
fi-skl-6600u total:285 pass:257 dwarn:0 dfail:1 fail:0 skip:26
fi-skl-6700hq total:285 pass:258 dwarn:0 dfail:1 fail:0 skip:25
fi-skl-6700k total:285 pass:260 dwarn:0 dfail:1 fail:0 skip:23
fi-skl-6770hq total:285 pass:264 dwarn:0 dfail:1 fail:0 skip:19
fi-skl-gvtdvm total:285 pass:261 dwarn:0 dfail:1 fail:0 skip:22
fi-snb-2520m total:285 pass:245 dwarn:0 dfail:1 fail:0 skip:38
fi-snb-2600 total:285 pass:244 dwarn:0 dfail:1 fail:0 skip:39
Blacklisted hosts:
fi-cfl-s total:285 pass:252 dwarn:0 dfail:1 fail:0 skip:31
0ae838346d57d7767dec9e25f9d534faaa59ea7f drm-tip: 2017y-11m-13d-20h-43m-56s UTC integration manifest
2e6b797be011 drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7103/
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev4)
2017-11-08 23:30 [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk Rodrigo Vivi
` (11 preceding siblings ...)
2017-11-13 23:01 ` ✗ Fi.CI.BAT: failure " Patchwork
@ 2017-11-14 0:38 ` Patchwork
2017-11-14 1:31 ` ✓ Fi.CI.IGT: " Patchwork
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2017-11-14 0:38 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev4)
URL : https://patchwork.freedesktop.org/series/33463/
State : success
== Summary ==
Series 33463v4 drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
https://patchwork.freedesktop.org/api/1.0/series/33463/revisions/4/mbox/
Test chamelium:
Subgroup dp-crc-fast:
fail -> PASS (fi-kbl-7500u) fdo#102514
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
pass -> FAIL (fi-gdg-551) fdo#102618
Test vgem_basic:
Subgroup dmabuf-export:
pass -> INCOMPLETE (fi-bxt-dsi) fdo#103706 +1
Subgroup unload:
notrun -> INCOMPLETE (fi-bxt-j4205) fdo#103702
fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618
fdo#103706 https://bugs.freedesktop.org/show_bug.cgi?id=103706
fdo#103702 https://bugs.freedesktop.org/show_bug.cgi?id=103702
fi-bdw-5557u total:285 pass:263 dwarn:0 dfail:1 fail:0 skip:20
fi-bdw-gvtdvm total:285 pass:260 dwarn:0 dfail:1 fail:0 skip:23
fi-blb-e6850 total:285 pass:218 dwarn:1 dfail:1 fail:0 skip:64
fi-bsw-n3050 total:285 pass:238 dwarn:0 dfail:1 fail:0 skip:45
fi-bwr-2160 total:285 pass:178 dwarn:0 dfail:1 fail:0 skip:105
fi-bxt-dsi total:278 pass:247 dwarn:0 dfail:1 fail:0 skip:29
fi-bxt-j4205 total:285 pass:255 dwarn:0 dfail:1 fail:0 skip:28
fi-byt-j1900 total:285 pass:249 dwarn:0 dfail:1 fail:0 skip:34
fi-elk-e7500 total:285 pass:224 dwarn:0 dfail:1 fail:0 skip:59
fi-gdg-551 total:285 pass:173 dwarn:0 dfail:1 fail:2 skip:108
fi-glk-1 total:278 pass:249 dwarn:0 dfail:1 fail:0 skip:27
fi-hsw-4770 total:285 pass:257 dwarn:0 dfail:1 fail:0 skip:26
fi-hsw-4770r total:285 pass:257 dwarn:0 dfail:1 fail:0 skip:26
fi-ilk-650 total:285 pass:223 dwarn:0 dfail:1 fail:0 skip:60
fi-ivb-3520m total:285 pass:255 dwarn:0 dfail:1 fail:0 skip:28
fi-ivb-3770 total:285 pass:255 dwarn:0 dfail:1 fail:0 skip:28
fi-kbl-7500u total:285 pass:259 dwarn:1 dfail:1 fail:0 skip:23
fi-kbl-7560u total:285 pass:265 dwarn:0 dfail:1 fail:0 skip:18
fi-kbl-7567u total:285 pass:264 dwarn:0 dfail:1 fail:0 skip:19
fi-kbl-r total:285 pass:257 dwarn:0 dfail:1 fail:0 skip:26
fi-pnv-d510 total:285 pass:217 dwarn:1 dfail:1 fail:0 skip:65
fi-skl-6260u total:285 pass:264 dwarn:0 dfail:1 fail:0 skip:19
fi-skl-6600u total:285 pass:257 dwarn:0 dfail:1 fail:0 skip:26
fi-skl-6700hq total:285 pass:258 dwarn:0 dfail:1 fail:0 skip:25
fi-skl-6700k total:285 pass:260 dwarn:0 dfail:1 fail:0 skip:23
fi-skl-6770hq total:285 pass:264 dwarn:0 dfail:1 fail:0 skip:19
fi-skl-gvtdvm total:285 pass:261 dwarn:0 dfail:1 fail:0 skip:22
fi-snb-2520m total:285 pass:245 dwarn:0 dfail:1 fail:0 skip:38
fi-snb-2600 total:285 pass:244 dwarn:0 dfail:1 fail:0 skip:39
Blacklisted hosts:
fi-cfl-s total:285 pass:252 dwarn:0 dfail:1 fail:0 skip:31
fi-cnl-y failed to connect after reboot
0ae838346d57d7767dec9e25f9d534faaa59ea7f drm-tip: 2017y-11m-13d-20h-43m-56s UTC integration manifest
d6c083efe1ae drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7106/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev4)
2017-11-08 23:30 [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk Rodrigo Vivi
` (12 preceding siblings ...)
2017-11-14 0:38 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2017-11-14 1:31 ` Patchwork
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2017-11-14 1:31 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev4)
URL : https://patchwork.freedesktop.org/series/33463/
State : success
== Summary ==
Test kms_flip:
Subgroup plain-flip-ts-check-interruptible:
fail -> PASS (shard-hsw) fdo#100368
Test kms_busy:
Subgroup extended-modeset-hang-oldfb-with-reset-render-a:
pass -> DMESG-WARN (shard-hsw) fdo#102249
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102249 https://bugs.freedesktop.org/show_bug.cgi?id=102249
shard-hsw total:2550 pass:1457 dwarn:3 dfail:1 fail:9 skip:1079 time:9168s
Blacklisted hosts:
shard-apl total:2584 pass:1623 dwarn:1 dfail:2 fail:22 skip:936 time:13227s
shard-kbl total:2492 pass:1643 dwarn:27 dfail:3 fail:24 skip:794 time:10264s
shard-snb total:2580 pass:1205 dwarn:2 dfail:2 fail:12 skip:1358 time:7469s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7106/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
end of thread, other threads:[~2017-11-14 1:31 UTC | newest]
Thread overview: 25+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-11-08 23:30 [PATCH] drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk Rodrigo Vivi
2017-11-08 23:48 ` ✗ Fi.CI.BAT: warning for " Patchwork
2017-11-09 0:31 ` ✗ Fi.CI.IGT: failure " Patchwork
2017-11-09 0:55 ` ✓ Fi.CI.BAT: success " Patchwork
2017-11-09 1:31 ` ✗ Fi.CI.BAT: warning " Patchwork
2017-11-09 13:20 ` [PATCH] " Imre Deak
2017-11-09 13:45 ` Ville Syrjälä
2017-11-09 17:58 ` Rodrigo Vivi
2017-11-09 18:05 ` Chris Wilson
2017-11-09 22:26 ` Rodrigo Vivi
2017-11-10 20:13 ` Ville Syrjälä
2017-11-10 20:24 ` Rodrigo Vivi
2017-11-10 20:44 ` Ville Syrjälä
2017-11-10 20:58 ` Rodrigo Vivi
2017-11-10 21:11 ` Ville Syrjälä
2017-11-10 21:17 ` Rodrigo Vivi
2017-11-11 0:03 ` Rodrigo Vivi
2017-11-09 22:43 ` ✓ Fi.CI.BAT: success for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev2) Patchwork
2017-11-09 23:25 ` ✗ Fi.CI.IGT: failure " Patchwork
2017-11-10 21:18 ` ✓ Fi.CI.BAT: success for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev3) Patchwork
2017-11-10 23:00 ` ✓ Fi.CI.IGT: " Patchwork
2017-11-11 0:22 ` ✗ Fi.CI.BAT: warning for drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev4) Patchwork
2017-11-13 23:01 ` ✗ Fi.CI.BAT: failure " Patchwork
2017-11-14 0:38 ` ✓ Fi.CI.BAT: success " Patchwork
2017-11-14 1:31 ` ✓ Fi.CI.IGT: " Patchwork
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