All of lore.kernel.org
 help / color / mirror / Atom feed
From: Cornelia Huck <cohuck@redhat.com>
To: Thomas Huth <thuth@redhat.com>
Cc: pasic@linux.vnet.ibm.com, zyimin@linux.vnet.ibm.com,
	Pierre Morel <pmorel@linux.vnet.ibm.com>,
	qemu-devel@nongnu.org, agraf@suse.de, borntraeger@de.ibm.com,
	Qemu-s390x list <qemu-s390x@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v3 1/7] s390x/pci: factor out endianess conversion
Date: Thu, 23 Nov 2017 11:33:26 +0100	[thread overview]
Message-ID: <20171123113326.3b2c5281.cohuck@redhat.com> (raw)
In-Reply-To: <58a08c1d-3935-42e7-cdc0-7bc45c08d2d3@redhat.com>

On Thu, 23 Nov 2017 11:25:10 +0100
Thomas Huth <thuth@redhat.com> wrote:

> On 23.11.2017 11:08, Cornelia Huck wrote:
> > On Thu, 23 Nov 2017 11:01:23 +0100
> > Thomas Huth <thuth@redhat.com> wrote:
> >   
> >> On 23.11.2017 10:49, Cornelia Huck wrote:  
> >>> On Thu, 23 Nov 2017 09:48:41 +0100
> >>> Thomas Huth <thuth@redhat.com> wrote:  
> >>>> On 22.11.2017 23:05, Pierre Morel wrote:    
> [...]
> >>>>> +/**
> >>>>> + * Swap data contained in s390x big endian registers to little endian
> >>>>> + * PCI bars.
> >>>>> + *
> >>>>> + * @ptr: a pointer to a uint64_t data field
> >>>>> + * @len: the length of the valid data, must be 1,2,4 or 8
> >>>>> + */
> >>>>> +static int zpci_endian_swap(uint64_t *ptr, uint8_t len)
> >>>>> +{
> >>>>> +    uint64_t data = *ptr;
> >>>>> +
> >>>>> +    switch (len) {
> >>>>> +    case 1:
> >>>>> +        break;
> >>>>> +    case 2:
> >>>>> +        data = bswap16(data);
> >>>>> +        break;
> >>>>> +    case 4:
> >>>>> +        data = bswap32(data);
> >>>>> +        break;
> >>>>> +    case 8:
> >>>>> +        data = bswap64(data);
> >>>>> +        break;
> >>>>> +    default:
> >>>>> +        return -EINVAL;
> >>>>> +    }
> >>>>> +    *ptr = data;
> >>>>> +    return 0;
> >>>>> +}      
> >>>>
> >>>> While you're at it, I think that should rather be leXX_to_cpu() instead
> >>>> of bswapXX() here,    
> >>>
> >>> I don't think that's correct, as this is supposed to swap BE registers
> >>> to LE PCI bars.    
> >>
> >> Yes, but for the CPU emulation, the registers are stored in the host's
> >> endianness in the CPUS390XState structure. Or why do we byte-swap them
> >> again with cpu_to_be64() during s390_store_status(), for example?  
> > 
> > Gah, endian conversion is eating my brain...
> > 
> > So, is the content we get BE or not? I thought in our last discussion
> > we came to the conclusion that it is.  
> 
> data is read from / written to env->regs[r1], so this is host endian, as
> far as I know. PCI is little endian, so using le32_to_cpu() /
> cpu_to_le32() should IMHO be the right way to go here.
> 
> By the way, if we want to use both, cpu_to_le and le_to_cpu, depending
> on whether we read from or write to PCI, we should maybe *not* put this
> code into a separate function?

Yes, if your assessment is correct, we need two functions (I think this
conversion is used in other places in later patches as well). Or are
there mechanisms for that already available?

> 
> > [I really need to continue working on wiring up zpci in tcg, but I keep
> > getting sidetracked.]  
> 
> Maybe best if you get it running on a big endian host first ... if it is
> then not working on a little endian host, you know that you have to look
> for things like these "bswapXX()" statements...

That was exactly my reasoning behind getting tcg to run... but getting
it to run at all is the hard part :)

  reply	other threads:[~2017-11-23 10:33 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-22 22:05 [Qemu-devel] [PATCH v3 0/7] s390x/pci: Improve zPCI to cover more cases Pierre Morel
2017-11-22 22:05 ` [Qemu-devel] [PATCH v3 1/7] s390x/pci: factor out endianess conversion Pierre Morel
2017-11-23  8:48   ` Thomas Huth
2017-11-23  9:49     ` Cornelia Huck
2017-11-23 10:01       ` Thomas Huth
2017-11-23 10:08         ` Cornelia Huck
2017-11-23 10:25           ` Thomas Huth
2017-11-23 10:33             ` Cornelia Huck [this message]
2017-11-23 11:35               ` [Qemu-devel] [qemu-s390x] " Thomas Huth
2017-11-28 17:28                 ` Michael S. Tsirkin
2017-11-23 12:07               ` [Qemu-devel] " Yi Min Zhao
2017-11-23 12:18                 ` [Qemu-devel] [qemu-s390x] " Thomas Huth
2017-11-24  6:19                   ` Yi Min Zhao
2017-11-25 13:49                     ` Pierre Morel
2017-11-27  6:31                       ` Yi Min Zhao
2017-11-27  6:59                       ` Thomas Huth
2017-11-27  8:22                         ` Pierre Morel
2017-11-27 10:09                         ` Yi Min Zhao
2017-11-27 11:13                           ` Thomas Huth
2017-11-28  6:41                             ` Yi Min Zhao
2017-11-27 11:02                         ` Cornelia Huck
2017-11-27 14:34                           ` Cornelia Huck
2017-11-27 15:24                             ` Pierre Morel
2017-11-27 15:30                               ` Cornelia Huck
2017-11-27 15:53                                 ` Pierre Morel
2017-11-27 16:02                                   ` Cornelia Huck
2017-11-27 16:40                                     ` Pierre Morel
2017-11-28  6:48                                     ` Yi Min Zhao
2017-11-22 22:05 ` [Qemu-devel] [PATCH v3 2/7] s390x/pci: rework PCI STORE Pierre Morel
2017-11-23  9:01   ` Thomas Huth
2017-11-25 10:39     ` Pierre Morel
2017-11-27  6:45       ` Thomas Huth
2017-11-23  9:54   ` Cornelia Huck
2017-11-25 10:37     ` Pierre Morel
2017-11-22 22:05 ` [Qemu-devel] [PATCH v3 3/7] s390x/pci: rework PCI LOAD Pierre Morel
2017-11-22 22:05 ` [Qemu-devel] [PATCH v3 4/7] s390x/pci: rework PCI STORE BLOCK Pierre Morel
2017-11-23  9:26   ` Thomas Huth
2017-11-27  8:17     ` Pierre Morel
2017-11-22 22:05 ` [Qemu-devel] [PATCH v3 5/7] s390x/pci: move the memory region read from pcilg Pierre Morel
2017-11-23  9:32   ` Thomas Huth
2017-11-25 10:40     ` Pierre Morel
2017-11-22 22:05 ` [Qemu-devel] [PATCH v3 6/7] s390x/pci: move the memory region write from pcistg Pierre Morel
2017-11-23  9:36   ` Thomas Huth
2017-11-25 10:40     ` Pierre Morel
2017-11-22 22:05 ` [Qemu-devel] [PATCH v3 7/7] s390x/pci: search for subregion inside the BARs Pierre Morel
2017-11-23  9:54   ` Thomas Huth
2017-11-27  8:10     ` Pierre Morel
2017-11-22 22:38 ` [Qemu-devel] [PATCH v3 0/7] s390x/pci: Improve zPCI to cover more cases no-reply
2017-11-23 10:06   ` Christian Borntraeger
2017-11-23 13:11     ` Fam Zheng

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20171123113326.3b2c5281.cohuck@redhat.com \
    --to=cohuck@redhat.com \
    --cc=agraf@suse.de \
    --cc=borntraeger@de.ibm.com \
    --cc=pasic@linux.vnet.ibm.com \
    --cc=pmorel@linux.vnet.ibm.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-s390x@nongnu.org \
    --cc=thuth@redhat.com \
    --cc=zyimin@linux.vnet.ibm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.