From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752771AbdKWMMB (ORCPT ); Thu, 23 Nov 2017 07:12:01 -0500 Received: from mail-wm0-f67.google.com ([74.125.82.67]:42418 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752370AbdKWMLi (ORCPT ); Thu, 23 Nov 2017 07:11:38 -0500 X-Google-Smtp-Source: AGs4zMYOSWi3XnKoaK+GFFkUErLOaCjd+TBO4AuVmwPmuQfkwzp5HcwBrFppIJ+/GSL43R6ZRQIP2Q== From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: julien.thierry@arm.com, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, marc.zyngier@arm.com Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v1 1/2] kvm: arm64: handle single-step during SError exceptions Date: Thu, 23 Nov 2017 12:11:33 +0000 Message-Id: <20171123121134.11050-2-alex.bennee@linaro.org> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20171123121134.11050-1-alex.bennee@linaro.org> References: <20171123121134.11050-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When an SError arrives during single-step it may be delivered before the step completes. In that case the DBG_SPSR_SS bit will have flipped as the instruction executed. After handling the abort in handle_exit() we test to see if the bit is clear and we were single-stepping before deciding if we need to exit to user space. Signed-off-by: Alex Bennée --- arch/arm64/kvm/handle_exit.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c index 3e645ec9e751..3ba8c4a3bcff 100644 --- a/arch/arm64/kvm/handle_exit.c +++ b/arch/arm64/kvm/handle_exit.c @@ -28,6 +28,7 @@ #include #include #include +#include #define CREATE_TRACE_POINTS #include "trace.h" @@ -250,7 +251,12 @@ int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, return 1; case ARM_EXCEPTION_EL1_SERROR: kvm_inject_vabt(vcpu); - return 1; + /* We may still need to return for single-step */ + if (!(*vcpu_cpsr(vcpu) & DBG_SPSR_SS) + && kvm_arm_handle_step_debug(vcpu, run)) + return 0; + else + return 1; case ARM_EXCEPTION_TRAP: return handle_trap_exceptions(vcpu, run); case ARM_EXCEPTION_HYP_GONE: -- 2.15.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PATCH v1 1/2] kvm: arm64: handle single-step during SError exceptions Date: Thu, 23 Nov 2017 12:11:33 +0000 Message-ID: <20171123121134.11050-2-alex.bennee@linaro.org> References: <20171123121134.11050-1-alex.bennee@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Cc: Catalin Marinas , open list , Will Deacon To: julien.thierry@arm.com, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, marc.zyngier@arm.com Return-path: In-Reply-To: <20171123121134.11050-1-alex.bennee@linaro.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu List-Id: kvm.vger.kernel.org V2hlbiBhbiBTRXJyb3IgYXJyaXZlcyBkdXJpbmcgc2luZ2xlLXN0ZXAgaXQgbWF5IGJlIGRlbGl2 ZXJlZCBiZWZvcmUKdGhlIHN0ZXAgY29tcGxldGVzLiBJbiB0aGF0IGNhc2UgdGhlIERCR19TUFNS X1NTIGJpdCB3aWxsIGhhdmUgZmxpcHBlZAphcyB0aGUgaW5zdHJ1Y3Rpb24gZXhlY3V0ZWQuIEFm dGVyIGhhbmRsaW5nIHRoZSBhYm9ydCBpbiBoYW5kbGVfZXhpdCgpCndlIHRlc3QgdG8gc2VlIGlm IHRoZSBiaXQgaXMgY2xlYXIgYW5kIHdlIHdlcmUgc2luZ2xlLXN0ZXBwaW5nIGJlZm9yZQpkZWNp ZGluZyBpZiB3ZSBuZWVkIHRvIGV4aXQgdG8gdXNlciBzcGFjZS4KClNpZ25lZC1vZmYtYnk6IEFs ZXggQmVubsOpZSA8YWxleC5iZW5uZWVAbGluYXJvLm9yZz4KLS0tCiBhcmNoL2FybTY0L2t2bS9o YW5kbGVfZXhpdC5jIHwgOCArKysrKysrLQogMSBmaWxlIGNoYW5nZWQsIDcgaW5zZXJ0aW9ucygr KSwgMSBkZWxldGlvbigtKQoKZGlmZiAtLWdpdCBhL2FyY2gvYXJtNjQva3ZtL2hhbmRsZV9leGl0 LmMgYi9hcmNoL2FybTY0L2t2bS9oYW5kbGVfZXhpdC5jCmluZGV4IDNlNjQ1ZWM5ZTc1MS4uM2Jh OGM0YTNiY2ZmIDEwMDY0NAotLS0gYS9hcmNoL2FybTY0L2t2bS9oYW5kbGVfZXhpdC5jCisrKyBi L2FyY2gvYXJtNjQva3ZtL2hhbmRsZV9leGl0LmMKQEAgLTI4LDYgKzI4LDcgQEAKICNpbmNsdWRl IDxhc20va3ZtX2VtdWxhdGUuaD4KICNpbmNsdWRlIDxhc20va3ZtX21tdS5oPgogI2luY2x1ZGUg PGFzbS9rdm1fcHNjaS5oPgorI2luY2x1ZGUgPGFzbS9kZWJ1Zy1tb25pdG9ycy5oPgogCiAjZGVm aW5lIENSRUFURV9UUkFDRV9QT0lOVFMKICNpbmNsdWRlICJ0cmFjZS5oIgpAQCAtMjUwLDcgKzI1 MSwxMiBAQCBpbnQgaGFuZGxlX2V4aXQoc3RydWN0IGt2bV92Y3B1ICp2Y3B1LCBzdHJ1Y3Qga3Zt X3J1biAqcnVuLAogCQlyZXR1cm4gMTsKIAljYXNlIEFSTV9FWENFUFRJT05fRUwxX1NFUlJPUjoK IAkJa3ZtX2luamVjdF92YWJ0KHZjcHUpOwotCQlyZXR1cm4gMTsKKwkJLyogV2UgbWF5IHN0aWxs IG5lZWQgdG8gcmV0dXJuIGZvciBzaW5nbGUtc3RlcCAqLworCQlpZiAoISgqdmNwdV9jcHNyKHZj cHUpICYgREJHX1NQU1JfU1MpCisJCQkmJiBrdm1fYXJtX2hhbmRsZV9zdGVwX2RlYnVnKHZjcHUs IHJ1bikpCisJCQlyZXR1cm4gMDsKKwkJZWxzZQorCQkJcmV0dXJuIDE7CiAJY2FzZSBBUk1fRVhD RVBUSU9OX1RSQVA6CiAJCXJldHVybiBoYW5kbGVfdHJhcF9leGNlcHRpb25zKHZjcHUsIHJ1bik7 CiAJY2FzZSBBUk1fRVhDRVBUSU9OX0hZUF9HT05FOgotLSAKMi4xNS4wCgpfX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwprdm1hcm0gbWFpbGluZyBsaXN0Cmt2 bWFybUBsaXN0cy5jcy5jb2x1bWJpYS5lZHUKaHR0cHM6Ly9saXN0cy5jcy5jb2x1bWJpYS5lZHUv bWFpbG1hbi9saXN0aW5mby9rdm1hcm0K From mboxrd@z Thu Jan 1 00:00:00 1970 From: alex.bennee@linaro.org (=?UTF-8?q?Alex=20Benn=C3=A9e?=) Date: Thu, 23 Nov 2017 12:11:33 +0000 Subject: [PATCH v1 1/2] kvm: arm64: handle single-step during SError exceptions In-Reply-To: <20171123121134.11050-1-alex.bennee@linaro.org> References: <20171123121134.11050-1-alex.bennee@linaro.org> Message-ID: <20171123121134.11050-2-alex.bennee@linaro.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org When an SError arrives during single-step it may be delivered before the step completes. In that case the DBG_SPSR_SS bit will have flipped as the instruction executed. After handling the abort in handle_exit() we test to see if the bit is clear and we were single-stepping before deciding if we need to exit to user space. Signed-off-by: Alex Benn?e --- arch/arm64/kvm/handle_exit.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c index 3e645ec9e751..3ba8c4a3bcff 100644 --- a/arch/arm64/kvm/handle_exit.c +++ b/arch/arm64/kvm/handle_exit.c @@ -28,6 +28,7 @@ #include #include #include +#include #define CREATE_TRACE_POINTS #include "trace.h" @@ -250,7 +251,12 @@ int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, return 1; case ARM_EXCEPTION_EL1_SERROR: kvm_inject_vabt(vcpu); - return 1; + /* We may still need to return for single-step */ + if (!(*vcpu_cpsr(vcpu) & DBG_SPSR_SS) + && kvm_arm_handle_step_debug(vcpu, run)) + return 0; + else + return 1; case ARM_EXCEPTION_TRAP: return handle_trap_exceptions(vcpu, run); case ARM_EXCEPTION_HYP_GONE: -- 2.15.0