* [PATCH] drm/i915/pmu: Aggregate all RC6 states into one counter
@ 2017-11-24 17:13 Tvrtko Ursulin
2017-11-24 18:07 ` ✗ Fi.CI.BAT: failure for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Tvrtko Ursulin @ 2017-11-24 17:13 UTC (permalink / raw)
To: Intel-gfx
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Chris has discovered that RC6, RC6p and RC6pp counters are mutually
exclusive, and even that on some SNB SKUs you get RC6p increasing, and on
the others RC6.
Furthermore RC6p and RC6pp were only present starting from GEN6 until,
GEN7, not including Haswell.
All this combined makes it questionable whether we need to reserve new ABI
for these counters. One idea was to just combine them all under the RC6
counter to simplify things for userspace. So that is what this patch does.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_pmu.c | 23 ++++++-----------------
include/uapi/drm/i915_drm.h | 6 +-----
2 files changed, 7 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 39310cf13c3a..3357b690ce90 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -359,11 +359,6 @@ static int i915_pmu_event_init(struct perf_event *event)
if (!HAS_RC6(i915))
ret = -ENODEV;
break;
- case I915_PMU_RC6p_RESIDENCY:
- case I915_PMU_RC6pp_RESIDENCY:
- if (!HAS_RC6p(i915))
- ret = -ENODEV;
- break;
default:
ret = -ENOENT;
break;
@@ -421,16 +416,12 @@ static u64 __i915_pmu_event_read(struct perf_event *event)
IS_VALLEYVIEW(i915) ?
VLV_GT_RENDER_RC6 :
GEN6_GT_GFX_RC6);
- intel_runtime_pm_put(i915);
- break;
- case I915_PMU_RC6p_RESIDENCY:
- intel_runtime_pm_get(i915);
- val = intel_rc6_residency_ns(i915, GEN6_GT_GFX_RC6p);
- intel_runtime_pm_put(i915);
- break;
- case I915_PMU_RC6pp_RESIDENCY:
- intel_runtime_pm_get(i915);
- val = intel_rc6_residency_ns(i915, GEN6_GT_GFX_RC6pp);
+ if (HAS_RC6p(i915)) {
+ val += intel_rc6_residency_ns(i915,
+ GEN6_GT_GFX_RC6p);
+ val += intel_rc6_residency_ns(i915,
+ GEN6_GT_GFX_RC6pp);
+ }
intel_runtime_pm_put(i915);
break;
}
@@ -708,8 +699,6 @@ static struct attribute *i915_pmu_events_attrs[] = {
I915_EVENT_ATTR(interrupts, I915_PMU_INTERRUPTS),
I915_EVENT(rc6-residency, I915_PMU_RC6_RESIDENCY, "ns"),
- I915_EVENT(rc6p-residency, I915_PMU_RC6p_RESIDENCY, "ns"),
- I915_EVENT(rc6pp-residency, I915_PMU_RC6pp_RESIDENCY, "ns"),
NULL,
};
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 239e8633edc9..536ee4febd74 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -137,14 +137,10 @@ enum drm_i915_pmu_engine_sample {
#define I915_PMU_ACTUAL_FREQUENCY __I915_PMU_OTHER(0)
#define I915_PMU_REQUESTED_FREQUENCY __I915_PMU_OTHER(1)
-
#define I915_PMU_INTERRUPTS __I915_PMU_OTHER(2)
-
#define I915_PMU_RC6_RESIDENCY __I915_PMU_OTHER(3)
-#define I915_PMU_RC6p_RESIDENCY __I915_PMU_OTHER(4)
-#define I915_PMU_RC6pp_RESIDENCY __I915_PMU_OTHER(5)
-#define I915_PMU_LAST I915_PMU_RC6pp_RESIDENCY
+#define I915_PMU_LAST I915_PMU_RC6_RESIDENCY
/* Each region is a minimum of 16k, and there are at most 255 of them.
*/
--
2.14.1
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915/pmu: Aggregate all RC6 states into one counter
2017-11-24 17:13 [PATCH] drm/i915/pmu: Aggregate all RC6 states into one counter Tvrtko Ursulin
@ 2017-11-24 18:07 ` Patchwork
2017-11-24 18:19 ` [PATCH] " Chris Wilson
2017-11-24 20:40 ` Chris Wilson
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2017-11-24 18:07 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/pmu: Aggregate all RC6 states into one counter
URL : https://patchwork.freedesktop.org/series/34370/
State : failure
== Summary ==
Series 34370v1 drm/i915/pmu: Aggregate all RC6 states into one counter
https://patchwork.freedesktop.org/api/1.0/series/34370/revisions/1/mbox/
Test gem_exec_reloc:
Subgroup basic-cpu-read-active:
fail -> PASS (fi-gdg-551) fdo#102582 +2
Test drv_module_reload:
Subgroup basic-reload-inject:
pass -> INCOMPLETE (fi-bwr-2160)
fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:441s
fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:448s
fi-blb-e6850 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:384s
fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:526s
fi-bwr-2160 total:288 pass:182 dwarn:0 dfail:0 fail:0 skip:105
fi-bxt-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:510s
fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:512s
fi-byt-j1900 total:289 pass:254 dwarn:0 dfail:0 fail:0 skip:35 time:487s
fi-byt-n2820 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:483s
fi-elk-e7500 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:431s
fi-gdg-551 total:289 pass:176 dwarn:1 dfail:0 fail:3 skip:109 time:265s
fi-glk-1 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:539s
fi-hsw-4770 total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:423s
fi-hsw-4770r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:432s
fi-ilk-650 total:289 pass:228 dwarn:0 dfail:0 fail:0 skip:61 time:431s
fi-ivb-3520m total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:473s
fi-ivb-3770 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:454s
fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:470s
fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:530s
fi-kbl-7567u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:469s
fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:534s
fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:449s
fi-skl-6600u total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:542s
fi-skl-6700hq total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:568s
fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:508s
fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:494s
fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:454s
fi-snb-2520m total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:553s
fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:0 skip:40 time:415s
Blacklisted hosts:
fi-cfl-s2 total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:594s
fi-cnl-y total:220 pass:199 dwarn:0 dfail:0 fail:0 skip:20
fi-glk-dsi total:289 pass:258 dwarn:0 dfail:0 fail:1 skip:30 time:491s
fi-pnv-d510 failed to collect. IGT log at Patchwork_7285/fi-pnv-d510/igt.log
c2ee9de5c13c27c716dd45b78b9f24826cdcd118 drm-tip: 2017y-11m-24d-17h-10m-43s UTC integration manifest
7a12baf3824a drm/i915/pmu: Aggregate all RC6 states into one counter
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7285/
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/pmu: Aggregate all RC6 states into one counter
2017-11-24 17:13 [PATCH] drm/i915/pmu: Aggregate all RC6 states into one counter Tvrtko Ursulin
2017-11-24 18:07 ` ✗ Fi.CI.BAT: failure for " Patchwork
@ 2017-11-24 18:19 ` Chris Wilson
2017-11-24 18:28 ` Chris Wilson
2017-11-24 20:40 ` Chris Wilson
2 siblings, 1 reply; 6+ messages in thread
From: Chris Wilson @ 2017-11-24 18:19 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx
Quoting Tvrtko Ursulin (2017-11-24 17:13:31)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Chris has discovered that RC6, RC6p and RC6pp counters are mutually
> exclusive, and even that on some SNB SKUs you get RC6p increasing, and on
> the others RC6.
>
> Furthermore RC6p and RC6pp were only present starting from GEN6 until,
> GEN7, not including Haswell.
>
> All this combined makes it questionable whether we need to reserve new ABI
> for these counters. One idea was to just combine them all under the RC6
> counter to simplify things for userspace. So that is what this patch does.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
(Wrong mail!)
First run failed: (perf_pmu:1928) CRITICAL: 'idle - prev' != 'slept'
(1884715520.000000 not within 5.000000% tolerance of 2000133450.000000)
-Chris
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/pmu: Aggregate all RC6 states into one counter
2017-11-24 18:19 ` [PATCH] " Chris Wilson
@ 2017-11-24 18:28 ` Chris Wilson
0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2017-11-24 18:28 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx
Quoting Chris Wilson (2017-11-24 18:19:03)
> Quoting Tvrtko Ursulin (2017-11-24 17:13:31)
> > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >
> > Chris has discovered that RC6, RC6p and RC6pp counters are mutually
> > exclusive, and even that on some SNB SKUs you get RC6p increasing, and on
> > the others RC6.
> >
> > Furthermore RC6p and RC6pp were only present starting from GEN6 until,
> > GEN7, not including Haswell.
> >
> > All this combined makes it questionable whether we need to reserve new ABI
> > for these counters. One idea was to just combine them all under the RC6
> > counter to simplify things for userspace. So that is what this patch does.
> >
> > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
>
> (Wrong mail!)
>
> First run failed: (perf_pmu:1928) CRITICAL: 'idle - prev' != 'slept'
> (1884715520.000000 not within 5.000000% tolerance of 2000133450.000000)
Subsequent runs, ok. Shrug.
-Chris
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/pmu: Aggregate all RC6 states into one counter
2017-11-24 17:13 [PATCH] drm/i915/pmu: Aggregate all RC6 states into one counter Tvrtko Ursulin
2017-11-24 18:07 ` ✗ Fi.CI.BAT: failure for " Patchwork
2017-11-24 18:19 ` [PATCH] " Chris Wilson
@ 2017-11-24 20:40 ` Chris Wilson
2017-11-24 21:35 ` Chris Wilson
2 siblings, 1 reply; 6+ messages in thread
From: Chris Wilson @ 2017-11-24 20:40 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx
Quoting Tvrtko Ursulin (2017-11-24 17:13:31)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Chris has discovered that RC6, RC6p and RC6pp counters are mutually
> exclusive, and even that on some SNB SKUs you get RC6p increasing, and on
> the others RC6.
>
> Furthermore RC6p and RC6pp were only present starting from GEN6 until,
> GEN7, not including Haswell.
>
> All this combined makes it questionable whether we need to reserve new ABI
> for these counters. One idea was to just combine them all under the RC6
> counter to simplify things for userspace. So that is what this patch does.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/pmu: Aggregate all RC6 states into one counter
2017-11-24 20:40 ` Chris Wilson
@ 2017-11-24 21:35 ` Chris Wilson
0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2017-11-24 21:35 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx
Quoting Chris Wilson (2017-11-24 20:40:31)
> Quoting Tvrtko Ursulin (2017-11-24 17:13:31)
> > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >
> > Chris has discovered that RC6, RC6p and RC6pp counters are mutually
> > exclusive, and even that on some SNB SKUs you get RC6p increasing, and on
> > the others RC6.
> >
> > Furthermore RC6p and RC6pp were only present starting from GEN6 until,
> > GEN7, not including Haswell.
> >
> > All this combined makes it questionable whether we need to reserve new ABI
> > for these counters. One idea was to just combine them all under the RC6
> > counter to simplify things for userspace. So that is what this patch does.
> >
> > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Oh merde. This patch was still in my tree when I picked up the guc tidy.
Sorry, I accidentally pushed it (without my even r-b).
Humble apologies, I better go pick up the igt catchup as well.
-Chris
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^ permalink raw reply [flat|nested] 6+ messages in thread
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2017-11-24 17:13 [PATCH] drm/i915/pmu: Aggregate all RC6 states into one counter Tvrtko Ursulin
2017-11-24 18:07 ` ✗ Fi.CI.BAT: failure for " Patchwork
2017-11-24 18:19 ` [PATCH] " Chris Wilson
2017-11-24 18:28 ` Chris Wilson
2017-11-24 20:40 ` Chris Wilson
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