From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752492AbdK0KzR (ORCPT ); Mon, 27 Nov 2017 05:55:17 -0500 Received: from mail-wr0-f194.google.com ([209.85.128.194]:37594 "EHLO mail-wr0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751790AbdK0Kvz (ORCPT ); Mon, 27 Nov 2017 05:51:55 -0500 X-Google-Smtp-Source: AGs4zMb1fNqCoX0OhaLtpW5I3U66aTYyGmlIRjbVneq9Ftc2EoQgdXAqjnHrMrGJUeEi6npig+7KwQ== From: Ingo Molnar To: linux-kernel@vger.kernel.org Cc: Dave Hansen , Andy Lutomirski , Thomas Gleixner , "H . Peter Anvin" , Peter Zijlstra , Borislav Petkov , Linus Torvalds Subject: [PATCH 13/24] x86/mm: Remove hard-coded ASID limit checks Date: Mon, 27 Nov 2017 11:49:12 +0100 Message-Id: <20171127104923.14378-14-mingo@kernel.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171127104923.14378-1-mingo@kernel.org> References: <20171127104923.14378-1-mingo@kernel.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Dave Hansen First, it's nice to remove the magic numbers. Second, KAISER is going to consume half of the available ASID space. The space is currently unused, but add a comment to spell out this new restriction. Signed-off-by: Dave Hansen Signed-off-by: Thomas Gleixner Cc: Andy Lutomirski Cc: Borislav Petkov Cc: Brian Gerst Cc: Denys Vlasenko Cc: H. Peter Anvin Cc: Josh Poimboeuf Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Rik van Riel Cc: daniel.gruss@iaik.tugraz.at Cc: hughd@google.com Cc: keescook@google.com Cc: linux-mm@kvack.org Cc: michael.schwarz@iaik.tugraz.at Cc: moritz.lipp@iaik.tugraz.at Cc: richard.fellner@student.tugraz.at Link: https://lkml.kernel.org/r/20171123003504.57EDB845@viggo.jf.intel.com Signed-off-by: Ingo Molnar --- arch/x86/include/asm/tlbflush.h | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h index cb65bddca360..d35776d9580b 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -75,6 +75,19 @@ static inline u64 inc_mm_tlb_gen(struct mm_struct *mm) return new_tlb_gen; } +/* There are 12 bits of space for ASIDS in CR3 */ +#define CR3_HW_ASID_BITS 12 +/* When enabled, KAISER consumes a single bit for user/kernel switches */ +#define KAISER_CONSUMED_ASID_BITS 0 + +#define CR3_AVAIL_ASID_BITS (CR3_HW_ASID_BITS - KAISER_CONSUMED_ASID_BITS) +/* + * ASIDs are zero-based: 0->MAX_AVAIL_ASID are valid. -1 below + * to account for them being zero-based. Another -1 is because ASID 0 + * is reserved for use by non-PCID-aware users. + */ +#define MAX_ASID_AVAILABLE ((1< 4094); + VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE); return __sme_pa(pgd) | (asid + 1); } else { VM_WARN_ON_ONCE(asid != 0); @@ -98,7 +111,7 @@ static inline unsigned long build_cr3(pgd_t *pgd, u16 asid) static inline unsigned long build_cr3_noflush(pgd_t *pgd, u16 asid) { - VM_WARN_ON_ONCE(asid > 4094); + VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE); return __sme_pa(pgd) | (asid + 1) | CR3_NOFLUSH; } -- 2.14.1