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Date: Thu, 30 Nov 2017 20:20:10 +0100
From: Peter Zijlstra <peterz@infradead.org>
To: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Ingo Molnar <mingo@kernel.org>, linux-kernel@vger.kernel.org,
        Andy Lutomirski <luto@amacapital.net>,
        Thomas Gleixner <tglx@linutronix.de>,
        "H . Peter Anvin" <hpa@zytor.com>, Borislav Petkov <bp@alien8.de>,
        Linus Torvalds <torvalds@linux-foundation.org>
Subject: Re: [PATCH 15/24] x86/mm: Allow flushing for future ASID switches
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On Thu, Nov 30, 2017 at 11:00:06AM -0800, Dave Hansen wrote:
> On 11/30/2017 10:55 AM, Peter Zijlstra wrote:
> >> __flush_tlb() does a flushing CR3 write that flushes the current PCID.
> >> If we need other PCIDs flushed, we have to do it via the
> >> tlb_flush_shared_nonglobals() mechanism.
> > But the thing is, you _cannot_ have PCID enabled in that branch.
> 
> Is there some hardware limitation that I'm missing?

No, but in setup_pcid() we explicit clear PCID if !PGE.

And as you said, there isn't actually any real hardware that has this
combination, so who cares.