From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752085AbdLFPHx (ORCPT ); Wed, 6 Dec 2017 10:07:53 -0500 Received: from userp2130.oracle.com ([156.151.31.86]:55509 "EHLO userp2130.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751453AbdLFPHv (ORCPT ); Wed, 6 Dec 2017 10:07:51 -0500 Date: Wed, 6 Dec 2017 10:06:48 -0500 From: Konrad Rzeszutek Wilk To: Jan Dakinevich Cc: linux-kernel@vger.kernel.org, "Denis V . Lunev" , Roman Kagan , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Thomas Gleixner , "H. Peter Anvin" , x86@kernel.org, Paolo Bonzini , Radim =?utf-8?B?S3LEjW3DocWZ?= , Andi Kleen , Kan Liang , Colin King , Stephane Eranian , Sebastian Andrzej Siewior , Greg Kroah-Hartman , Jin Yao , kvm@vger.kernel.org Subject: Re: [PATCH RFC 0/2] ignore LBR-related MSRs Message-ID: <20171206150648.GF28074@char.us.oracle.com> References: <1512560585-27263-1-git-send-email-jan.dakinevich@virtuozzo.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1512560585-27263-1-git-send-email-jan.dakinevich@virtuozzo.com> User-Agent: Mutt/1.8.3 (2017-05-23) X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8736 signatures=668641 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1712060222 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Dec 06, 2017 at 02:43:01PM +0300, Jan Dakinevich wrote: > w2k16 essentials fails to boot if underlying hypervisor lacks of support for > LBR MSRs. To workaround the issue, it suggessted to ignore these MSRs (but not > all). This is without any hyperv enablement? Meaning normal stock guest? > > The information, which MSRs are supported for specific platform is taken from > perf, it is the subject of the first patch. The second patch adds ignoring for > these MSRs to pmu_intel code of KVM. > > TODO: use MSR load/store areas to make full support of LBR debug. > > Jan Dakinevich (2): > perf/x86/intel: make reusable LBR initialization code > KVM: x86/vPMU: ignore access to LBR-related MSRs > > arch/x86/events/core.c | 8 +- > arch/x86/events/intel/core.c | 59 +++------ > arch/x86/events/intel/lbr.c | 272 +++++++++++++++++++++++++------------- > arch/x86/events/perf_event.h | 27 +--- > arch/x86/include/asm/kvm_host.h | 2 + > arch/x86/include/asm/perf_event.h | 11 ++ > arch/x86/kvm/pmu_intel.c | 33 +++++ > 7 files changed, 250 insertions(+), 162 deletions(-) > > -- > 2.1.4 > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Konrad Rzeszutek Wilk Subject: Re: [PATCH RFC 0/2] ignore LBR-related MSRs Date: Wed, 6 Dec 2017 10:06:48 -0500 Message-ID: <20171206150648.GF28074@char.us.oracle.com> References: <1512560585-27263-1-git-send-email-jan.dakinevich@virtuozzo.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: linux-kernel@vger.kernel.org, "Denis V . Lunev" , Roman Kagan , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Thomas Gleixner , "H. Peter Anvin" , x86@kernel.org, Paolo Bonzini , Radim =?utf-8?B?S3LEjW3DocWZ?= , Andi Kleen , Kan Liang , Colin King , Stephane Eranian , Sebastian Andrzej Siewior , Greg Kroah-Hartman Return-path: Received: from userp2130.oracle.com ([156.151.31.86]:55509 "EHLO userp2130.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751453AbdLFPHv (ORCPT ); Wed, 6 Dec 2017 10:07:51 -0500 Content-Disposition: inline In-Reply-To: <1512560585-27263-1-git-send-email-jan.dakinevich@virtuozzo.com> Sender: kvm-owner@vger.kernel.org List-ID: On Wed, Dec 06, 2017 at 02:43:01PM +0300, Jan Dakinevich wrote: > w2k16 essentials fails to boot if underlying hypervisor lacks of support for > LBR MSRs. To workaround the issue, it suggessted to ignore these MSRs (but not > all). This is without any hyperv enablement? Meaning normal stock guest? > > The information, which MSRs are supported for specific platform is taken from > perf, it is the subject of the first patch. The second patch adds ignoring for > these MSRs to pmu_intel code of KVM. > > TODO: use MSR load/store areas to make full support of LBR debug. > > Jan Dakinevich (2): > perf/x86/intel: make reusable LBR initialization code > KVM: x86/vPMU: ignore access to LBR-related MSRs > > arch/x86/events/core.c | 8 +- > arch/x86/events/intel/core.c | 59 +++------ > arch/x86/events/intel/lbr.c | 272 +++++++++++++++++++++++++------------- > arch/x86/events/perf_event.h | 27 +--- > arch/x86/include/asm/kvm_host.h | 2 + > arch/x86/include/asm/perf_event.h | 11 ++ > arch/x86/kvm/pmu_intel.c | 33 +++++ > 7 files changed, 250 insertions(+), 162 deletions(-) > > -- > 2.1.4 >