From: Keith Busch <keith.busch@intel.com>
To: Nikolay Borisov <n.borisov.lkml@gmail.com>
Cc: Scott Bauer <scott.bauer@intel.com>,
dm-devel@redhat.com, snitzer@redhat.com, agk@redhat.com,
linux-kernel@vger.kernel.org, jonathan.derrick@intel.com
Subject: Re: [PATCH v2 2/2] dm unstripe: Add documentation for unstripe target
Date: Tue, 12 Dec 2017 07:45:56 -0700 [thread overview]
Message-ID: <20171212144556.GF11218@localhost.localdomain> (raw)
In-Reply-To: <00fdc58c-d8e9-6b42-727d-ab70d5ce1b0a@gmail.com>
On Tue, Dec 12, 2017 at 01:35:13PM +0200, Nikolay Borisov wrote:
> On 11.12.2017 18:00, Scott Bauer wrote:
> > + As an example:
> > +
> > + Intel NVMe drives contain two cores on the physical device.
> > + Each core of the drive has segregated access to its LBA range.
> > + The current LBA model has a RAID 0 128k stripe across the two cores:
> > +
> > + Core 0: Core 1:
> > + __________ __________
> > + | LBA 511| | LBA 768|
> > + | LBA 0 | | LBA 256|
> > + ⎻⎻⎻⎻⎻⎻⎻⎻⎻⎻ ⎻⎻⎻⎻⎻⎻⎻⎻⎻⎻
>
> If it's 128k stripe shouldn't it be LBAs 0/256 on core0 and LBAs 128/511
> on core1?
Ah, this device's makers call the "stripe" size what should be called
"chunk". This device has a 128k chunk per core with two cores, so the
full stripe is 256k. The above should have core 0 owning LBA 512 rather
than 511 (assuming 512b LBA format).
next prev parent reply other threads:[~2017-12-12 14:42 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-11 16:00 [PATCH v2 0/2] dm-unstripe Scott Bauer
2017-12-11 16:00 ` [PATCH v2 1/2] dm-unstripe: unstripe of IO across RAID 0 Scott Bauer
2017-12-11 23:25 ` Keith Busch
2017-12-11 16:00 ` [PATCH v2 2/2] dm unstripe: Add documentation for unstripe target Scott Bauer
2017-12-11 23:21 ` Keith Busch
2017-12-12 11:35 ` Nikolay Borisov
2017-12-12 14:45 ` Keith Busch [this message]
2017-12-12 14:56 ` Alasdair G Kergon
2017-12-12 18:10 ` Mike Snitzer
2017-12-12 19:02 ` Scott Bauer
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