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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Alistair Francis <alistair.francis@xilinx.com>,
	"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
	Peter Maydell <peter.maydell@linaro.org>
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-devel@nongnu.org, "Prasad J Pandit" <pjp@fedoraproject.org>,
	"Peter Crosthwaite" <crosthwaite.peter@gmail.com>,
	"Sai Pavan Boddu" <saipava@xilinx.com>
Subject: [Qemu-devel] [RFC PATCH 7/8] sdhci: add a check_capab_sdma() qtest
Date: Wed, 13 Dec 2017 23:00:24 -0300	[thread overview]
Message-ID: <20171214020025.4004-8-f4bug@amsat.org> (raw)
In-Reply-To: <20171214020025.4004-1-f4bug@amsat.org>

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
RFC because I still need to verify with DS.

 tests/sdhci-test.c | 22 ++++++++++++++++++----
 1 file changed, 18 insertions(+), 4 deletions(-)

diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c
index 966bd00499..b7646bccc6 100644
--- a/tests/sdhci-test.c
+++ b/tests/sdhci-test.c
@@ -12,6 +12,7 @@
 
 #define SDHC_CAPAB                      0x40
 FIELD(SDHC_CAPAB, BASECLKFREQ,               8, 8); /* since v2 */
+FIELD(SDHC_CAPAB, SDMA,                     22, 1);
 #define SDHC_HCVER                      0xFE
 
 static const struct sdhci_t {
@@ -21,16 +22,19 @@ static const struct sdhci_t {
         uintptr_t addr;
         uint8_t version;
         uint8_t baseclock;
+        struct {
+            bool sdma;
+        } capab;
     } sdhci;
 } models[] = {
     { "arm",    "smdkc210",
-        {0x12510000, 2, 0} },
+        {0x12510000, 2, 0, {1} } },
     { "arm",    "sabrelite",
-        {0x02190000, 3, 0} },
+        {0x02190000, 3, 0, {1} } },
     { "arm",    "raspi2",           /* bcm2835 */
-        {0x3f300000, 3, 52} },
+        {0x3f300000, 3, 52, {0} } },
     { "arm",    "xilinx-zynq-a9",   /* exynos4210 */
-        {0xe0100000, 3, 0} },
+        {0xe0100000, 3, 0, {1} } },
 };
 
 static uint32_t sdhci_readl(uintptr_t base, uint32_t reg_addr)
@@ -90,6 +94,15 @@ static void check_capab_baseclock(uintptr_t addr, uint8_t expected_freq)
     g_assert_cmpuint(capab_freq, ==, expected_freq);
 }
 
+static void check_capab_sdma(uintptr_t addr, bool supported)
+{
+    uint64_t capab, capab_sdma;
+
+    capab = sdhci_readq(addr, SDHC_CAPAB);
+    capab_sdma = FIELD_EX64(capab, SDHC_CAPAB, SDMA);
+    g_assert_cmpuint(capab_sdma, ==, supported);
+}
+
 static void test_machine(const void *data)
 {
     const struct sdhci_t *test = data;
@@ -98,6 +111,7 @@ static void test_machine(const void *data)
 
     check_specs_version(test->sdhci.addr, test->sdhci.version);
     check_capab_readonly(test->sdhci.addr);
+    check_capab_sdma(test->sdhci.addr, test->sdhci.capab.sdma);
     check_capab_baseclock(test->sdhci.addr, test->sdhci.baseclock);
 
     qtest_quit(global_qtest);
-- 
2.15.1

  parent reply	other threads:[~2017-12-14  2:01 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-14  2:00 [Qemu-devel] [PATCH 0/8] SDHCI: add a qtest and fix few issues Philippe Mathieu-Daudé
2017-12-14  2:00 ` [Qemu-devel] [PATCH 1/8] sdhci: add a "sd-spec-version" property Philippe Mathieu-Daudé
2017-12-15 23:55   ` Alistair Francis
2017-12-14  2:00 ` [Qemu-devel] [PATCH 2/8] sdhci: some ARM boards do support SD_HOST_SPECv3_VERS Philippe Mathieu-Daudé
2017-12-16  0:00   ` Alistair Francis
2017-12-14  2:00 ` [Qemu-devel] [PATCH 3/8] sdhci: add qtest to check the SD Spec version Philippe Mathieu-Daudé
2017-12-14  2:00 ` [Qemu-devel] [PATCH 4/8] sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only Philippe Mathieu-Daudé
2017-12-16  0:11   ` Alistair Francis
2017-12-14  2:00 ` [Qemu-devel] [PATCH 5/8] sdhci: add check_capab_readonly() qtest Philippe Mathieu-Daudé
2017-12-14  2:00 ` [Qemu-devel] [PATCH 6/8] sdhci: add a check_capab_baseclock() qtest Philippe Mathieu-Daudé
2017-12-14  2:00 ` Philippe Mathieu-Daudé [this message]
2017-12-14  2:00 ` [Qemu-devel] [PATCH 8/8] sdhci: add a check_capab_v3() qtest Philippe Mathieu-Daudé

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