From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46957) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eROMR-00026S-2B for qemu-devel@nongnu.org; Tue, 19 Dec 2017 15:19:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eROMQ-0008Q0-4i for qemu-devel@nongnu.org; Tue, 19 Dec 2017 15:19:35 -0500 Received: from heinz.dinsnail.net ([2a01:238:43b4:3200:9392:5dcc:2f0e:a960]:47094) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eROMP-0008PB-RE for qemu-devel@nongnu.org; Tue, 19 Dec 2017 15:19:34 -0500 From: Michael Weiser Date: Tue, 19 Dec 2017 21:16:09 +0100 Message-Id: <20171219201613.7399-2-michael.weiser@gmx.de> In-Reply-To: <20171219201613.7399-1-michael.weiser@gmx.de> References: <20171219201613.7399-1-michael.weiser@gmx.de> Subject: [Qemu-devel] [PATCH v2 1/5] linux-user: Add support for big-endian aarch64 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Michael Weiser , Riku Voipio , Laurent Vivier Enable big-endian mode for data accesses on aarch64 for big-endian linux user mode. Activate it for all execution levels as documented by ARM: Set the SCTLR EE bit for ELs 1 through 3. Additionally set bit E0E in EL1 to enable it in EL0 as well. Signed-off-by: Michael Weiser --- linux-user/main.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/linux-user/main.c b/linux-user/main.c index 2fd2a143ed..7ea863260d 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -4611,6 +4611,12 @@ int main(int argc, char **argv, char **envp) } env->pc = regs->pc; env->xregs[31] = regs->sp; +#ifdef TARGET_WORDS_BIGENDIAN + env->cp15.sctlr_el[1] |= SCTLR_E0E; + for (i = 1; i < 4; ++i) { + env->cp15.sctlr_el[i] |= SCTLR_EE; + } +#endif } #elif defined(TARGET_ARM) { -- 2.15.1