From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752604AbdLSUQW (ORCPT ); Tue, 19 Dec 2017 15:16:22 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:33860 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751072AbdLSUQU (ORCPT ); Tue, 19 Dec 2017 15:16:20 -0500 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6E6E06038E Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org Date: Tue, 19 Dec 2017 12:16:18 -0800 From: Stephen Boyd To: Lorenzo Pieralisi Cc: Jingoo Han , Joao Pinto , linux-kernel@vger.kernel.org, Bjorn Helgaas , linux-pci@vger.kernel.org Subject: Re: [PATCH] PCI: dwc: Use {upper,lower}_32_bits() macros for clarity Message-ID: <20171219201618.GA31009@codeaurora.org> References: <20171129005334.16425-1-sboyd@codeaurora.org> <20171211101947.GA3225@red-moon> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20171211101947.GA3225@red-moon> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/11, Lorenzo Pieralisi wrote: > On Tue, Nov 28, 2017 at 04:53:34PM -0800, Stephen Boyd wrote: > > We have macros for getting the upper or lower 32 bits of a > > number. Use them here to shave a couple lines off the code. > > > > Signed-off-by: Stephen Boyd > > --- > > drivers/pci/dwc/pcie-designware-host.c | 6 ++---- > > 1 file changed, 2 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c > > index 157621175147..ae5abfddf8de 100644 > > --- a/drivers/pci/dwc/pcie-designware-host.c > > +++ b/drivers/pci/dwc/pcie-designware-host.c > > @@ -89,10 +89,8 @@ void dw_pcie_msi_init(struct pcie_port *pp) > > msi_target = virt_to_phys((void *)pp->msi_data); > > > > /* program the msi_data */ > > - dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4, > > - (u32)(msi_target & 0xffffffff)); > > - dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4, > > - (u32)(msi_target >> 32 & 0xffffffff)); > > + dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4, lower_32_bits(msi_target)); > > + dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4, upper_32_bits(msi_target)); > > } > > Hi Stephen, > > I was about to apply it but I think that for consistency it would be > better to convert to {lower,upper}_32_bits() also code in > dw_msi_setup_msg() and slightly reword the log accordingly; if you do > not mind sending a v2 with those changes I will apply then. > Ok. v2 coming shortly. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project