From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Tue, 2 Jan 2018 20:01:05 +0100 Subject: [U-Boot] [PATCH v6 05/11] mips: bmips: add bcm63xx-spi driver support for BCM6338 In-Reply-To: <20180102190111.2192-1-noltari@gmail.com> References: <20170730121347.30494-1-noltari@gmail.com> <20180102190111.2192-1-noltari@gmail.com> Message-ID: <20180102190111.2192-6-noltari@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: u-boot@lists.denx.de This driver manages the SPI controller present on this SoC. Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Daniel Schwierzeck --- v6: no changes v5: no changes v4: no changes v3: rename BCM6338 SPI driver to BCM6348 v2: add spi alias arch/mips/dts/brcm,bcm6338.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/mips/dts/brcm,bcm6338.dtsi b/arch/mips/dts/brcm,bcm6338.dtsi index eb51a4372b..0cab44cb8d 100644 --- a/arch/mips/dts/brcm,bcm6338.dtsi +++ b/arch/mips/dts/brcm,bcm6338.dtsi @@ -12,6 +12,10 @@ / { compatible = "brcm,bcm6338"; + aliases { + spi0 = &spi; + }; + cpus { reg = <0xfffe0000 0x4>; #address-cells = <1>; @@ -109,6 +113,19 @@ status = "disabled"; }; + spi: spi at fffe0c00 { + compatible = "brcm,bcm6348-spi"; + reg = <0xfffe0c00 0xc0>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&periph_clk BCM6338_CLK_SPI>; + resets = <&periph_rst BCM6338_RST_SPI>; + spi-max-frequency = <20000000>; + num-cs = <4>; + + status = "disabled"; + }; + memory-controller at fffe3100 { compatible = "brcm,bcm6338-mc"; reg = <0xfffe3100 0x38>; -- 2.11.0