From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753161AbeAJVF0 (ORCPT + 1 other); Wed, 10 Jan 2018 16:05:26 -0500 Received: from mail.kmu-office.ch ([178.209.48.109]:47987 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752916AbeAJVFA (ORCPT ); Wed, 10 Jan 2018 16:05:00 -0500 From: Stefan Agner To: shawnguo@kernel.org, kernel@pengutronix.de Cc: fabio.estevam@nxp.com, robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Stefan Agner Subject: [PATCH v2 7/7] ARM: dts: imx6ull: add UART8 support Date: Wed, 10 Jan 2018 22:04:53 +0100 Message-Id: <20180110210453.19264-7-stefan@agner.ch> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180110210453.19264-1-stefan@agner.ch> References: <20180110210453.19264-1-stefan@agner.ch> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: In i.MX 6ULL UART8 is part of the AIPS-3 memory map instead of AIPS-1. Clocks and interrupts remain the same. Signed-off-by: Stefan Agner Reviewed-by: Rob Herring Acked-by: Dong Aisheng --- arch/arm/boot/dts/imx6ull.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index bc2cd4fb8b12..571ddd71cdba 100644 --- a/arch/arm/boot/dts/imx6ull.dtsi +++ b/arch/arm/boot/dts/imx6ull.dtsi @@ -43,6 +43,9 @@ #include "imx6ull-pinfunc.h" #include "imx6ull-pinfunc-snvs.h" +/* Delete UART8 in AIPS-1 (i.MX6UL specific) */ +/delete-node/ &uart8; + / { soc { aips3: aips-bus@2200000 { @@ -56,6 +59,17 @@ compatible = "fsl,imx6ull-iomuxc-snvs"; reg = <0x02290000 0x4000>; }; + + uart8: serial@2288000 { + compatible = "fsl,imx6ul-uart", + "fsl,imx6q-uart"; + reg = <0x02288000 0x4000>; + interrupts = ; + clocks = <&clks IMX6UL_CLK_UART8_IPG>, + <&clks IMX6UL_CLK_UART8_SERIAL>; + clock-names = "ipg", "per"; + status = "disabled"; + }; }; }; }; -- 2.15.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Agner Subject: [PATCH v2 7/7] ARM: dts: imx6ull: add UART8 support Date: Wed, 10 Jan 2018 22:04:53 +0100 Message-ID: <20180110210453.19264-7-stefan@agner.ch> References: <20180110210453.19264-1-stefan@agner.ch> Return-path: In-Reply-To: <20180110210453.19264-1-stefan-XLVq0VzYD2Y@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org Cc: fabio.estevam-3arQi8VN3Tc@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Stefan Agner List-Id: devicetree@vger.kernel.org In i.MX 6ULL UART8 is part of the AIPS-3 memory map instead of AIPS-1. Clocks and interrupts remain the same. Signed-off-by: Stefan Agner Reviewed-by: Rob Herring Acked-by: Dong Aisheng --- arch/arm/boot/dts/imx6ull.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index bc2cd4fb8b12..571ddd71cdba 100644 --- a/arch/arm/boot/dts/imx6ull.dtsi +++ b/arch/arm/boot/dts/imx6ull.dtsi @@ -43,6 +43,9 @@ #include "imx6ull-pinfunc.h" #include "imx6ull-pinfunc-snvs.h" +/* Delete UART8 in AIPS-1 (i.MX6UL specific) */ +/delete-node/ &uart8; + / { soc { aips3: aips-bus@2200000 { @@ -56,6 +59,17 @@ compatible = "fsl,imx6ull-iomuxc-snvs"; reg = <0x02290000 0x4000>; }; + + uart8: serial@2288000 { + compatible = "fsl,imx6ul-uart", + "fsl,imx6q-uart"; + reg = <0x02288000 0x4000>; + interrupts = ; + clocks = <&clks IMX6UL_CLK_UART8_IPG>, + <&clks IMX6UL_CLK_UART8_SERIAL>; + clock-names = "ipg", "per"; + status = "disabled"; + }; }; }; }; -- 2.15.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: stefan@agner.ch (Stefan Agner) Date: Wed, 10 Jan 2018 22:04:53 +0100 Subject: [PATCH v2 7/7] ARM: dts: imx6ull: add UART8 support In-Reply-To: <20180110210453.19264-1-stefan@agner.ch> References: <20180110210453.19264-1-stefan@agner.ch> Message-ID: <20180110210453.19264-7-stefan@agner.ch> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org In i.MX 6ULL UART8 is part of the AIPS-3 memory map instead of AIPS-1. Clocks and interrupts remain the same. Signed-off-by: Stefan Agner Reviewed-by: Rob Herring Acked-by: Dong Aisheng --- arch/arm/boot/dts/imx6ull.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index bc2cd4fb8b12..571ddd71cdba 100644 --- a/arch/arm/boot/dts/imx6ull.dtsi +++ b/arch/arm/boot/dts/imx6ull.dtsi @@ -43,6 +43,9 @@ #include "imx6ull-pinfunc.h" #include "imx6ull-pinfunc-snvs.h" +/* Delete UART8 in AIPS-1 (i.MX6UL specific) */ +/delete-node/ &uart8; + / { soc { aips3: aips-bus at 2200000 { @@ -56,6 +59,17 @@ compatible = "fsl,imx6ull-iomuxc-snvs"; reg = <0x02290000 0x4000>; }; + + uart8: serial at 2288000 { + compatible = "fsl,imx6ul-uart", + "fsl,imx6q-uart"; + reg = <0x02288000 0x4000>; + interrupts = ; + clocks = <&clks IMX6UL_CLK_UART8_IPG>, + <&clks IMX6UL_CLK_UART8_SERIAL>; + clock-names = "ipg", "per"; + status = "disabled"; + }; }; }; }; -- 2.15.1