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From: Boris Brezillon <boris.brezillon@free-electrons.com>
To: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Miquel RAYNAL <miquel.raynal@free-electrons.com>,
	Ezequiel Garcia <ezequiel.garcia@free-electrons.com>,
	linux-mtd@lists.infradead.org
Subject: Re: [PATCH v3 0/7] Marvell NAND controller rework with ->exec_op()
Date: Sat, 13 Jan 2018 09:38:07 +0100	[thread overview]
Message-ID: <20180113093807.3984c184@bbrezillon> (raw)
In-Reply-To: <87wp0majtg.fsf@belgarion.home>

Hello Robert,

On Fri, 12 Jan 2018 21:44:27 +0100
Robert Jarzmik <robert.jarzmik@free.fr> wrote:

> Boris Brezillon <boris.brezillon@free-electrons.com> writes:
> 
> > On Fri, 12 Jan 2018 10:34:13 +0100
> > Robert Jarzmik <robert.jarzmik@free.fr> wrote:
> >  
> >> Boris Brezillon <boris.brezillon@free-electrons.com> writes:  
> > Because we though scanning of BBMs was working with the old pxa driver
> > (which should be the case for your setup, BTW), and we thought the new
> > driver was introducing a regression here.  
> That's what happens :
>  - flash_bbt=1 with old driver => everything works fine
>  - flash_bbt=1 with marvell_nand => BBT is damaged (or so I believe from
>    Miquel's analysis)

It shouldn't be damaged anymore. The bug has been fixed just before we
asked you to scrub the BBT area.

> 
> > BTW, did you ever try with the old driver and ->flash_bbt = false? If
> > you did not, can you test?  
> Sure, just did, same behavior as with marvell_nand :
>  - bad erase blocks (almost) everywhere
>  - ubifs error

That's a relief!

> 
> >> I think we're still not aligned here. There are _no_ bad block markers in the
> >> OOB on my flash, because there is a BBT at the end.  
> >
> > That's not how it works. The BBT is a way to get information about bad
> > blocks within a single read access, but, if you can preserve BBMs and
> > keep them updated (which is the case here), you should do it, just in
> > case you lose the BBT.  
> You're probably right today. But this assertion is probably wrong for system
> created in early 2000s ... :)

I can't say, but I recommend patching the component that screw up BBMs
in your setup anyway. It's probably not the kernel since Miquel tested
the transition from the old to the new driver without activating the
on-flash-bbt on his pxa boards, and all BBMs were preserved.

So, it's either barebox or another component you use to program things.

> 
> >> > So, the symptoms we're seeing here, where almost all blocks are reported as
> >> > bad when scanning BBMs, is not expected, and that's what we're trying to
> >> > debug/fix.    
> >> Well, I still think this is not something to fix ... I still think that OOB data
> >> is not relevant as to the state of bad blocks in my flash ...  
> >
> > Hm, I disagree. What if, for any reason, the BBT is lost? Don't you
> > want the full scan to work?  
> If the BBT is lost, you have the mirror BBT, it's its purpose.

If both are lost, you're screwed.

> 
> > Okay, so I have another solution for that: drop the NAND_BBT_CREATE and
> > NAND_BBT_WRITE here [1] and here [2]. That should let you read the
> > existing BBT without updating it or creating a new one if it's not
> > detected.  
> Okay, let's try the marvell-nand-bug branch with this included.
> It works :
> [   18.302123] ubi0: attached mtd5 (name "root", size 37 MiB)
> [   18.307691] ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes
> [   18.315003] ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048
> [   18.322155] ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096
> [   18.329167] ubi0: good PEBs: 297, bad PEBs: 0, corrupted PEBs: 0
> [   18.335789] ubi0: user volume: 1, internal volumes: 1, max. volumes count: 128
> [   18.343409] ubi0: max/mean erase counter: 6/4, WL threshold: 4096, image sequence number: 30621
> [   18.352460] ubi0: available PEBs: 0, total reserved PEBs: 297, PEBs reserved for bad PEB handling: 40
> [   18.361937] ubi0: background thread "ubi_bgt0d" started, PID 411
> 
> That means the BBT reading is the issue don't you think ?

The BBT detection issue has already been fixed with Miquel's previous
version. So there shouldn't be any issue with that anymore, and your
results tend to confirm that.

> 
> Now if I keep NAND_BBT_CREATE but remove NAND_BBT_WRITE same thing, it works as
> well. That leaves only the re-enabling of the BBT write, which I'll do as soon
> as you tell me my NAND won't be damaged.

It won't, you can safely re-enable NAND_BBT_WRITE. The one that was
causing trouble previously was NAND_BBT_CREATE, because the BBT was not
found, and the NAND framework was creating a new one after scanning
BBMs, which led to the situation you reported: BBT reporting all blocks
as bad.

Thanks for helping us with this bug, I think we're close to a fully
working situation now.

Regards,

Boris

  reply	other threads:[~2018-01-13  8:38 UTC|newest]

Thread overview: 73+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-09 10:36 [PATCH v3 0/7] Marvell NAND controller rework with ->exec_op() Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
2018-01-11 22:28 ` Willy Tarreau
2018-01-11 22:28   ` Willy Tarreau
2018-01-11 22:28   ` Willy Tarreau
     [not found]   ` <20180111222833.GA15584-K+wRfnb2/UA@public.gmane.org>
2018-01-12 18:21     ` Miquel Raynal
2018-01-12 18:21       ` Miquel Raynal
2018-01-12 18:21       ` Miquel Raynal
     [not found] ` <20180109103637.23798-1-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2018-01-09 10:36   ` [PATCH v3 1/7] dt-bindings: mtd: document new nand-rb property Miquel Raynal
2018-01-09 10:36     ` Miquel Raynal
2018-01-09 10:36     ` Miquel Raynal
     [not found]     ` <20180109103637.23798-2-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2018-01-11 22:23       ` Rob Herring
2018-01-11 22:23         ` Rob Herring
2018-01-11 22:23         ` Rob Herring
2018-01-09 10:36   ` [PATCH v3 2/7] dt-bindings: mtd: add Marvell NAND controller documentation Miquel Raynal
2018-01-09 10:36     ` Miquel Raynal
2018-01-09 10:36     ` Miquel Raynal
     [not found]     ` <20180109103637.23798-3-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2018-01-11 22:25       ` Rob Herring
2018-01-11 22:25         ` Rob Herring
2018-01-11 22:25         ` Rob Herring
2018-01-09 10:36   ` [PATCH v3 3/7] mtd: nand: add reworked Marvell NAND controller driver Miquel Raynal
2018-01-09 10:36     ` Miquel Raynal
2018-01-09 10:36     ` Miquel Raynal
2018-01-09 10:36   ` [PATCH v3 4/7] mtd: nand: use reworked NAND controller driver with Marvell EBU SoCs Miquel Raynal
2018-01-09 10:36     ` Miquel Raynal
2018-01-09 10:36     ` Miquel Raynal
2018-01-11 10:16     ` Gregory CLEMENT
2018-01-09 10:36   ` [PATCH v3 5/7] mtd: nand: use Marvell reworked NAND controller driver with all platforms Miquel Raynal
2018-01-09 10:36     ` Miquel Raynal
2018-01-09 10:36     ` Miquel Raynal
     [not found]     ` <20180109103637.23798-6-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2018-02-12 10:20       ` Boris Brezillon
2018-02-12 10:20         ` Boris Brezillon
2018-02-12 10:20         ` Boris Brezillon
2018-01-09 10:36   ` [PATCH v3 6/7] dt-bindings: mtd: remove pxa3xx NAND controller documentation Miquel Raynal
2018-01-09 10:36     ` Miquel Raynal
2018-01-09 10:36     ` Miquel Raynal
2018-01-09 10:36   ` [PATCH v3 7/7] mtd: nand: remove useless fields from pxa3xx NAND platform data Miquel Raynal
2018-01-09 10:36     ` Miquel Raynal
2018-01-09 10:36     ` Miquel Raynal
2018-02-12 10:17     ` Miquel Raynal
2018-02-17  9:43       ` Robert Jarzmik
2018-01-11 11:27   ` [PATCH v3 0/7] Marvell NAND controller rework with ->exec_op() Boris Brezillon
2018-01-11 11:27     ` Boris Brezillon
2018-01-11 11:27     ` Boris Brezillon
2018-01-11 17:42     ` Robert Jarzmik
2018-01-11 17:42       ` Robert Jarzmik
2018-01-11 17:42       ` Robert Jarzmik
     [not found]       ` <87efmwb8bj.fsf-4ty26DBLk+jEm7gnYqmdkQ@public.gmane.org>
2018-01-11 22:24         ` Miquel RAYNAL
2018-01-11 22:24           ` Miquel RAYNAL
2018-01-11 22:24           ` Miquel RAYNAL
2018-01-12  8:09           ` Robert Jarzmik
2018-01-12  8:09             ` Robert Jarzmik
2018-01-12  8:09             ` Robert Jarzmik
2018-01-12  8:45             ` Boris Brezillon
2018-01-12  9:01               ` Miquel Raynal
2018-01-12  9:34               ` Robert Jarzmik
2018-01-12  9:52                 ` Boris Brezillon
2018-01-12 20:44                   ` Robert Jarzmik
2018-01-13  8:38                     ` Boris Brezillon [this message]
2018-01-13 11:05                       ` Miquel Raynal
2018-01-14 10:35                         ` Robert Jarzmik
2018-01-22  8:51                           ` Boris Brezillon
2018-01-27 10:33                             ` Robert Jarzmik
2018-01-29 10:36                               ` Boris Brezillon
2018-01-12 10:21                 ` Boris Brezillon
2018-01-12 16:43                   ` Robert Jarzmik
2018-01-13  8:38                     ` Boris Brezillon
2018-01-14 10:20                       ` Robert Jarzmik
2018-01-22  8:54                         ` Boris Brezillon
2018-01-12 15:55   ` Boris Brezillon
2018-01-12 15:55     ` Boris Brezillon
2018-01-12 15:55     ` Boris Brezillon

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