From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756090AbeARPDQ (ORCPT ); Thu, 18 Jan 2018 10:03:16 -0500 Received: from merlin.infradead.org ([205.233.59.134]:46740 "EHLO merlin.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755136AbeARO6E (ORCPT ); Thu, 18 Jan 2018 09:58:04 -0500 Message-Id: <20180118140153.556539290@infradead.org> User-Agent: quilt/0.63-1 Date: Thu, 18 Jan 2018 14:48:35 +0100 From: Peter Zijlstra From: Peter Zijlstra To: David Woodhouse , Thomas Gleixner , Josh Poimboeuf Cc: linux-kernel@vger.kernel.org, Dave Hansen , Ashok Raj , Tim Chen , Andy Lutomirski , Linus Torvalds , Greg KH , Andrea Arcangeli , Andi Kleen , Arjan Van De Ven , Dan Williams , Paolo Bonzini , Jun Nakajima , Asit Mallick , Jason Baron , Peter Zijlstra Subject: [PATCH 35/35] x86/nospec: Add static assertions References: <20180118134800.711245485@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline; filename=peterz-assert-ibrs-ibpb.patch Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org These sites must not end up under dynamic conditions because then it could be speculated across. Ensure objtools verifies this. Signed-off-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/nospec-branch.h | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) --- a/arch/x86/include/asm/nospec-branch.h +++ b/arch/x86/include/asm/nospec-branch.h @@ -3,6 +3,8 @@ #ifndef __NOSPEC_BRANCH_H__ #define __NOSPEC_BRANCH_H__ +#include + #include #include #include @@ -222,14 +224,18 @@ bool is_skylake_era(void); static inline void stop_indirect_branch_speculation(void) { - if (static_cpu_has(X86_FEATURE_IBRS)) + if (static_cpu_has(X86_FEATURE_IBRS)) { + arch_static_assert(); native_wrmsrl(MSR_IA32_SPEC_CTRL, SPEC_CTRL_ENABLE_IBRS); + } } static inline void restart_indirect_branch_speculation(void) { - if (static_cpu_has(X86_FEATURE_IBRS)) + if (static_cpu_has(X86_FEATURE_IBRS)) { + arch_static_assert(); native_wrmsrl(MSR_IA32_SPEC_CTRL, SPEC_CTRL_DISABLE_IBRS); + } } static inline u64 stop_indirect_branch_speculation_and_save(void) @@ -237,6 +243,7 @@ static inline u64 stop_indirect_branch_s u64 val = 0; if (static_cpu_has(X86_FEATURE_IBRS)) { + arch_static_assert(); val = native_rdmsrl(MSR_IA32_SPEC_CTRL); native_wrmsrl(MSR_IA32_SPEC_CTRL, SPEC_CTRL_ENABLE_IBRS); } @@ -246,16 +253,20 @@ static inline u64 stop_indirect_branch_s static inline void restore_indirect_branch_speculation(u64 val) { - if (static_cpu_has(X86_FEATURE_IBRS)) + if (static_cpu_has(X86_FEATURE_IBRS)) { + arch_static_assert(); native_wrmsrl(MSR_IA32_SPEC_CTRL, val); + } } void specctrl_init_ibpb(void); static inline void indirect_branch_prediction_barrier(void) { - if (static_cpu_has(X86_FEATURE_IBPB)) + if (static_cpu_has(X86_FEATURE_IBPB)) { + arch_static_assert(); native_wrmsrl(MSR_IA32_PRED_CMD, PRED_CMD_IBPB); + } } #endif /* __ASSEMBLY__ */