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From: Julien Grall <julien.grall@linaro.org>
To: xen-devel@lists.xen.org
Cc: sstabellini@kernel.org, andre.przywara@linaro.org
Subject: [PATCH 3/7] xen/arm32: entry: Add missing trap_reset entry
Date: Fri, 19 Jan 2018 13:40:59 +0000	[thread overview]
Message-ID: <20180119134103.3390-4-julien.grall@linaro.org> (raw)
In-Reply-To: <20180119134103.3390-1-julien.grall@linaro.org>

At the moment, the reset vector is defined as .word 0 (e.g andeq r0, r0,
r0).

This is rather unintuitive and will result to execute the trap
undefined. Instead introduce trap helpers for reset and will generate an
error message in the unlikely case that reset will be called.

This is part of XSA-254.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
---
 xen/arch/arm/arm32/entry.S | 1 +
 xen/arch/arm/arm32/traps.c | 5 +++++
 2 files changed, 6 insertions(+)

diff --git a/xen/arch/arm/arm32/entry.S b/xen/arch/arm/arm32/entry.S
index c6490d2847..c2fad5fe9b 100644
--- a/xen/arch/arm/arm32/entry.S
+++ b/xen/arch/arm/arm32/entry.S
@@ -146,6 +146,7 @@ GLOBAL(hyp_traps_vector)
         b trap_irq                      /* 0x18 - IRQ */
         b trap_fiq                      /* 0x1c - FIQ */
 
+DEFINE_TRAP_ENTRY(reset)
 DEFINE_TRAP_ENTRY(undefined_instruction)
 DEFINE_TRAP_ENTRY(hypervisor_call)
 DEFINE_TRAP_ENTRY(prefetch_abort)
diff --git a/xen/arch/arm/arm32/traps.c b/xen/arch/arm/arm32/traps.c
index 705255883e..4f27543dec 100644
--- a/xen/arch/arm/arm32/traps.c
+++ b/xen/arch/arm/arm32/traps.c
@@ -23,6 +23,11 @@
 
 #include <asm/processor.h>
 
+void do_trap_reset(struct cpu_user_regs *regs)
+{
+    do_unexpected_trap("Reset", regs);
+}
+
 void do_trap_undefined_instruction(struct cpu_user_regs *regs)
 {
     uint32_t pc = regs->pc;
-- 
2.11.0


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  parent reply	other threads:[~2018-01-19 13:40 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-19 13:40 [PATCH 0/7] xen/arm32: Branch predictor hardening (XSA-254 variant 2) Julien Grall
2018-01-19 13:40 ` [PATCH 1/7] xen/arm32: entry: Consolidate DEFINE_TRAP_ENTRY_* macros Julien Grall
2018-01-24 23:03   ` Stefano Stabellini
2018-01-19 13:40 ` [PATCH 2/7] xen/arm32: Add missing MIDR values for Cortex-A17 and A12 Julien Grall
2018-01-24 23:06   ` Stefano Stabellini
2018-01-19 13:40 ` Julien Grall [this message]
2018-01-24 23:14   ` [PATCH 3/7] xen/arm32: entry: Add missing trap_reset entry Stefano Stabellini
2018-01-25 11:24     ` Julien Grall
2018-01-19 13:41 ` [PATCH 4/7] xen/arm32: Add skeleton to harden branch predictor aliasing attacks Julien Grall
2018-01-24 23:54   ` Stefano Stabellini
2018-01-25 11:36     ` Julien Grall
2018-01-25 18:45       ` Stefano Stabellini
2018-01-25 18:50         ` Julien Grall
2018-01-25 19:37           ` Stefano Stabellini
2018-01-26 16:21             ` Julien Grall
2018-01-31 15:29               ` Julien Grall
2018-01-31 16:40                 ` Stefano Stabellini
2018-01-19 13:41 ` [PATCH 5/7] xen/arm32: Invalidate BTB on guest exit for Cortex A17 and 12 Julien Grall
2018-01-24 22:22   ` Konrad Rzeszutek Wilk
2018-01-24 22:28     ` Julien Grall
2018-01-25  1:02   ` Stefano Stabellini
2018-01-25 11:50     ` Julien Grall
2018-01-25 19:35       ` Stefano Stabellini
2018-01-31 15:31         ` Julien Grall
2018-01-31 16:40           ` Stefano Stabellini
2018-01-19 13:41 ` [PATCH 6/7] xen/arm32: Invalidate icache on guest exist for Cortex-A15 Julien Grall
2018-01-25  1:08   ` Stefano Stabellini
2018-01-19 13:41 ` [PATCH 7/7] xen/arm32: entry: Document the purpose of r11 in the traps handler Julien Grall
2018-01-25  1:08   ` Stefano Stabellini

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