From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Sat, 20 Jan 2018 02:11:40 +0100 Subject: [U-Boot] [PATCH v9 07/12] mips: bmips: add bcm63xx-spi driver support for BCM6348 In-Reply-To: <20180120011145.12603-1-noltari@gmail.com> References: <1495135788-9152-1-git-send-email-noltari@gmail.com> <20180120011145.12603-1-noltari@gmail.com> Message-ID: <20180120011145.12603-8-noltari@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: u-boot@lists.denx.de This driver manages the SPI controller present on this SoC. Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Daniel Schwierzeck Reviewed-by: Jagan Teki Reviewed-by: Simon Glass --- v9: no changes v8: no changes v7: no changes v6: no changes v5: no changes v4: no changes v3: rename BCM6338 SPI driver to BCM6348 v2: add spi alias arch/mips/dts/brcm,bcm6348.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/mips/dts/brcm,bcm6348.dtsi b/arch/mips/dts/brcm,bcm6348.dtsi index 711b643b5a..540b9fea5b 100644 --- a/arch/mips/dts/brcm,bcm6348.dtsi +++ b/arch/mips/dts/brcm,bcm6348.dtsi @@ -12,6 +12,10 @@ / { compatible = "brcm,bcm6348"; + aliases { + spi0 = &spi; + }; + cpus { reg = <0xfffe0000 0x4>; #address-cells = <1>; @@ -118,6 +122,19 @@ status = "disabled"; }; + spi: spi at fffe0c00 { + compatible = "brcm,bcm6348-spi"; + reg = <0xfffe0c00 0xc0>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&periph_clk BCM6348_CLK_SPI>; + resets = <&periph_rst BCM6348_RST_SPI>; + spi-max-frequency = <20000000>; + num-cs = <4>; + + status = "disabled"; + }; + memory-controller at fffe2300 { compatible = "brcm,bcm6338-mc"; reg = <0xfffe2300 0x38>; -- 2.11.0