From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x225Jo0HrJBngG1VlOFaGjgQg1NHtEFHd8GteDsmBgOklMTcdOanssaVcDO55DI8DItiTDmT9 ARC-Seal: i=1; a=rsa-sha256; t=1516997303; cv=none; d=google.com; s=arc-20160816; b=Z8zguF4v27ICPOVyc/VVYxrz79HboZ8bOeh8eCkzo1PS2ztchXieXkpYVTolRd+4u4 5hMJjgfjZXcXycZRKNG+bCvje+8xLumkfFcWtk9HVa+WmAygK2gmmIYEBZIb9g9qxRoa 0Gh/8jWEUBE7f9QaB9JKMUmD2U5MHsqw9QVqcTVbuuWA9ePsqf5mfkSK1XorJJwdsBBN TN7f1UtSP4xmC/XYCgXvstGe96fba0fzbubG3WDo3aQOXSnOCAjIyj3/fx2g+/7VGYKp oL+7REFt/Ye5l81rnrDvPxWb1fFEKN9b23bvPtwP9IxGzxAj5pQSBRVEywPuPHANm+Am m0wQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=user-agent:in-reply-to:content-disposition:mime-version:references :message-id:subject:cc:to:from:date:arc-authentication-results; bh=CvBe3qd8/F8FT2yaPBz24dJ6hfaONKEwFfgeV2ILUOI=; b=ISoacy7LHABzesXgLHq4G/M1tXrXbh30aDO8JZ2KSPbh/PyqfNEMfgiH34g937YOp/ qt06BKP9zVnoNXLV2GjzzKGsHT2QBlCSbAI731IMZSt8uX7OzsutrZ3nR3TLG5Lp0ZW6 jgWZNecum5/3nSoQkxNNT7vtB/GN1KBjv0ec2TF9v/hbRmnMjlYd7+ZJSncqO896RD+K spRbScg7l4z9e1xWCIDHXEvB93VtKI1X2ctynMpeNL8btGDeZPXuTwpJ8z7oQePN2vIa zhN/YQp1kPDjpOZ187kI7rfYTBA6ogP4TnmkTvTWddo34ZVJKzjrq1AGBXcoBjP+Bb/i /S3w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of bp@alien8.de designates 2a01:4f8:190:11c2::b:1457 as permitted sender) smtp.mailfrom=bp@alien8.de Authentication-Results: mx.google.com; spf=pass (google.com: domain of bp@alien8.de designates 2a01:4f8:190:11c2::b:1457 as permitted sender) smtp.mailfrom=bp@alien8.de Date: Fri, 26 Jan 2018 21:08:13 +0100 From: Borislav Petkov To: David Woodhouse Cc: X86 ML , LKML , Josh Poimboeuf , tim.c.chen@linux.intel.com, pjt@google.com, jikos@kernel.org, gregkh@linux-foundation.org, dave.hansen@intel.com, riel@redhat.com, luto@amacapital.net, torvalds@linux-foundation.org, ak@linux.intel.com, keescook@google.com, peterz@infradead.org Subject: [PATCH 2/2] x86/speculation: Simplify indirect_branch_prediction_barrier() Message-ID: <20180126200813.cignvfovk2dhlzbh@pd.tnic> References: <20180126121139.31959-1-bp@alien8.de> <20180126121139.31959-4-bp@alien8.de> <1516970011.30244.223.camel@infradead.org> <20180126132431.fsbd3c3g2yreazy6@pd.tnic> <1516983879.30244.236.camel@infradead.org> <20180126164746.dpo7dswid5tjk2tz@pd.tnic> <20180126200616.5xfn244uzeu7ptyo@pd.tnic> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20180126200616.5xfn244uzeu7ptyo@pd.tnic> User-Agent: NeoMutt/20170609 (1.8.3) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1590686965266539786?= X-GMAIL-MSGID: =?utf-8?q?1590686965266539786?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: Make it all a function which does the WRMSR instead of having a hairy inline asm. Signed-off-by: Borislav Petkov --- arch/x86/include/asm/cpufeatures.h | 2 +- arch/x86/include/asm/nospec-branch.h | 13 ++++--------- arch/x86/include/asm/processor.h | 4 ++++ arch/x86/kernel/cpu/bugs.c | 7 +++++++ 4 files changed, 16 insertions(+), 10 deletions(-) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 6c6d862d66a1..6c033f6adc24 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -211,7 +211,7 @@ #define X86_FEATURE_MBA ( 7*32+18) /* Memory Bandwidth Allocation */ #define X86_FEATURE_RSB_CTXSW ( 7*32+19) /* Fill RSB on context switches */ -#define X86_FEATURE_IBPB ( 7*32+21) /* Indirect Branch Prediction Barrier enabled*/ +#define X86_FEATURE_IBPB ( 7*32+21) /* Indirect Branch Prediction Barrier enabled */ /* Virtualization flags: Linux defined, word 8 */ #define X86_FEATURE_TPR_SHADOW ( 8*32+ 0) /* Intel TPR Shadow */ diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h index 4f88e1b2599f..71ae2dd65259 100644 --- a/arch/x86/include/asm/nospec-branch.h +++ b/arch/x86/include/asm/nospec-branch.h @@ -183,15 +183,10 @@ static inline void vmexit_fill_RSB(void) static inline void indirect_branch_prediction_barrier(void) { - asm volatile(ALTERNATIVE("", - "movl %[msr], %%ecx\n\t" - "movl %[val], %%eax\n\t" - "movl $0, %%edx\n\t" - "wrmsr", - X86_FEATURE_IBPB) - : : [msr] "i" (MSR_IA32_PRED_CMD), - [val] "i" (PRED_CMD_IBPB) - : "eax", "ecx", "edx", "memory"); + alternative_input("", + "call __ibp_barrier", + X86_FEATURE_IBPB, + ASM_NO_INPUT_CLOBBER("eax", "ecx", "edx", "memory")); } #endif /* __ASSEMBLY__ */ diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index d3a67fba200a..4d372f1cea5a 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -971,4 +971,8 @@ bool xen_set_default_idle(void); void stop_this_cpu(void *dummy); void df_debug(struct pt_regs *regs, long error_code); + +#ifdef CONFIG_RETPOLINE +void __ibp_barrier(void); +#endif #endif /* _ASM_X86_PROCESSOR_H */ diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index be068aea6bda..448410fcffcf 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c @@ -304,3 +304,10 @@ ssize_t cpu_show_spectre_v2(struct device *dev, spectre_v2_bad_module ? " - vulnerable module loaded" : ""); } #endif + +#ifdef CONFIG_RETPOLINE +void __ibp_barrier(void) +{ + __wrmsr(MSR_IA32_PRED_CMD, PRED_CMD_IBPB, 0); +} +#endif -- 2.13.0 -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.