From: David Weinehall <david.weinehall@linux.intel.com>
To: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 7/9] drm/i915/dp: Move comment about hw timeout to the right place.
Date: Wed, 31 Jan 2018 12:38:46 +0200 [thread overview]
Message-ID: <20180131103846.GG13657@boom> (raw)
In-Reply-To: <20180127024923.3093-7-dhinakaran.pandiyan@intel.com>
On Fri, Jan 26, 2018 at 06:49:21PM -0800, Dhinakaran Pandiyan wrote:
> No functional change.
>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 97a4557053db..06619998b5a3 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1136,14 +1136,14 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
> DP_AUX_CH_CTL_TIME_OUT_ERROR |
> DP_AUX_CH_CTL_RECEIVE_ERROR);
>
> - if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR)
> - continue;
> -
> /* DP CTS 1.2 Core Rev 1.1, 4.2.1.1 & 4.2.1.2
> * 400us delay required for errors and timeouts
> * Timeout errors from the HW already meet this
> * requirement so skip to next iteration
> */
> + if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR)
> + continue;
> +
> if (status & DP_AUX_CH_CTL_RECEIVE_ERROR) {
> usleep_range(400, 500);
> continue;
> --
> 2.14.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2018-01-31 10:38 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-27 2:49 [PATCH 1/9] drm/i915/psr: Do not activate PSR on frontbuffer flush from fbdev Dhinakaran Pandiyan
2018-01-27 2:49 ` [PATCH 2/9] drm/i915/frontbuffer: Mark frontbuffer flush and invalidate with might_sleep() Dhinakaran Pandiyan
2018-02-01 6:42 ` Rodrigo Vivi
2018-01-27 2:49 ` [PATCH 3/9] drm/i915/psr: Extract PSR DPCD initialization and move it to intel_psr.c Dhinakaran Pandiyan
2018-01-31 10:38 ` David Weinehall
2018-02-01 6:57 ` Rodrigo Vivi
2018-01-27 2:49 ` [PATCH 4/9] drm/i915/psr: Check for the specific AUX_FRAME_SYNC cap bit Dhinakaran Pandiyan
2018-02-01 6:48 ` Rodrigo Vivi
2018-02-05 19:47 ` Pandiyan, Dhinakaran
2018-01-27 2:49 ` [PATCH 5/9] drm/i915/psr: Inline psr2 caps checks Dhinakaran Pandiyan
2018-01-27 10:29 ` Jani Nikula
2018-01-27 2:49 ` [PATCH 6/9] drm/i915/dp: Remove redundant sleep after AUX transaction length check Dhinakaran Pandiyan
2018-01-31 10:40 ` David Weinehall
2018-01-27 2:49 ` [PATCH 7/9] drm/i915/dp: Move comment about hw timeout to the right place Dhinakaran Pandiyan
2018-01-31 10:38 ` David Weinehall [this message]
2018-01-27 2:49 ` [PATCH 8/9] drm/dp: Export AUX_RETRY_INTERVAL Dhinakaran Pandiyan
2018-02-01 7:04 ` [Intel-gfx] " Rodrigo Vivi
2018-01-27 2:49 ` [PATCH 9/9] drm/i915/dp: Use the same aux retry interval as the core Dhinakaran Pandiyan
2018-02-01 7:04 ` Rodrigo Vivi
2018-01-27 3:09 ` ✗ Fi.CI.BAT: failure for series starting with [1/9] drm/i915/psr: Do not activate PSR on frontbuffer flush from fbdev Patchwork
2018-02-01 6:56 ` [PATCH 1/9] " Rodrigo Vivi
2018-02-07 2:27 ` Pandiyan, Dhinakaran
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