All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ingo Molnar <mingo@kernel.org>
To: Dan Williams <dan.j.williams@intel.com>
Cc: tglx@linutronix.de, Andi Kleen <ak@linux.intel.com>,
	x86@kernel.org, linux-kernel@vger.kernel.org,
	Ingo Molnar <mingo@redhat.com>,
	luto@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
	torvalds@linux-foundation.org
Subject: Re: [PATCH v3 3/3] x86/entry: Clear registers for compat syscalls
Date: Tue, 6 Feb 2018 08:26:08 +0100	[thread overview]
Message-ID: <20180206072608.idxe4hhhu6gkeqac@gmail.com> (raw)
In-Reply-To: <151787989697.7847.4083702787288600552.stgit@dwillia2-desk3.amr.corp.intel.com>


* Dan Williams <dan.j.williams@intel.com> wrote:

> From: Andi Kleen <ak@linux.intel.com>
> 
> At entry userspace may have populated registers with values that could
> be useful in a speculative execution attack. Clear them to minimize the
> kernel's attack surface.
> 
> [djbw: interleave the clearing with setting up the stack ]
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Ingo Molnar <mingo@redhat.com>
> Cc: "H. Peter Anvin" <hpa@zytor.com>
> Cc: x86@kernel.org
> Cc: Andy Lutomirski <luto@kernel.org>
> Signed-off-by: Andi Kleen <ak@linux.intel.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> ---
>  arch/x86/entry/entry_64_compat.S |   30 ++++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
> 
> diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S
> index 98d5358e4041..fd65e016e413 100644
> --- a/arch/x86/entry/entry_64_compat.S
> +++ b/arch/x86/entry/entry_64_compat.S
> @@ -85,15 +85,25 @@ ENTRY(entry_SYSENTER_compat)
>  	pushq	%rcx			/* pt_regs->cx */
>  	pushq	$-ENOSYS		/* pt_regs->ax */
>  	pushq   $0			/* pt_regs->r8  = 0 */
> +	xorq	%r8, %r8		/* nospec   r8 */
>  	pushq   $0			/* pt_regs->r9  = 0 */
> +	xorq	%r9, %r9		/* nospec   r9 */
>  	pushq   $0			/* pt_regs->r10 = 0 */
> +	xorq	%r10, %r10		/* nospec   r10 */
>  	pushq   $0			/* pt_regs->r11 = 0 */
> +	xorq	%r11, %r11		/* nospec   r11 */
>  	pushq   %rbx                    /* pt_regs->rbx */
> +	xorl	%ebx, %ebx		/* nospec   rbx */
>  	pushq   %rbp                    /* pt_regs->rbp (will be overwritten) */
> +	xorl	%ebp, %ebp		/* nospec   rbp */
>  	pushq   $0			/* pt_regs->r12 = 0 */
> +	xorq	%r12, %r12		/* nospec   r12 */
>  	pushq   $0			/* pt_regs->r13 = 0 */
> +	xorq	%r13, %r13		/* nospec   r13 */
>  	pushq   $0			/* pt_regs->r14 = 0 */
> +	xorq	%r14, %r14		/* nospec   r14 */
>  	pushq   $0			/* pt_regs->r15 = 0 */
> +	xorq	%r15, %r15		/* nospec   r15 */
>  	cld
>  
>  	/*
> @@ -214,15 +224,25 @@ GLOBAL(entry_SYSCALL_compat_after_hwframe)
>  	pushq	%rbp			/* pt_regs->cx (stashed in bp) */
>  	pushq	$-ENOSYS		/* pt_regs->ax */
>  	pushq   $0			/* pt_regs->r8  = 0 */
> +	xorq	%r8, %r8		/* nospec   r8 */
>  	pushq   $0			/* pt_regs->r9  = 0 */
> +	xorq	%r9, %r9		/* nospec   r9 */
>  	pushq   $0			/* pt_regs->r10 = 0 */
> +	xorq	%r10, %r10		/* nospec   r10 */
>  	pushq   $0			/* pt_regs->r11 = 0 */
> +	xorq	%r11, %r11		/* nospec   r11 */
>  	pushq   %rbx                    /* pt_regs->rbx */
> +	xorl	%ebx, %ebx		/* nospec   rbx */
>  	pushq   %rbp                    /* pt_regs->rbp (will be overwritten) */
> +	xorl	%ebp, %ebp		/* nospec   rbp */
>  	pushq   $0			/* pt_regs->r12 = 0 */
> +	xorq	%r12, %r12		/* nospec   r12 */
>  	pushq   $0			/* pt_regs->r13 = 0 */
> +	xorq	%r13, %r13		/* nospec   r13 */
>  	pushq   $0			/* pt_regs->r14 = 0 */
> +	xorq	%r14, %r14		/* nospec   r14 */
>  	pushq   $0			/* pt_regs->r15 = 0 */
> +	xorq	%r15, %r15		/* nospec   r15 */

I really love it how you've aligned the comment fields vertically - nice!

>  	/*
>  	 * User mode is traced as though IRQs are on, and SYSENTER
> @@ -338,15 +358,25 @@ ENTRY(entry_INT80_compat)
>  	pushq	%rcx			/* pt_regs->cx */
>  	pushq	$-ENOSYS		/* pt_regs->ax */
>  	pushq   $0			/* pt_regs->r8  = 0 */
> +	xorq	%r8, %r8		/* nospec   r8 */
>  	pushq   $0			/* pt_regs->r9  = 0 */
> +	xorq	%r9, %r9		/* nospec   r9 */
>  	pushq   $0			/* pt_regs->r10 = 0 */
> +	xorq	%r10, %r10		/* nospec   r10 */
>  	pushq   $0			/* pt_regs->r11 = 0 */
> +	xorq	%r11, %r11		/* nospec   r11 */
>  	pushq   %rbx                    /* pt_regs->rbx */
> +	xorl	%ebx, %ebx		/* nospec   rbx */
>  	pushq   %rbp                    /* pt_regs->rbp */
> +	xorl	%ebp, %ebp		/* nospec   rbp */
>  	pushq   %r12                    /* pt_regs->r12 */
> +	xorq	%r12, %r12		/* nospec   r12 */
>  	pushq   %r13                    /* pt_regs->r13 */
> +	xorq	%r13, %r13		/* nospec   r13 */
>  	pushq   %r14                    /* pt_regs->r14 */
> +	xorq	%r14, %r14		/* nospec   r14 */
>  	pushq   %r15                    /* pt_regs->r15 */
> +	xorq	%r15, %r15		/* nospec   r15 */
>  	cld

BTW., these last two patches have changed *significantly* from Andi's original 
patches that were submitted originally, so I changed them over to:

  From: Dan Williams <dan.j.williams@intel.com>
  ...
  Originally-From: Andi Kleen <ak@linux.intel.com>
  Signed-off-by: Dan Williams <dan.j.williams@intel.com>

... to better show authorship history.

Please let me know if that's not OK.

Thanks,

	Ingo

  reply	other threads:[~2018-02-06  7:26 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-06  1:18 [PATCH v3 0/3] x86/entry: Clear registers to sanitize speculative usages Dan Williams
2018-02-06  1:18 ` [PATCH v3 1/3] x86/entry: Clear extra registers beyond syscall arguments for 64bit kernels Dan Williams
2018-02-06 11:52   ` [tip:x86/pti] x86/entry/64: Clear extra registers beyond syscall arguments, to reduce speculation attack surface tip-bot for Dan Williams
2018-02-06  1:18 ` [PATCH v3 2/3] x86/entry: Clear registers for 64bit exceptions/interrupts Dan Williams
2018-02-06  9:04   ` Dominik Brodowski
2018-02-06 10:48     ` Ingo Molnar
2018-02-06  9:17   ` Dominik Brodowski
2018-02-06 10:51     ` Ingo Molnar
2018-02-06 10:57       ` Dominik Brodowski
2018-02-06 21:25       ` [PATCH tip-pti 1/2] x86/entry: remove SAVE_C_REGS_EXCEPT_* macros Dominik Brodowski
2018-02-06 22:56         ` Linus Torvalds
2018-02-06 21:32       ` [PATCH tip-pti 2/2] x86/entry: interleave XOR register clearing with PUSH/MOV instructions Dominik Brodowski
2018-02-06 22:30         ` Dan Williams
2018-02-06 22:48         ` Linus Torvalds
2018-02-06 23:05           ` Andy Lutomirski
2018-02-06 23:54           ` Andi Kleen
2018-02-07  1:30             ` Linus Torvalds
2018-02-07 15:18               ` Andi Kleen
2018-02-07 17:05                 ` Linus Torvalds
2018-02-07 17:37                   ` Linus Torvalds
2018-02-06 12:00   ` [tip:x86/pti] x86/entry/64: Clear registers for exceptions/interrupts, to reduce speculation attack surface tip-bot for Dan Williams
2018-02-06  1:18 ` [PATCH v3 3/3] x86/entry: Clear registers for compat syscalls Dan Williams
2018-02-06  7:26   ` Ingo Molnar [this message]
2018-02-06  7:53     ` Dan Williams
2018-02-06 12:00   ` [tip:x86/pti] x86/entry/64/compat: Clear registers for compat syscalls, to reduce speculation attack surface tip-bot for Dan Williams

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180206072608.idxe4hhhu6gkeqac@gmail.com \
    --to=mingo@kernel.org \
    --cc=ak@linux.intel.com \
    --cc=dan.j.williams@intel.com \
    --cc=hpa@zytor.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=luto@kernel.org \
    --cc=mingo@redhat.com \
    --cc=tglx@linutronix.de \
    --cc=torvalds@linux-foundation.org \
    --cc=x86@kernel.org \
    --subject='Re: [PATCH v3 3/3] x86/entry: Clear registers for compat syscalls' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.