From: Dustin Lundquist <dustin@null-ptr.net>
To: Remy Horton <remy.horton@intel.com>
Cc: dev@dpdk.org, Dustin Lundquist <dustin@null-ptr.net>
Subject: [PATCH] example exception_path: cache align per CPU stats
Date: Mon, 12 Feb 2018 19:43:17 -0800 [thread overview]
Message-ID: <20180213034317.28219-1-dustin@null-ptr.net> (raw)
Align stats structure to cache line to prevent bouncing per CPU stats
structure between cache lines.
Signed-off-by: Dustin Lundquist <dustin@null-ptr.net>
---
examples/exception_path/main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/examples/exception_path/main.c b/examples/exception_path/main.c
index 280a50451..3e5b1e718 100644
--- a/examples/exception_path/main.c
+++ b/examples/exception_path/main.c
@@ -108,7 +108,7 @@ struct stats {
uint64_t rx;
uint64_t tx;
uint64_t dropped;
-};
+} __rte_cache_aligned;
/* Array of lcore-specific stats */
static struct stats lcore_stats[RTE_MAX_LCORE];
--
2.11.0
next reply other threads:[~2018-02-13 3:44 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-13 3:43 Dustin Lundquist [this message]
2018-02-13 8:40 ` [PATCH] example exception_path: cache align per CPU stats Remy Horton
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