From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934882AbeCHCsK (ORCPT ); Wed, 7 Mar 2018 21:48:10 -0500 Received: from mail-ot0-f195.google.com ([74.125.82.195]:45452 "EHLO mail-ot0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934577AbeCHCsI (ORCPT ); Wed, 7 Mar 2018 21:48:08 -0500 X-Google-Smtp-Source: AG47ELvfzS5bRFcbYlO4diCr/LNIBOrFldRcWNm6rg3TVQV40t6RlsDYxydk4pdKxA3e8RKSaZSHEw== Date: Wed, 7 Mar 2018 20:48:06 -0600 From: Rob Herring To: Tony Lindgren Cc: Philipp Zabel , Paul Parsons , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-omap@vger.kernel.org, Dave Gerlach , Mark Rutland , Nishant Menon , Philipp Zabel , Suman Anna , Tero Kristo Subject: Re: [PATCHv2] reset: ti-rstctrl: use the reset-simple driver Message-ID: <20180308024806.vombsjullqw5gpmz@rob-hp-laptop> References: <20180307182143.58383-1-tony@atomide.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180307182143.58383-1-tony@atomide.com> User-Agent: NeoMutt/20170609 (1.8.3) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 07, 2018 at 10:21:43AM -0800, Tony Lindgren wrote: > We can support the RSTCTRL reset registers on many TI SoCs with > reset-simple. > > Note that some devices will also need to check the RSTST bits > for reset reason. Support for these could be possibly added to > the reset controller framework later on. > > Cc: Dave Gerlach > Cc: Mark Rutland > Cc: Nishant Menon > Cc: Philipp Zabel > Cc: Rob Herring > Cc: Suman Anna > Cc: Tero Kristo > Signed-off-by: Tony Lindgren > --- > > Changes since v1: > - Update patch description to mention the unhandled RSTST bits > - Rebase against Linux next > > --- > .../devicetree/bindings/reset/ti-rstctrl.txt | 20 ++++++++++++++++++++ > drivers/reset/Kconfig | 3 ++- > drivers/reset/reset-simple.c | 1 + > 3 files changed, 23 insertions(+), 1 deletion(-) > create mode 100644 Documentation/devicetree/bindings/reset/ti-rstctrl.txt > > diff --git a/Documentation/devicetree/bindings/reset/ti-rstctrl.txt b/Documentation/devicetree/bindings/reset/ti-rstctrl.txt > new file mode 100644 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/ti-rstctrl.txt > @@ -0,0 +1,20 @@ > +TI RSTCTRL Reset Controller > + > +Required properties: > +- compatible : "ti,rstctrl" > +- reg : Should contain 1 register ranges(address and length) > +- #reset-cells: 1 > + > +Example: > + prm_gfx: prm@1100 { > + compatible = "simple-bus"; What's a PRM? > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x1100 0x100>; And what else is in this range? > + > + gfx_rstctrl: rstctrl@4 { > + compatible = "ti,rstctrl"; > + reg = <0x4 0x4>; Anytime I see a single register in DT I worry about scaling. How many of these in an SoC? > + #reset-cells = <1>; > + }; > + };