From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966159AbeCHJt7 (ORCPT ); Thu, 8 Mar 2018 04:49:59 -0500 Received: from mail-pl0-f67.google.com ([209.85.160.67]:39861 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966094AbeCHJtz (ORCPT ); Thu, 8 Mar 2018 04:49:55 -0500 X-Google-Smtp-Source: AG47ELstNbb76eD1AHXVZUJ28Sf8mGZjR3gAsxbV/2Rqr+Bnh/jKZjCVHopeYfvKblhfJl2885ZTwg== From: Jacob Chen To: linux-rockchip@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, mchehab@kernel.org, linux-media@vger.kernel.org, sakari.ailus@linux.intel.com, hans.verkuil@cisco.com, tfiga@chromium.org, zhengsq@rock-chips.com, laurent.pinchart@ideasonboard.com, zyc@rock-chips.com, eddie.cai.linux@gmail.com, jeffy.chen@rock-chips.com, devicetree@vger.kernel.org, heiko@sntech.de, Jacob Chen Subject: [PATCH v6 16/17] arm64: dts: rockchip: add rx0 mipi-phy for rk3399 Date: Thu, 8 Mar 2018 17:48:06 +0800 Message-Id: <20180308094807.9443-17-jacob-chen@iotwrt.com> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180308094807.9443-1-jacob-chen@iotwrt.com> References: <20180308094807.9443-1-jacob-chen@iotwrt.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Shunqian Zheng It's a Designware MIPI D-PHY, used for ISP0 in rk3399. Signed-off-by: Shunqian Zheng Signed-off-by: Jacob Chen --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 14ed016f2fdd..d18ab8f56ef2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1308,6 +1308,16 @@ status = "disabled"; }; + mipi_dphy_rx0: mipi-dphy-rx0 { + compatible = "rockchip,rk3399-mipi-dphy"; + clocks = <&cru SCLK_MIPIDPHY_REF>, + <&cru SCLK_DPHY_RX0_CFG>, + <&cru PCLK_VIO_GRF>; + clock-names = "dphy-ref", "dphy-cfg", "grf"; + power-domains = <&power RK3399_PD_VIO>; + status = "disabled"; + }; + u2phy0: usb2-phy@e450 { compatible = "rockchip,rk3399-usb2phy"; reg = <0xe450 0x10>; -- 2.16.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jacob Chen Subject: [PATCH v6 16/17] arm64: dts: rockchip: add rx0 mipi-phy for rk3399 Date: Thu, 8 Mar 2018 17:48:06 +0800 Message-ID: <20180308094807.9443-17-jacob-chen@iotwrt.com> References: <20180308094807.9443-1-jacob-chen@iotwrt.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20180308094807.9443-1-jacob-chen-fyOeoxGR3m/QT0dZR+AlfA@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+glpar-linux-rockchip=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, eddie.cai.linux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org, Jacob Chen , jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org, zyc-TNX95d0MmH7DzftRWevZcw@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, tfiga-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org, hans.verkuil-FYB4Gu1CFyUAvxtiuMwx3w@public.gmane.org, laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org, sakari.ailus-VuQAYsv1563Yd54FQh9/CA@public.gmane.org, mchehab-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, zhengsq-TNX95d0MmH7DzftRWevZcw@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-media-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org From: Shunqian Zheng It's a Designware MIPI D-PHY, used for ISP0 in rk3399. Signed-off-by: Shunqian Zheng Signed-off-by: Jacob Chen --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 14ed016f2fdd..d18ab8f56ef2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1308,6 +1308,16 @@ status = "disabled"; }; + mipi_dphy_rx0: mipi-dphy-rx0 { + compatible = "rockchip,rk3399-mipi-dphy"; + clocks = <&cru SCLK_MIPIDPHY_REF>, + <&cru SCLK_DPHY_RX0_CFG>, + <&cru PCLK_VIO_GRF>; + clock-names = "dphy-ref", "dphy-cfg", "grf"; + power-domains = <&power RK3399_PD_VIO>; + status = "disabled"; + }; + u2phy0: usb2-phy@e450 { compatible = "rockchip,rk3399-usb2phy"; reg = <0xe450 0x10>; -- 2.16.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: jacob-chen@iotwrt.com (Jacob Chen) Date: Thu, 8 Mar 2018 17:48:06 +0800 Subject: [PATCH v6 16/17] arm64: dts: rockchip: add rx0 mipi-phy for rk3399 In-Reply-To: <20180308094807.9443-1-jacob-chen@iotwrt.com> References: <20180308094807.9443-1-jacob-chen@iotwrt.com> Message-ID: <20180308094807.9443-17-jacob-chen@iotwrt.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: Shunqian Zheng It's a Designware MIPI D-PHY, used for ISP0 in rk3399. Signed-off-by: Shunqian Zheng Signed-off-by: Jacob Chen --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 14ed016f2fdd..d18ab8f56ef2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1308,6 +1308,16 @@ status = "disabled"; }; + mipi_dphy_rx0: mipi-dphy-rx0 { + compatible = "rockchip,rk3399-mipi-dphy"; + clocks = <&cru SCLK_MIPIDPHY_REF>, + <&cru SCLK_DPHY_RX0_CFG>, + <&cru PCLK_VIO_GRF>; + clock-names = "dphy-ref", "dphy-cfg", "grf"; + power-domains = <&power RK3399_PD_VIO>; + status = "disabled"; + }; + u2phy0: usb2-phy at e450 { compatible = "rockchip,rk3399-usb2phy"; reg = <0xe450 0x10>; -- 2.16.1