diff for duplicates of <20180308161021.GB1917@lvm>
diff --git a/a/1.txt b/N1/1.txt
index 2c736b8..691590c 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -10,9 +10,9 @@ On Thu, Mar 08, 2018 at 09:49:43AM +0000, Marc Zyngier wrote:
> > "When the PE acknowledges an SGI, a PPI, or an SPI at the CPU
> > interface, the IRI changes the status of the interrupt to active
> > and pending if:
-> > • It is an edge-triggered interrupt, and another edge has been
+> > ? It is an edge-triggered interrupt, and another edge has been
> > detected since the interrupt was acknowledged.
-> > • It is a level-sensitive interrupt, and the level has not been
+> > ? It is a level-sensitive interrupt, and the level has not been
> > deasserted since the interrupt was acknowledged."
> >
> > GIC v2 specification IHI0048B.b has similar description on page
diff --git a/a/content_digest b/N1/content_digest
index ca4faf3..1f14b8a 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -5,27 +5,16 @@
"ref\0009ad47673-068e-f732-d2ca-9c76a8fbdfbc\@arm.com\0"
]
[
- "From\0Christoffer Dall <cdall\@kernel.org>\0"
+ "From\0cdall\@kernel.org (Christoffer Dall)\0"
]
[
- "Subject\0Re: [RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling\0"
+ "Subject\0[RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling\0"
]
[
"Date\0Thu, 8 Mar 2018 08:10:21 -0800\0"
]
[
- "To\0Marc Zyngier <marc.zyngier\@arm.com>\0"
-]
-[
- "Cc\0Shunyong Yang <shunyong.yang\@hxt-semitech.com>",
- " ard.biesheuvel\@linaro.org",
- " will.deacon\@arm.com",
- " eric.auger\@redhat.com",
- " david.daney\@cavium.com",
- " linux-arm-kernel\@lists.infradead.org",
- " kvmarm\@lists.cs.columbia.edu",
- " linux-kernel\@vger.kernel.org",
- " Joey Zheng <yu.zheng\@hxt-semitech.com>\0"
+ "To\0linux-arm-kernel\@lists.infradead.org\0"
]
[
"\0000:1\0"
@@ -46,9 +35,9 @@
"> > \"When the PE acknowledges an SGI, a PPI, or an SPI at the CPU\n",
"> > interface, the IRI changes the status of the interrupt to active\n",
"> > and pending if:\n",
- "> > \342\200\242 It is an edge-triggered interrupt, and another edge has been\n",
+ "> > ? It is an edge-triggered interrupt, and another edge has been\n",
"> > detected since the interrupt was acknowledged.\n",
- "> > \342\200\242 It is a level-sensitive interrupt, and the level has not been\n",
+ "> > ? It is a level-sensitive interrupt, and the level has not been\n",
"> > deasserted since the interrupt was acknowledged.\"\n",
"> > \n",
"> > GIC v2 specification IHI0048B.b has similar description on page\n",
@@ -100,4 +89,4 @@
"-Christoffer"
]
-513992009eaec26690d494ac4a80179d9f26940784b55f820a4e4dfbbc4dfc11
+d095d1b11c9d055bacf3bf7b823efe507a9c5e973e8d666aad459967f510c2a0
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