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diff for duplicates of <20180308161900.GC1917@lvm>

diff --git a/a/1.txt b/N1/1.txt
index d08d7f2..230f075 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -11,9 +11,9 @@ On Thu, Mar 08, 2018 at 11:54:27AM +0000, Marc Zyngier wrote:
 > >> "When the PE acknowledges an SGI, a PPI, or an SPI at the CPU
 > >> interface, the IRI changes the status of the interrupt to active
 > >> and pending if:
-> >> • It is an edge-triggered interrupt, and another edge has been
+> >> ? It is an edge-triggered interrupt, and another edge has been
 > >> detected since the interrupt was acknowledged.
-> >> • It is a level-sensitive interrupt, and the level has not been
+> >> ? It is a level-sensitive interrupt, and the level has not been
 > >> deasserted since the interrupt was acknowledged."
 > >>
 > >> GIC v2 specification IHI0048B.b has similar description on page
diff --git a/a/content_digest b/N1/content_digest
index 34296af..affc9a3 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -8,27 +8,16 @@
   "ref\0000a15633d-8944-cb9b-3e6b-b08ee5ec42b9\@arm.com\0"
 ]
 [
-  "From\0Christoffer Dall <cdall\@kernel.org>\0"
+  "From\0cdall\@kernel.org (Christoffer Dall)\0"
 ]
 [
-  "Subject\0Re: [RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling\0"
+  "Subject\0[RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling\0"
 ]
 [
   "Date\0Thu, 8 Mar 2018 08:19:00 -0800\0"
 ]
 [
-  "To\0Marc Zyngier <marc.zyngier\@arm.com>\0"
-]
-[
-  "Cc\0Shunyong Yang <shunyong.yang\@hxt-semitech.com>",
-  " ard.biesheuvel\@linaro.org",
-  " will.deacon\@arm.com",
-  " eric.auger\@redhat.com",
-  " david.daney\@cavium.com",
-  " linux-arm-kernel\@lists.infradead.org",
-  " kvmarm\@lists.cs.columbia.edu",
-  " linux-kernel\@vger.kernel.org",
-  " Joey Zheng <yu.zheng\@hxt-semitech.com>\0"
+  "To\0linux-arm-kernel\@lists.infradead.org\0"
 ]
 [
   "\0000:1\0"
@@ -50,9 +39,9 @@
   "> >> \"When the PE acknowledges an SGI, a PPI, or an SPI at the CPU\n",
   "> >> interface, the IRI changes the status of the interrupt to active\n",
   "> >> and pending if:\n",
-  "> >> \342\200\242 It is an edge-triggered interrupt, and another edge has been\n",
+  "> >> ? It is an edge-triggered interrupt, and another edge has been\n",
   "> >> detected since the interrupt was acknowledged.\n",
-  "> >> \342\200\242 It is a level-sensitive interrupt, and the level has not been\n",
+  "> >> ? It is a level-sensitive interrupt, and the level has not been\n",
   "> >> deasserted since the interrupt was acknowledged.\"\n",
   "> >>\n",
   "> >> GIC v2 specification IHI0048B.b has similar description on page\n",
@@ -258,4 +247,4 @@
   "-Christoffer"
 ]
 
-19ea5fa09d215f816c9523cef1054381de9e762514c535b9863a0639b2d2b2eb
+f5cb9560b51344e53946a6c94a9bbe60430c7aec69e68a5ef35c671c3f385c2c
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