From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wolfgang Denk Date: Fri, 09 Mar 2018 12:26:01 +0100 Subject: [U-Boot] [PATCH] arm: Disable the strict alignment of data on armv7 In-Reply-To: References: <029f7f8f6d89cc77c92e04223a7402376e050f56.1520433579.git.michal.simek@xilinx.com> <20180308225243.3BCC0240047@gemini.denx.de> Message-ID: <20180309112601.14CEE247241@gemini.denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear Michal, In message you wrote: > > > Can you please add some comments what the consequences of this > > change are? I guess there are advantages, but I also guess these > > come at a price? > > That's something what I am expecting from this discussion if there are > any corner cases which we are not aware of. > > We found this setting based on randomized testing where simply non > aligned access for memory read was causing exception. Hm... One possible position one can take is that unaligned accesses are likely an indication for incorrect or sloppy programming. usually we design data structures, buffers etc. such that no unaligned accesses take place. Most code is explicitly written in such a way that it also runs on architectures where unaligned access simply don't work. I feel that providing such an option just opens the door for lousy programmers who don't think throroughly about the code they write. Yes, in some cases this may be conveniendt. But there are also cases where the problem is just papered over, and hits all the harder later like when you also enable caching. Thi is why I'm asking for the advantages. If it's just is that broken code starts working, then I'd rather see a clear error message that forces the code to be fixed. > The same tests were running fine on arm64 where non aligned accesses are > permitted. But I guess they still come under a (severe?) performance penalty? > It is hard to compare performance impact on u-boot but from > functionality point of view we are not able to see difference. > If there is any performance impact that it is quite low. Hm.... I have to admit that I don't know ARM/ARM64 that well, but I am pretty sure that even on ARM an aligned 32 bit access on a 32 bit bus will result in a single read cycle on that bus - while I would expect that an unaligned 32 bit access might get broken down into 4 byte accesses? Also, I wonder if ARM still maintains atomicity for unaligned reads/ writes ? [IIRC, x86 doesn't, while it's guaranteed for aligned accesses.] Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de What is mind? No matter. What is matter? Never mind. -- Thomas Hewitt Key, 1799-1875