From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932588AbeCLHD6 (ORCPT ); Mon, 12 Mar 2018 03:03:58 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:53066 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751878AbeCLHDz (ORCPT ); Mon, 12 Mar 2018 03:03:55 -0400 X-UUID: 5a42b65423b84cfea677db6b9c720863-20180312 From: Weiyi Lu To: Matthias Brugger , Stephen Boyd , Mike Turquette , Rob Herring CC: James Liao , Fan Chen , , , , , , , Weiyi Lu Subject: [PATCH v2 0/5] update Mediatek MT2712 clock and scpsys support Date: Mon, 12 Mar 2018 15:03:37 +0800 Message-ID: <20180312070342.4335-2-weiyi.lu@mediatek.com> X-Mailer: git-send-email 2.12.5 In-Reply-To: <20180312070342.4335-1-weiyi.lu@mediatek.com> References: <20180312070342.4335-1-weiyi.lu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series is based on v4.16-rc1 and composed of scpsys control (PATCH 1-2) and clock control (PATCH 3-5). Basically, all changes are for the ECO design change of MT2712. changes since v1: - Avoid renumbering clocks. Append new clocks at the bottom of each own subsystem. Weiyi Lu (5): dt-bindings: soc: update MT2712 power dt-bindings soc: mediatek: update power domain data of MT2712 dt-bindings: clock: add clocks for MT2712 arm64: dts: add clock device nodes of MT2712 clk: mediatek: update clock driver of MT2712 arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 28 +++++++++++++ drivers/clk/mediatek/clk-mt2712.c | 69 ++++++++++++++++++++++++------- drivers/soc/mediatek/mtk-scpsys.c | 42 ++++++++++++++++++- include/dt-bindings/clock/mt2712-clk.h | 12 +++++- include/dt-bindings/power/mt2712-power.h | 3 ++ 5 files changed, 136 insertions(+), 18 deletions(-) -- 2.12.5 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Weiyi Lu Subject: [PATCH v2 0/5] update Mediatek MT2712 clock and scpsys support Date: Mon, 12 Mar 2018 15:03:37 +0800 Message-ID: <20180312070342.4335-2-weiyi.lu@mediatek.com> References: <20180312070342.4335-1-weiyi.lu@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <20180312070342.4335-1-weiyi.lu@mediatek.com> Sender: linux-kernel-owner@vger.kernel.org To: Matthias Brugger , Stephen Boyd , Mike Turquette , Rob Herring Cc: James Liao , Fan Chen , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, srv_heupstream@mediatek.com, Weiyi Lu List-Id: devicetree@vger.kernel.org This series is based on v4.16-rc1 and composed of scpsys control (PATCH 1-2) and clock control (PATCH 3-5). Basically, all changes are for the ECO design change of MT2712. changes since v1: - Avoid renumbering clocks. Append new clocks at the bottom of each own subsystem. Weiyi Lu (5): dt-bindings: soc: update MT2712 power dt-bindings soc: mediatek: update power domain data of MT2712 dt-bindings: clock: add clocks for MT2712 arm64: dts: add clock device nodes of MT2712 clk: mediatek: update clock driver of MT2712 arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 28 +++++++++++++ drivers/clk/mediatek/clk-mt2712.c | 69 ++++++++++++++++++++++++------- drivers/soc/mediatek/mtk-scpsys.c | 42 ++++++++++++++++++- include/dt-bindings/clock/mt2712-clk.h | 12 +++++- include/dt-bindings/power/mt2712-power.h | 3 ++ 5 files changed, 136 insertions(+), 18 deletions(-) -- 2.12.5 From mboxrd@z Thu Jan 1 00:00:00 1970 From: weiyi.lu@mediatek.com (Weiyi Lu) Date: Mon, 12 Mar 2018 15:03:37 +0800 Subject: [PATCH v2 0/5] update Mediatek MT2712 clock and scpsys support In-Reply-To: <20180312070342.4335-1-weiyi.lu@mediatek.com> References: <20180312070342.4335-1-weiyi.lu@mediatek.com> Message-ID: <20180312070342.4335-2-weiyi.lu@mediatek.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This series is based on v4.16-rc1 and composed of scpsys control (PATCH 1-2) and clock control (PATCH 3-5). Basically, all changes are for the ECO design change of MT2712. changes since v1: - Avoid renumbering clocks. Append new clocks at the bottom of each own subsystem. Weiyi Lu (5): dt-bindings: soc: update MT2712 power dt-bindings soc: mediatek: update power domain data of MT2712 dt-bindings: clock: add clocks for MT2712 arm64: dts: add clock device nodes of MT2712 clk: mediatek: update clock driver of MT2712 arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 28 +++++++++++++ drivers/clk/mediatek/clk-mt2712.c | 69 ++++++++++++++++++++++++------- drivers/soc/mediatek/mtk-scpsys.c | 42 ++++++++++++++++++- include/dt-bindings/clock/mt2712-clk.h | 12 +++++- include/dt-bindings/power/mt2712-power.h | 3 ++ 5 files changed, 136 insertions(+), 18 deletions(-) -- 2.12.5