From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: From: Bartosz Golaszewski Subject: [PATCH v3 1/8] ARM: davinci: dts: make psc0 a reset provider Date: Tue, 27 Mar 2018 11:20:24 +0200 Message-Id: <20180327092031.11251-2-brgl@bgdev.pl> In-Reply-To: <20180327092031.11251-1-brgl@bgdev.pl> References: <20180327092031.11251-1-brgl@bgdev.pl> To: Sekhar Nori , Kevin Hilman , Rob Herring , Mark Rutland , Russell King , David Lechner , Michael Turquette , Stephen Boyd , Ohad Ben-Cohen , Bjorn Andersson , Philipp Zabel Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-remoteproc@vger.kernel.org, Bartosz Golaszewski List-ID: From: Bartosz Golaszewski The psc driver registers with the reset framework as a provider. Add the #reset-cells property to the psc0 node. Signed-off-by: Bartosz Golaszewski --- arch/arm/boot/dts/da850.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi index a3b9a99b43ca..dad64dbf1f23 100644 --- a/arch/arm/boot/dts/da850.dtsi +++ b/arch/arm/boot/dts/da850.dtsi @@ -123,6 +123,7 @@ compatible = "ti,da850-psc0"; reg = <0x10000 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; #power-domain-cells = <1>; clocks = <&pll0_sysclk 1>, <&pll0_sysclk 2>, <&pll0_sysclk 4>, <&pll0_sysclk 6>, -- 2.16.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bartosz Golaszewski Subject: [PATCH v3 1/8] ARM: davinci: dts: make psc0 a reset provider Date: Tue, 27 Mar 2018 11:20:24 +0200 Message-ID: <20180327092031.11251-2-brgl@bgdev.pl> References: <20180327092031.11251-1-brgl@bgdev.pl> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20180327092031.11251-1-brgl@bgdev.pl> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Sekhar Nori , Kevin Hilman , Rob Herring , Mark Rutland , Russell King , David Lechner , Michael Turquette , Stephen Boyd , Ohad Ben-Cohen , Bjorn Andersson , Philipp Zabel Cc: devicetree@vger.kernel.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org From: Bartosz Golaszewski The psc driver registers with the reset framework as a provider. Add the #reset-cells property to the psc0 node. Signed-off-by: Bartosz Golaszewski --- arch/arm/boot/dts/da850.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi index a3b9a99b43ca..dad64dbf1f23 100644 --- a/arch/arm/boot/dts/da850.dtsi +++ b/arch/arm/boot/dts/da850.dtsi @@ -123,6 +123,7 @@ compatible = "ti,da850-psc0"; reg = <0x10000 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; #power-domain-cells = <1>; clocks = <&pll0_sysclk 1>, <&pll0_sysclk 2>, <&pll0_sysclk 4>, <&pll0_sysclk 6>, -- 2.16.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: brgl@bgdev.pl (Bartosz Golaszewski) Date: Tue, 27 Mar 2018 11:20:24 +0200 Subject: [PATCH v3 1/8] ARM: davinci: dts: make psc0 a reset provider In-Reply-To: <20180327092031.11251-1-brgl@bgdev.pl> References: <20180327092031.11251-1-brgl@bgdev.pl> Message-ID: <20180327092031.11251-2-brgl@bgdev.pl> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: Bartosz Golaszewski The psc driver registers with the reset framework as a provider. Add the #reset-cells property to the psc0 node. Signed-off-by: Bartosz Golaszewski --- arch/arm/boot/dts/da850.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi index a3b9a99b43ca..dad64dbf1f23 100644 --- a/arch/arm/boot/dts/da850.dtsi +++ b/arch/arm/boot/dts/da850.dtsi @@ -123,6 +123,7 @@ compatible = "ti,da850-psc0"; reg = <0x10000 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; #power-domain-cells = <1>; clocks = <&pll0_sysclk 1>, <&pll0_sysclk 2>, <&pll0_sysclk 4>, <&pll0_sysclk 6>, -- 2.16.1