[PATCH i-g-t] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset

[PATCH i-g-t] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Contexts executing when reset triggers are potentialy corrupt so trying to
use them from a subsequent test (like the default context) can hang the
GPU or even the driver.

Workaround that by always creating a dedicated context which will be
running when GPU reset happens.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/gem_eio.c | 96 +++++++++++++++++++++++++++++++++++----------------------
 1 file changed, 60 insertions(+), 36 deletions(-)

diff --git a/tests/gem_eio.c b/tests/gem_eio.c
index b824d9d4c9c0..cefe26adf893 100644
--- a/tests/gem_eio.c
+++ b/tests/gem_eio.c
@@ -249,14 +249,34 @@ static int __check_wait(int fd, uint32_t bo, unsigned int wait)
 	return ret;
 }
 
+static uint32_t context_create_safe(int i915)
+{
+	struct drm_i915_gem_context_param param;
+
+	memset(&param, 0, sizeof(param));
+
+	param.ctx_id = gem_context_create(i915);
+	param.param = I915_CONTEXT_PARAM_BANNABLE;
+	gem_context_set_param(i915, &param);
+
+	param.param = I915_CONTEXT_PARAM_NO_ERROR_CAPTURE;
+	param.value = 1;
+	gem_context_set_param(i915, &param);
+
+	return param.ctx_id;
+}
+
 #define TEST_WEDGE (1)
 
 static void test_wait(int fd, unsigned int flags, unsigned int wait)
 {
 	igt_spin_t *hang;
+	uint32_t ctx;
 
 	igt_require_gem(fd);
 
+	ctx = context_create_safe(fd);
+
 	/*
 	 * If the request we wait on completes due to a hang (even for
 	 * that request), the user expects the return value to 0 (success).
@@ -267,7 +287,7 @@ static void test_wait(int fd, unsigned int flags, unsigned int wait)
 	else
 		igt_require(i915_reset_control(true));
 
-	hang = spin_sync(fd, 0, I915_EXEC_DEFAULT);
+	hang = spin_sync(fd, ctx, I915_EXEC_DEFAULT);
 
 	igt_assert_eq(__check_wait(fd, hang->handle, wait), 0);
 
@@ -276,6 +296,8 @@ static void test_wait(int fd, unsigned int flags, unsigned int wait)
 	igt_require(i915_reset_control(true));
 
 	trigger_reset(fd);
+
+	gem_context_destroy(fd, ctx);
 }
 
 static void test_suspend(int fd, int state)
@@ -309,6 +331,7 @@ static void test_inflight(int fd, unsigned int wait)
 
 	for_each_engine(fd, engine) {
 		struct drm_i915_gem_execbuffer2 execbuf;
+		uint32_t ctx = context_create_safe(fd);
 		igt_spin_t *hang;
 		int fence[64]; /* conservative estimate of ring size */
 
@@ -316,7 +339,7 @@ static void test_inflight(int fd, unsigned int wait)
 		igt_debug("Starting %s on engine '%s'\n", __func__, e__->name);
 		igt_require(i915_reset_control(false));
 
-		hang = spin_sync(fd, 0, engine);
+		hang = spin_sync(fd, ctx, engine);
 		obj[0].handle = hang->handle;
 
 		memset(&execbuf, 0, sizeof(execbuf));
@@ -340,6 +363,8 @@ static void test_inflight(int fd, unsigned int wait)
 		igt_spin_batch_free(fd, hang);
 		igt_assert(i915_reset_control(true));
 		trigger_reset(fd);
+
+		gem_context_destroy(fd, ctx);
 	}
 }
 
@@ -350,17 +375,20 @@ static void test_inflight_suspend(int fd)
 	uint32_t bbe = MI_BATCH_BUFFER_END;
 	int fence[64]; /* conservative estimate of ring size */
 	igt_spin_t *hang;
+	uint32_t ctx;
 
 	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 	igt_require(i915_reset_control(false));
 
+	ctx = context_create_safe(fd);
+
 	memset(obj, 0, sizeof(obj));
 	obj[0].flags = EXEC_OBJECT_WRITE;
 	obj[1].handle = gem_create(fd, 4096);
 	gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
 
-	hang = spin_sync(fd, 0, 0);
+	hang = spin_sync(fd, ctx, 0);
 	obj[0].handle = hang->handle;
 
 	memset(&execbuf, 0, sizeof(execbuf));
@@ -387,23 +415,8 @@ static void test_inflight_suspend(int fd)
 	igt_spin_batch_free(fd, hang);
 	igt_assert(i915_reset_control(true));
 	trigger_reset(fd);
-}
-
-static uint32_t context_create_safe(int i915)
-{
-	struct drm_i915_gem_context_param param;
-
-	memset(&param, 0, sizeof(param));
 
-	param.ctx_id = gem_context_create(i915);
-	param.param = I915_CONTEXT_PARAM_BANNABLE;
-	gem_context_set_param(i915, &param);
-
-	param.param = I915_CONTEXT_PARAM_NO_ERROR_CAPTURE;
-	param.value = 1;
-	gem_context_set_param(i915, &param);
-
-	return param.ctx_id;
+	gem_context_destroy(fd, ctx);
 }
 
 static void test_inflight_contexts(int fd, unsigned int wait)
@@ -411,40 +424,40 @@ static void test_inflight_contexts(int fd, unsigned int wait)
 	struct drm_i915_gem_exec_object2 obj[2];
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
 	unsigned int engine;
-	uint32_t ctx[64];
+	uint32_t ctx[65];
 
 	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 	gem_require_contexts(fd);
 
-	for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++)
-		ctx[n] = context_create_safe(fd);
-
 	memset(obj, 0, sizeof(obj));
 	obj[0].flags = EXEC_OBJECT_WRITE;
 	obj[1].handle = gem_create(fd, 4096);
 	gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
 
 	for_each_engine(fd, engine) {
-		struct drm_i915_gem_execbuffer2 execbuf;
+		struct drm_i915_gem_execbuffer2 execbuf = { };
 		igt_spin_t *hang;
 		int fence[64];
 
-		gem_quiescent_gpu(fd);
-
 		igt_debug("Starting %s on engine '%s'\n", __func__, e__->name);
+
 		igt_require(i915_reset_control(false));
 
-		hang = spin_sync(fd, 0, engine);
+		for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++)
+			ctx[n] = context_create_safe(fd);
+
+		gem_quiescent_gpu(fd);
+
+		hang = spin_sync(fd, ctx[0], engine);
 		obj[0].handle = hang->handle;
 
-		memset(&execbuf, 0, sizeof(execbuf));
 		execbuf.buffers_ptr = to_user_pointer(obj);
 		execbuf.buffer_count = 2;
 		execbuf.flags = engine | I915_EXEC_FENCE_OUT;
 
-		for (unsigned int n = 0; n < ARRAY_SIZE(fence); n++) {
-			execbuf.rsvd1 = ctx[n];
+		for (unsigned int n = 0; n < (ARRAY_SIZE(fence) - 1); n++) {
+			execbuf.rsvd1 = ctx[n + 1];
 			gem_execbuf_wr(fd, &execbuf);
 			fence[n] = execbuf.rsvd2 >> 32;
 			igt_assert(fence[n] != -1);
@@ -452,18 +465,19 @@ static void test_inflight_contexts(int fd, unsigned int wait)
 
 		igt_assert_eq(__check_wait(fd, obj[1].handle, wait), 0);
 
-		for (unsigned int n = 0; n < ARRAY_SIZE(fence); n++) {
+		for (unsigned int n = 0; n < (ARRAY_SIZE(fence) - 1); n++) {
 			igt_assert_eq(sync_fence_status(fence[n]), -EIO);
 			close(fence[n]);
 		}
 
 		igt_spin_batch_free(fd, hang);
+
+		for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++)
+			gem_context_destroy(fd, ctx[n]);
+
 		igt_assert(i915_reset_control(true));
 		trigger_reset(fd);
 	}
-
-	for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++)
-		gem_context_destroy(fd, ctx[n]);
 }
 
 static void test_inflight_external(int fd)
@@ -473,15 +487,18 @@ static void test_inflight_external(int fd)
 	struct drm_i915_gem_exec_object2 obj;
 	igt_spin_t *hang;
 	uint32_t fence;
+	uint32_t ctx;
 	IGT_CORK_FENCE(cork);
 
 	igt_require_sw_sync();
 	igt_require(gem_has_exec_fence(fd));
 
+	ctx = context_create_safe(fd);
+
 	fence = igt_cork_plug(&cork, fd);
 
 	igt_require(i915_reset_control(false));
-	hang = __spin_poll(fd, 0, 0);
+	hang = __spin_poll(fd, ctx, 0);
 
 	memset(&obj, 0, sizeof(obj));
 	obj.handle = gem_create(fd, 4096);
@@ -514,6 +531,8 @@ static void test_inflight_external(int fd)
 	igt_spin_batch_free(fd, hang);
 	igt_assert(i915_reset_control(true));
 	trigger_reset(fd);
+
+	gem_context_destroy(fd, ctx);
 }
 
 static void test_inflight_internal(int fd, unsigned int wait)
@@ -524,12 +543,15 @@ static void test_inflight_internal(int fd, unsigned int wait)
 	unsigned engine, nfence = 0;
 	int fences[16];
 	igt_spin_t *hang;
+	uint32_t ctx;
 
 	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 
+	ctx = context_create_safe(fd);
+
 	igt_require(i915_reset_control(false));
-	hang = spin_sync(fd, 0, 0);
+	hang = spin_sync(fd, ctx, 0);
 
 	memset(obj, 0, sizeof(obj));
 	obj[0].handle = hang->handle;
@@ -560,6 +582,8 @@ static void test_inflight_internal(int fd, unsigned int wait)
 	igt_spin_batch_free(fd, hang);
 	igt_assert(i915_reset_control(true));
 	trigger_reset(fd);
+
+	gem_context_destroy(fd, ctx);
 }
 
 static int fd = -1;
-- 
2.14.1

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[igt-dev] [PATCH i-g-t] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Contexts executing when reset triggers are potentialy corrupt so trying to
use them from a subsequent test (like the default context) can hang the
GPU or even the driver.

Workaround that by always creating a dedicated context which will be
running when GPU reset happens.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/gem_eio.c | 96 +++++++++++++++++++++++++++++++++++----------------------
 1 file changed, 60 insertions(+), 36 deletions(-)

diff --git a/tests/gem_eio.c b/tests/gem_eio.c
index b824d9d4c9c0..cefe26adf893 100644
--- a/tests/gem_eio.c
+++ b/tests/gem_eio.c
@@ -249,14 +249,34 @@ static int __check_wait(int fd, uint32_t bo, unsigned int wait)
 	return ret;
 }
 
+static uint32_t context_create_safe(int i915)
+{
+	struct drm_i915_gem_context_param param;
+
+	memset(&param, 0, sizeof(param));
+
+	param.ctx_id = gem_context_create(i915);
+	param.param = I915_CONTEXT_PARAM_BANNABLE;
+	gem_context_set_param(i915, &param);
+
+	param.param = I915_CONTEXT_PARAM_NO_ERROR_CAPTURE;
+	param.value = 1;
+	gem_context_set_param(i915, &param);
+
+	return param.ctx_id;
+}
+
 #define TEST_WEDGE (1)
 
 static void test_wait(int fd, unsigned int flags, unsigned int wait)
 {
 	igt_spin_t *hang;
+	uint32_t ctx;
 
 	igt_require_gem(fd);
 
+	ctx = context_create_safe(fd);
+
 	/*
 	 * If the request we wait on completes due to a hang (even for
 	 * that request), the user expects the return value to 0 (success).
@@ -267,7 +287,7 @@ static void test_wait(int fd, unsigned int flags, unsigned int wait)
 	else
 		igt_require(i915_reset_control(true));
 
-	hang = spin_sync(fd, 0, I915_EXEC_DEFAULT);
+	hang = spin_sync(fd, ctx, I915_EXEC_DEFAULT);
 
 	igt_assert_eq(__check_wait(fd, hang->handle, wait), 0);
 
@@ -276,6 +296,8 @@ static void test_wait(int fd, unsigned int flags, unsigned int wait)
 	igt_require(i915_reset_control(true));
 
 	trigger_reset(fd);
+
+	gem_context_destroy(fd, ctx);
 }
 
 static void test_suspend(int fd, int state)
@@ -309,6 +331,7 @@ static void test_inflight(int fd, unsigned int wait)
 
 	for_each_engine(fd, engine) {
 		struct drm_i915_gem_execbuffer2 execbuf;
+		uint32_t ctx = context_create_safe(fd);
 		igt_spin_t *hang;
 		int fence[64]; /* conservative estimate of ring size */
 
@@ -316,7 +339,7 @@ static void test_inflight(int fd, unsigned int wait)
 		igt_debug("Starting %s on engine '%s'\n", __func__, e__->name);
 		igt_require(i915_reset_control(false));
 
-		hang = spin_sync(fd, 0, engine);
+		hang = spin_sync(fd, ctx, engine);
 		obj[0].handle = hang->handle;
 
 		memset(&execbuf, 0, sizeof(execbuf));
@@ -340,6 +363,8 @@ static void test_inflight(int fd, unsigned int wait)
 		igt_spin_batch_free(fd, hang);
 		igt_assert(i915_reset_control(true));
 		trigger_reset(fd);
+
+		gem_context_destroy(fd, ctx);
 	}
 }
 
@@ -350,17 +375,20 @@ static void test_inflight_suspend(int fd)
 	uint32_t bbe = MI_BATCH_BUFFER_END;
 	int fence[64]; /* conservative estimate of ring size */
 	igt_spin_t *hang;
+	uint32_t ctx;
 
 	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 	igt_require(i915_reset_control(false));
 
+	ctx = context_create_safe(fd);
+
 	memset(obj, 0, sizeof(obj));
 	obj[0].flags = EXEC_OBJECT_WRITE;
 	obj[1].handle = gem_create(fd, 4096);
 	gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
 
-	hang = spin_sync(fd, 0, 0);
+	hang = spin_sync(fd, ctx, 0);
 	obj[0].handle = hang->handle;
 
 	memset(&execbuf, 0, sizeof(execbuf));
@@ -387,23 +415,8 @@ static void test_inflight_suspend(int fd)
 	igt_spin_batch_free(fd, hang);
 	igt_assert(i915_reset_control(true));
 	trigger_reset(fd);
-}
-
-static uint32_t context_create_safe(int i915)
-{
-	struct drm_i915_gem_context_param param;
-
-	memset(&param, 0, sizeof(param));
 
-	param.ctx_id = gem_context_create(i915);
-	param.param = I915_CONTEXT_PARAM_BANNABLE;
-	gem_context_set_param(i915, &param);
-
-	param.param = I915_CONTEXT_PARAM_NO_ERROR_CAPTURE;
-	param.value = 1;
-	gem_context_set_param(i915, &param);
-
-	return param.ctx_id;
+	gem_context_destroy(fd, ctx);
 }
 
 static void test_inflight_contexts(int fd, unsigned int wait)
@@ -411,40 +424,40 @@ static void test_inflight_contexts(int fd, unsigned int wait)
 	struct drm_i915_gem_exec_object2 obj[2];
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
 	unsigned int engine;
-	uint32_t ctx[64];
+	uint32_t ctx[65];
 
 	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 	gem_require_contexts(fd);
 
-	for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++)
-		ctx[n] = context_create_safe(fd);
-
 	memset(obj, 0, sizeof(obj));
 	obj[0].flags = EXEC_OBJECT_WRITE;
 	obj[1].handle = gem_create(fd, 4096);
 	gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
 
 	for_each_engine(fd, engine) {
-		struct drm_i915_gem_execbuffer2 execbuf;
+		struct drm_i915_gem_execbuffer2 execbuf = { };
 		igt_spin_t *hang;
 		int fence[64];
 
-		gem_quiescent_gpu(fd);
-
 		igt_debug("Starting %s on engine '%s'\n", __func__, e__->name);
+
 		igt_require(i915_reset_control(false));
 
-		hang = spin_sync(fd, 0, engine);
+		for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++)
+			ctx[n] = context_create_safe(fd);
+
+		gem_quiescent_gpu(fd);
+
+		hang = spin_sync(fd, ctx[0], engine);
 		obj[0].handle = hang->handle;
 
-		memset(&execbuf, 0, sizeof(execbuf));
 		execbuf.buffers_ptr = to_user_pointer(obj);
 		execbuf.buffer_count = 2;
 		execbuf.flags = engine | I915_EXEC_FENCE_OUT;
 
-		for (unsigned int n = 0; n < ARRAY_SIZE(fence); n++) {
-			execbuf.rsvd1 = ctx[n];
+		for (unsigned int n = 0; n < (ARRAY_SIZE(fence) - 1); n++) {
+			execbuf.rsvd1 = ctx[n + 1];
 			gem_execbuf_wr(fd, &execbuf);
 			fence[n] = execbuf.rsvd2 >> 32;
 			igt_assert(fence[n] != -1);
@@ -452,18 +465,19 @@ static void test_inflight_contexts(int fd, unsigned int wait)
 
 		igt_assert_eq(__check_wait(fd, obj[1].handle, wait), 0);
 
-		for (unsigned int n = 0; n < ARRAY_SIZE(fence); n++) {
+		for (unsigned int n = 0; n < (ARRAY_SIZE(fence) - 1); n++) {
 			igt_assert_eq(sync_fence_status(fence[n]), -EIO);
 			close(fence[n]);
 		}
 
 		igt_spin_batch_free(fd, hang);
+
+		for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++)
+			gem_context_destroy(fd, ctx[n]);
+
 		igt_assert(i915_reset_control(true));
 		trigger_reset(fd);
 	}
-
-	for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++)
-		gem_context_destroy(fd, ctx[n]);
 }
 
 static void test_inflight_external(int fd)
@@ -473,15 +487,18 @@ static void test_inflight_external(int fd)
 	struct drm_i915_gem_exec_object2 obj;
 	igt_spin_t *hang;
 	uint32_t fence;
+	uint32_t ctx;
 	IGT_CORK_FENCE(cork);
 
 	igt_require_sw_sync();
 	igt_require(gem_has_exec_fence(fd));
 
+	ctx = context_create_safe(fd);
+
 	fence = igt_cork_plug(&cork, fd);
 
 	igt_require(i915_reset_control(false));
-	hang = __spin_poll(fd, 0, 0);
+	hang = __spin_poll(fd, ctx, 0);
 
 	memset(&obj, 0, sizeof(obj));
 	obj.handle = gem_create(fd, 4096);
@@ -514,6 +531,8 @@ static void test_inflight_external(int fd)
 	igt_spin_batch_free(fd, hang);
 	igt_assert(i915_reset_control(true));
 	trigger_reset(fd);
+
+	gem_context_destroy(fd, ctx);
 }
 
 static void test_inflight_internal(int fd, unsigned int wait)
@@ -524,12 +543,15 @@ static void test_inflight_internal(int fd, unsigned int wait)
 	unsigned engine, nfence = 0;
 	int fences[16];
 	igt_spin_t *hang;
+	uint32_t ctx;
 
 	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 
+	ctx = context_create_safe(fd);
+
 	igt_require(i915_reset_control(false));
-	hang = spin_sync(fd, 0, 0);
+	hang = spin_sync(fd, ctx, 0);
 
 	memset(obj, 0, sizeof(obj));
 	obj[0].handle = hang->handle;
@@ -560,6 +582,8 @@ static void test_inflight_internal(int fd, unsigned int wait)
 	igt_spin_batch_free(fd, hang);
 	igt_assert(i915_reset_control(true));
 	trigger_reset(fd);
+
+	gem_context_destroy(fd, ctx);
 }
 
 static int fd = -1;
-- 
2.14.1

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[igt-dev] ✓ Fi.CI.BAT: success for tests/gem_eio: Never re-use contexts which were in the middle of GPU reset

[Patchwork]

== Series Details ==

Series: tests/gem_eio: Never re-use contexts which were in the middle of GPU reset
URL   : https://patchwork.freedesktop.org/series/40751/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
a9741da52ad1963f7632ef1e852cbe1c3bcc601e tests/perf_pmu: Improve accuracy by waiting on spinner to start

with latest DRM-Tip kernel build CI_DRM_3991
4fedafb2f0f2 drm-tip: 2018y-03m-27d-17h-36m-53s UTC integration manifest

No testlist changes.

---- Known issues:

Test gem_exec_suspend:
        Subgroup basic-s3:
                incomplete -> PASS       (fi-skl-6260u) fdo#104108 +1
Test kms_flip:
        Subgroup basic-flip-vs-wf_vblank:
                pass       -> FAIL       (fi-skl-6770hq) fdo#100368
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713

fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u     total:285  pass:264  dwarn:0   dfail:0   fail:0   skip:21  time:434s
fi-bdw-gvtdvm    total:285  pass:261  dwarn:0   dfail:0   fail:0   skip:24  time:449s
fi-blb-e6850     total:285  pass:220  dwarn:1   dfail:0   fail:0   skip:64  time:381s
fi-bsw-n3050     total:285  pass:239  dwarn:0   dfail:0   fail:0   skip:46  time:543s
fi-bwr-2160      total:285  pass:180  dwarn:0   dfail:0   fail:0   skip:105 time:301s
fi-bxt-dsi       total:285  pass:255  dwarn:0   dfail:0   fail:0   skip:30  time:517s
fi-bxt-j4205     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:516s
fi-byt-j1900     total:285  pass:250  dwarn:0   dfail:0   fail:0   skip:35  time:529s
fi-byt-n2820     total:285  pass:246  dwarn:0   dfail:0   fail:0   skip:39  time:513s
fi-cfl-8700k     total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:414s
fi-cfl-s3        total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:567s
fi-cfl-u         total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:514s
fi-elk-e7500     total:285  pass:225  dwarn:1   dfail:0   fail:0   skip:59  time:428s
fi-gdg-551       total:285  pass:176  dwarn:0   dfail:0   fail:1   skip:108 time:327s
fi-glk-1         total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:540s
fi-hsw-4770      total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:407s
fi-ilk-650       total:285  pass:225  dwarn:0   dfail:0   fail:0   skip:60  time:420s
fi-ivb-3520m     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:482s
fi-ivb-3770      total:285  pass:252  dwarn:0   dfail:0   fail:0   skip:33  time:430s
fi-kbl-7500u     total:285  pass:260  dwarn:1   dfail:0   fail:0   skip:24  time:476s
fi-kbl-7567u     total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:470s
fi-kbl-r         total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:516s
fi-pnv-d510      total:285  pass:219  dwarn:1   dfail:0   fail:0   skip:65  time:658s
fi-skl-6260u     total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:446s
fi-skl-6600u     total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:535s
fi-skl-6700k2    total:243  pass:222  dwarn:0   dfail:0   fail:0   skip:20 
fi-skl-6770hq    total:285  pass:264  dwarn:0   dfail:0   fail:1   skip:20  time:490s
fi-skl-guc       total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:429s
fi-skl-gvtdvm    total:285  pass:262  dwarn:0   dfail:0   fail:0   skip:23  time:449s
fi-snb-2520m     total:242  pass:208  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600      total:285  pass:245  dwarn:0   dfail:0   fail:0   skip:40  time:404s
Blacklisted hosts:
fi-cnl-psr       total:285  pass:256  dwarn:3   dfail:0   fail:0   skip:26  time:519s
fi-glk-j4005     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:487s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1199/issues.html
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Re: [igt-dev] [PATCH i-g-t] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset

[Chris Wilson]

Quoting Tvrtko Ursulin (2018-03-27 17:40:56)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> Contexts executing when reset triggers are potentialy corrupt so trying to
> use them from a subsequent test (like the default context) can hang the
> GPU or even the driver.
> 
> Workaround that by always creating a dedicated context which will be
> running when GPU reset happens.

Hmm, what CI won't say until it gets around to running on the shards
(i.e. post merge) is that the !contexts tests are expected to pass on
the older gen. This patch will now fail in gem_context_create().

I was only half jokingly suggesting reopen_device().

As CI is only running each subtest individually, I don't think we are
exposed to the issue, that should give us a bit of time to hopefully fix
it. So back to the perplexing puzzle.
-Chris
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Re: [igt-dev] [PATCH i-g-t] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset

[Chris Wilson]

Quoting Tvrtko Ursulin (2018-03-27 17:40:56)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> Contexts executing when reset triggers are potentialy corrupt so trying to
> use them from a subsequent test (like the default context) can hang the
> GPU or even the driver.
> 
> Workaround that by always creating a dedicated context which will be
> running when GPU reset happens.

Hmm, what CI won't say until it gets around to running on the shards
(i.e. post merge) is that the !contexts tests are expected to pass on
the older gen. This patch will now fail in gem_context_create().

I was only half jokingly suggesting reopen_device().

As CI is only running each subtest individually, I don't think we are
exposed to the issue, that should give us a bit of time to hopefully fix
it. So back to the perplexing puzzle.
-Chris
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[igt-dev] ✓ Fi.CI.IGT: success for tests/gem_eio: Never re-use contexts which were in the middle of GPU reset

[Patchwork]

== Series Details ==

Series: tests/gem_eio: Never re-use contexts which were in the middle of GPU reset
URL   : https://patchwork.freedesktop.org/series/40751/
State : success

== Summary ==

---- Known issues:

Test kms_flip:
        Subgroup 2x-flip-vs-absolute-wf_vblank:
                fail       -> PASS       (shard-hsw) fdo#100368 +3
        Subgroup flip-vs-expired-vblank-interruptible:
                fail       -> PASS       (shard-hsw) fdo#102887
        Subgroup flip-vs-panning-vs-hang:
                dmesg-warn -> PASS       (shard-snb) fdo#103821
Test kms_rotation_crc:
        Subgroup primary-rotation-180:
                fail       -> PASS       (shard-snb) fdo#103925
        Subgroup sprite-rotation-90-pos-100-0:
                pass       -> FAIL       (shard-apl) fdo#103356
Test kms_setmode:
        Subgroup basic:
                pass       -> FAIL       (shard-hsw) fdo#99912

fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103821 https://bugs.freedesktop.org/show_bug.cgi?id=103821
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#103356 https://bugs.freedesktop.org/show_bug.cgi?id=103356
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912

shard-apl        total:3495 pass:1830 dwarn:1   dfail:0   fail:8   skip:1655 time:12931s
shard-hsw        total:3495 pass:1782 dwarn:1   dfail:0   fail:2   skip:1709 time:11562s
shard-snb        total:3495 pass:1375 dwarn:1   dfail:0   fail:2   skip:2117 time:6998s
Blacklisted hosts:
shard-kbl        total:3447 pass:1921 dwarn:1   dfail:1   fail:9   skip:1514 time:9442s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1199/shards.html
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[PATCH i-g-t v2] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Contexts executing when reset triggers are potentialy corrupt so trying to
use them from a subsequent test (like the default context) can hang the
GPU or even the driver.

Workaround that by always creating a dedicated context which will be
running when GPU reset happens.

v2:
 * Export and use gem_reopen_device so the test works on old gens as well.
   (Chris Wilson)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 lib/i915/gem_submission.c | 11 +++++--
 lib/i915/gem_submission.h |  2 ++
 tests/gem_eio.c           | 77 ++++++++++++++++++++++++++++++++---------------
 3 files changed, 64 insertions(+), 26 deletions(-)

diff --git a/lib/i915/gem_submission.c b/lib/i915/gem_submission.c
index 7d3cbdbf8e77..2fd460d5ed2b 100644
--- a/lib/i915/gem_submission.c
+++ b/lib/i915/gem_submission.c
@@ -165,7 +165,14 @@ bool gem_has_guc_submission(int fd)
 	return gem_submission_method(fd) & GEM_SUBMISSION_GUC;
 }
 
-static int reopen_driver(int fd)
+/**
+ * gem_reopen_driver:
+ * @fd: re-open the i915 drm file descriptor
+ *
+ * Re-opens the drm fd which is useful in instances where a clean default
+ * context is needed.
+ */
+int gem_reopen_driver(int fd)
 {
 	char path[256];
 
@@ -201,7 +208,7 @@ void gem_test_engine(int i915, unsigned int engine)
 		.buffer_count = 1,
 	};
 
-	i915 = reopen_driver(i915);
+	i915 = gem_reopen_driver(i915);
 	igt_assert(!is_wedged(i915));
 
 	obj.handle = gem_create(i915, 4096);
diff --git a/lib/i915/gem_submission.h b/lib/i915/gem_submission.h
index 6b39a0532295..f94eabb201b4 100644
--- a/lib/i915/gem_submission.h
+++ b/lib/i915/gem_submission.h
@@ -35,4 +35,6 @@ bool gem_has_guc_submission(int fd);
 
 void gem_test_engine(int fd, unsigned int engine);
 
+int gem_reopen_driver(int fd);
+
 #endif /* GEM_SUBMISSION_H */
diff --git a/tests/gem_eio.c b/tests/gem_eio.c
index b824d9d4c9c0..b7c5047f0816 100644
--- a/tests/gem_eio.c
+++ b/tests/gem_eio.c
@@ -255,6 +255,7 @@ static void test_wait(int fd, unsigned int flags, unsigned int wait)
 {
 	igt_spin_t *hang;
 
+	fd = gem_reopen_driver(fd);
 	igt_require_gem(fd);
 
 	/*
@@ -276,10 +277,14 @@ static void test_wait(int fd, unsigned int flags, unsigned int wait)
 	igt_require(i915_reset_control(true));
 
 	trigger_reset(fd);
+	close(fd);
 }
 
 static void test_suspend(int fd, int state)
 {
+	fd = gem_reopen_driver(fd);
+	igt_require_gem(fd);
+
 	/* Do a suspend first so that we don't skip inside the test */
 	igt_system_suspend_autoresume(state, SUSPEND_TEST_DEVICES);
 
@@ -291,27 +296,32 @@ static void test_suspend(int fd, int state)
 
 	igt_require(i915_reset_control(true));
 	trigger_reset(fd);
+	close(fd);
 }
 
 static void test_inflight(int fd, unsigned int wait)
 {
-	const uint32_t bbe = MI_BATCH_BUFFER_END;
-	struct drm_i915_gem_exec_object2 obj[2];
+	int parent_fd = fd;
 	unsigned int engine;
 
 	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 
-	memset(obj, 0, sizeof(obj));
-	obj[0].flags = EXEC_OBJECT_WRITE;
-	obj[1].handle = gem_create(fd, 4096);
-	gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
-
-	for_each_engine(fd, engine) {
+	for_each_engine(parent_fd, engine) {
+		const uint32_t bbe = MI_BATCH_BUFFER_END;
+		struct drm_i915_gem_exec_object2 obj[2];
 		struct drm_i915_gem_execbuffer2 execbuf;
 		igt_spin_t *hang;
 		int fence[64]; /* conservative estimate of ring size */
 
+		fd = gem_reopen_driver(parent_fd);
+		igt_require_gem(fd);
+
+		memset(obj, 0, sizeof(obj));
+		obj[0].flags = EXEC_OBJECT_WRITE;
+		obj[1].handle = gem_create(fd, 4096);
+		gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
+
 		gem_quiescent_gpu(fd);
 		igt_debug("Starting %s on engine '%s'\n", __func__, e__->name);
 		igt_require(i915_reset_control(false));
@@ -340,6 +350,9 @@ static void test_inflight(int fd, unsigned int wait)
 		igt_spin_batch_free(fd, hang);
 		igt_assert(i915_reset_control(true));
 		trigger_reset(fd);
+
+		gem_close(fd, obj[1].handle);
+		close(fd);
 	}
 }
 
@@ -351,6 +364,7 @@ static void test_inflight_suspend(int fd)
 	int fence[64]; /* conservative estimate of ring size */
 	igt_spin_t *hang;
 
+	fd = gem_reopen_driver(fd);
 	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 	igt_require(i915_reset_control(false));
@@ -387,6 +401,7 @@ static void test_inflight_suspend(int fd)
 	igt_spin_batch_free(fd, hang);
 	igt_assert(i915_reset_control(true));
 	trigger_reset(fd);
+	close(fd);
 }
 
 static uint32_t context_create_safe(int i915)
@@ -408,33 +423,37 @@ static uint32_t context_create_safe(int i915)
 
 static void test_inflight_contexts(int fd, unsigned int wait)
 {
-	struct drm_i915_gem_exec_object2 obj[2];
-	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	int parent_fd = fd;
 	unsigned int engine;
-	uint32_t ctx[64];
 
 	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 	gem_require_contexts(fd);
 
-	for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++)
-		ctx[n] = context_create_safe(fd);
-
-	memset(obj, 0, sizeof(obj));
-	obj[0].flags = EXEC_OBJECT_WRITE;
-	obj[1].handle = gem_create(fd, 4096);
-	gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
-
-	for_each_engine(fd, engine) {
+	for_each_engine(parent_fd, engine) {
+		const uint32_t bbe = MI_BATCH_BUFFER_END;
+		struct drm_i915_gem_exec_object2 obj[2];
 		struct drm_i915_gem_execbuffer2 execbuf;
 		igt_spin_t *hang;
+		uint32_t ctx[64];
 		int fence[64];
 
+		fd = gem_reopen_driver(parent_fd);
+		igt_require_gem(fd);
+
+		for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++)
+			ctx[n] = context_create_safe(fd);
+
 		gem_quiescent_gpu(fd);
 
 		igt_debug("Starting %s on engine '%s'\n", __func__, e__->name);
 		igt_require(i915_reset_control(false));
 
+		memset(obj, 0, sizeof(obj));
+		obj[0].flags = EXEC_OBJECT_WRITE;
+		obj[1].handle = gem_create(fd, 4096);
+		gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
+
 		hang = spin_sync(fd, 0, engine);
 		obj[0].handle = hang->handle;
 
@@ -458,12 +477,15 @@ static void test_inflight_contexts(int fd, unsigned int wait)
 		}
 
 		igt_spin_batch_free(fd, hang);
+		gem_close(fd, obj[1].handle);
 		igt_assert(i915_reset_control(true));
 		trigger_reset(fd);
-	}
 
-	for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++)
-		gem_context_destroy(fd, ctx[n]);
+		for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++)
+			gem_context_destroy(fd, ctx[n]);
+
+		close(fd);
+	}
 }
 
 static void test_inflight_external(int fd)
@@ -478,6 +500,9 @@ static void test_inflight_external(int fd)
 	igt_require_sw_sync();
 	igt_require(gem_has_exec_fence(fd));
 
+	fd = gem_reopen_driver(fd);
+	igt_require_gem(fd);
+
 	fence = igt_cork_plug(&cork, fd);
 
 	igt_require(i915_reset_control(false));
@@ -514,6 +539,7 @@ static void test_inflight_external(int fd)
 	igt_spin_batch_free(fd, hang);
 	igt_assert(i915_reset_control(true));
 	trigger_reset(fd);
+	close(fd);
 }
 
 static void test_inflight_internal(int fd, unsigned int wait)
@@ -525,9 +551,11 @@ static void test_inflight_internal(int fd, unsigned int wait)
 	int fences[16];
 	igt_spin_t *hang;
 
-	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 
+	fd = gem_reopen_driver(fd);
+	igt_require_gem(fd);
+
 	igt_require(i915_reset_control(false));
 	hang = spin_sync(fd, 0, 0);
 
@@ -560,6 +588,7 @@ static void test_inflight_internal(int fd, unsigned int wait)
 	igt_spin_batch_free(fd, hang);
 	igt_assert(i915_reset_control(true));
 	trigger_reset(fd);
+	close(fd);
 }
 
 static int fd = -1;
-- 
2.14.1

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[igt-dev] [PATCH i-g-t v2] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Contexts executing when reset triggers are potentialy corrupt so trying to
use them from a subsequent test (like the default context) can hang the
GPU or even the driver.

Workaround that by always creating a dedicated context which will be
running when GPU reset happens.

v2:
 * Export and use gem_reopen_device so the test works on old gens as well.
   (Chris Wilson)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 lib/i915/gem_submission.c | 11 +++++--
 lib/i915/gem_submission.h |  2 ++
 tests/gem_eio.c           | 77 ++++++++++++++++++++++++++++++++---------------
 3 files changed, 64 insertions(+), 26 deletions(-)

diff --git a/lib/i915/gem_submission.c b/lib/i915/gem_submission.c
index 7d3cbdbf8e77..2fd460d5ed2b 100644
--- a/lib/i915/gem_submission.c
+++ b/lib/i915/gem_submission.c
@@ -165,7 +165,14 @@ bool gem_has_guc_submission(int fd)
 	return gem_submission_method(fd) & GEM_SUBMISSION_GUC;
 }
 
-static int reopen_driver(int fd)
+/**
+ * gem_reopen_driver:
+ * @fd: re-open the i915 drm file descriptor
+ *
+ * Re-opens the drm fd which is useful in instances where a clean default
+ * context is needed.
+ */
+int gem_reopen_driver(int fd)
 {
 	char path[256];
 
@@ -201,7 +208,7 @@ void gem_test_engine(int i915, unsigned int engine)
 		.buffer_count = 1,
 	};
 
-	i915 = reopen_driver(i915);
+	i915 = gem_reopen_driver(i915);
 	igt_assert(!is_wedged(i915));
 
 	obj.handle = gem_create(i915, 4096);
diff --git a/lib/i915/gem_submission.h b/lib/i915/gem_submission.h
index 6b39a0532295..f94eabb201b4 100644
--- a/lib/i915/gem_submission.h
+++ b/lib/i915/gem_submission.h
@@ -35,4 +35,6 @@ bool gem_has_guc_submission(int fd);
 
 void gem_test_engine(int fd, unsigned int engine);
 
+int gem_reopen_driver(int fd);
+
 #endif /* GEM_SUBMISSION_H */
diff --git a/tests/gem_eio.c b/tests/gem_eio.c
index b824d9d4c9c0..b7c5047f0816 100644
--- a/tests/gem_eio.c
+++ b/tests/gem_eio.c
@@ -255,6 +255,7 @@ static void test_wait(int fd, unsigned int flags, unsigned int wait)
 {
 	igt_spin_t *hang;
 
+	fd = gem_reopen_driver(fd);
 	igt_require_gem(fd);
 
 	/*
@@ -276,10 +277,14 @@ static void test_wait(int fd, unsigned int flags, unsigned int wait)
 	igt_require(i915_reset_control(true));
 
 	trigger_reset(fd);
+	close(fd);
 }
 
 static void test_suspend(int fd, int state)
 {
+	fd = gem_reopen_driver(fd);
+	igt_require_gem(fd);
+
 	/* Do a suspend first so that we don't skip inside the test */
 	igt_system_suspend_autoresume(state, SUSPEND_TEST_DEVICES);
 
@@ -291,27 +296,32 @@ static void test_suspend(int fd, int state)
 
 	igt_require(i915_reset_control(true));
 	trigger_reset(fd);
+	close(fd);
 }
 
 static void test_inflight(int fd, unsigned int wait)
 {
-	const uint32_t bbe = MI_BATCH_BUFFER_END;
-	struct drm_i915_gem_exec_object2 obj[2];
+	int parent_fd = fd;
 	unsigned int engine;
 
 	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 
-	memset(obj, 0, sizeof(obj));
-	obj[0].flags = EXEC_OBJECT_WRITE;
-	obj[1].handle = gem_create(fd, 4096);
-	gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
-
-	for_each_engine(fd, engine) {
+	for_each_engine(parent_fd, engine) {
+		const uint32_t bbe = MI_BATCH_BUFFER_END;
+		struct drm_i915_gem_exec_object2 obj[2];
 		struct drm_i915_gem_execbuffer2 execbuf;
 		igt_spin_t *hang;
 		int fence[64]; /* conservative estimate of ring size */
 
+		fd = gem_reopen_driver(parent_fd);
+		igt_require_gem(fd);
+
+		memset(obj, 0, sizeof(obj));
+		obj[0].flags = EXEC_OBJECT_WRITE;
+		obj[1].handle = gem_create(fd, 4096);
+		gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
+
 		gem_quiescent_gpu(fd);
 		igt_debug("Starting %s on engine '%s'\n", __func__, e__->name);
 		igt_require(i915_reset_control(false));
@@ -340,6 +350,9 @@ static void test_inflight(int fd, unsigned int wait)
 		igt_spin_batch_free(fd, hang);
 		igt_assert(i915_reset_control(true));
 		trigger_reset(fd);
+
+		gem_close(fd, obj[1].handle);
+		close(fd);
 	}
 }
 
@@ -351,6 +364,7 @@ static void test_inflight_suspend(int fd)
 	int fence[64]; /* conservative estimate of ring size */
 	igt_spin_t *hang;
 
+	fd = gem_reopen_driver(fd);
 	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 	igt_require(i915_reset_control(false));
@@ -387,6 +401,7 @@ static void test_inflight_suspend(int fd)
 	igt_spin_batch_free(fd, hang);
 	igt_assert(i915_reset_control(true));
 	trigger_reset(fd);
+	close(fd);
 }
 
 static uint32_t context_create_safe(int i915)
@@ -408,33 +423,37 @@ static uint32_t context_create_safe(int i915)
 
 static void test_inflight_contexts(int fd, unsigned int wait)
 {
-	struct drm_i915_gem_exec_object2 obj[2];
-	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	int parent_fd = fd;
 	unsigned int engine;
-	uint32_t ctx[64];
 
 	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 	gem_require_contexts(fd);
 
-	for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++)
-		ctx[n] = context_create_safe(fd);
-
-	memset(obj, 0, sizeof(obj));
-	obj[0].flags = EXEC_OBJECT_WRITE;
-	obj[1].handle = gem_create(fd, 4096);
-	gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
-
-	for_each_engine(fd, engine) {
+	for_each_engine(parent_fd, engine) {
+		const uint32_t bbe = MI_BATCH_BUFFER_END;
+		struct drm_i915_gem_exec_object2 obj[2];
 		struct drm_i915_gem_execbuffer2 execbuf;
 		igt_spin_t *hang;
+		uint32_t ctx[64];
 		int fence[64];
 
+		fd = gem_reopen_driver(parent_fd);
+		igt_require_gem(fd);
+
+		for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++)
+			ctx[n] = context_create_safe(fd);
+
 		gem_quiescent_gpu(fd);
 
 		igt_debug("Starting %s on engine '%s'\n", __func__, e__->name);
 		igt_require(i915_reset_control(false));
 
+		memset(obj, 0, sizeof(obj));
+		obj[0].flags = EXEC_OBJECT_WRITE;
+		obj[1].handle = gem_create(fd, 4096);
+		gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
+
 		hang = spin_sync(fd, 0, engine);
 		obj[0].handle = hang->handle;
 
@@ -458,12 +477,15 @@ static void test_inflight_contexts(int fd, unsigned int wait)
 		}
 
 		igt_spin_batch_free(fd, hang);
+		gem_close(fd, obj[1].handle);
 		igt_assert(i915_reset_control(true));
 		trigger_reset(fd);
-	}
 
-	for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++)
-		gem_context_destroy(fd, ctx[n]);
+		for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++)
+			gem_context_destroy(fd, ctx[n]);
+
+		close(fd);
+	}
 }
 
 static void test_inflight_external(int fd)
@@ -478,6 +500,9 @@ static void test_inflight_external(int fd)
 	igt_require_sw_sync();
 	igt_require(gem_has_exec_fence(fd));
 
+	fd = gem_reopen_driver(fd);
+	igt_require_gem(fd);
+
 	fence = igt_cork_plug(&cork, fd);
 
 	igt_require(i915_reset_control(false));
@@ -514,6 +539,7 @@ static void test_inflight_external(int fd)
 	igt_spin_batch_free(fd, hang);
 	igt_assert(i915_reset_control(true));
 	trigger_reset(fd);
+	close(fd);
 }
 
 static void test_inflight_internal(int fd, unsigned int wait)
@@ -525,9 +551,11 @@ static void test_inflight_internal(int fd, unsigned int wait)
 	int fences[16];
 	igt_spin_t *hang;
 
-	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 
+	fd = gem_reopen_driver(fd);
+	igt_require_gem(fd);
+
 	igt_require(i915_reset_control(false));
 	hang = spin_sync(fd, 0, 0);
 
@@ -560,6 +588,7 @@ static void test_inflight_internal(int fd, unsigned int wait)
 	igt_spin_batch_free(fd, hang);
 	igt_assert(i915_reset_control(true));
 	trigger_reset(fd);
+	close(fd);
 }
 
 static int fd = -1;
-- 
2.14.1

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Re: [PATCH i-g-t v2] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset

[Chris Wilson]

Quoting Tvrtko Ursulin (2018-03-29 10:34:40)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> Contexts executing when reset triggers are potentialy corrupt so trying to
> use them from a subsequent test (like the default context) can hang the
> GPU or even the driver.
> 
> Workaround that by always creating a dedicated context which will be
> running when GPU reset happens.
> 
> v2:
>  * Export and use gem_reopen_device so the test works on old gens as well.
>    (Chris Wilson)
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Matches what I wrote^W imagined (as if you believe I would have bothered
with the export rather than cut'n'paste ;)

Have a conditional
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
on the condition that you throw in a test that reused a few contexts a few
times. I think something like

for (nctx in prime(1, next_prime(MAX_ELSP))) {
	while (loop) {
		for (ctx = nctx) {
			for_each_engine() {
				add-spin(ctx, engine);
			}
			end-spin.
		}
		// something, something inject wedge
	}

?
-Chris
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Re: [igt-dev] [Intel-gfx] [PATCH i-g-t v2] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset

[Chris Wilson]

Quoting Tvrtko Ursulin (2018-03-29 10:34:40)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> Contexts executing when reset triggers are potentialy corrupt so trying to
> use them from a subsequent test (like the default context) can hang the
> GPU or even the driver.
> 
> Workaround that by always creating a dedicated context which will be
> running when GPU reset happens.
> 
> v2:
>  * Export and use gem_reopen_device so the test works on old gens as well.
>    (Chris Wilson)
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Matches what I wrote^W imagined (as if you believe I would have bothered
with the export rather than cut'n'paste ;)

Have a conditional
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
on the condition that you throw in a test that reused a few contexts a few
times. I think something like

for (nctx in prime(1, next_prime(MAX_ELSP))) {
	while (loop) {
		for (ctx = nctx) {
			for_each_engine() {
				add-spin(ctx, engine);
			}
			end-spin.
		}
		// something, something inject wedge
	}

?
-Chris
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[igt-dev] ✓ Fi.CI.BAT: success for tests/gem_eio: Never re-use contexts which were in the middle of GPU reset (rev2)

[Patchwork]

== Series Details ==

Series: tests/gem_eio: Never re-use contexts which were in the middle of GPU reset (rev2)
URL   : https://patchwork.freedesktop.org/series/40751/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
2cbd4ddf11b3eaf01f33d8bc2ad46411ec6c299a lib/igt_kms: Improve connector probing in igt_display_init(), v2.

with latest DRM-Tip kernel build CI_DRM_4007
d6e43ca115e5 drm-tip: 2018y-03m-29d-12h-46m-03s UTC integration manifest

No testlist changes.

---- Known issues:

Test gem_mmap_gtt:
        Subgroup basic-small-bo-tiledx:
                fail       -> PASS       (fi-gdg-551) fdo#102575
Test kms_pipe_crc_basic:
        Subgroup read-crc-pipe-b-frame-sequence:
                fail       -> PASS       (fi-cfl-s3) fdo#103481
        Subgroup suspend-read-crc-pipe-c:
                pass       -> INCOMPLETE (fi-bxt-dsi) fdo#103927

fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#103481 https://bugs.freedesktop.org/show_bug.cgi?id=103481
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927

fi-bdw-5557u     total:285  pass:264  dwarn:0   dfail:0   fail:0   skip:21  time:429s
fi-bdw-gvtdvm    total:285  pass:261  dwarn:0   dfail:0   fail:0   skip:24  time:439s
fi-blb-e6850     total:285  pass:220  dwarn:1   dfail:0   fail:0   skip:64  time:382s
fi-bsw-n3050     total:285  pass:239  dwarn:0   dfail:0   fail:0   skip:46  time:542s
fi-bwr-2160      total:285  pass:180  dwarn:0   dfail:0   fail:0   skip:105 time:298s
fi-bxt-dsi       total:243  pass:216  dwarn:0   dfail:0   fail:0   skip:26 
fi-bxt-j4205     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:514s
fi-byt-j1900     total:285  pass:250  dwarn:0   dfail:0   fail:0   skip:35  time:523s
fi-byt-n2820     total:285  pass:246  dwarn:0   dfail:0   fail:0   skip:39  time:516s
fi-cfl-8700k     total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:414s
fi-cfl-s3        total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:558s
fi-cfl-u         total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:515s
fi-cnl-y3        total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:589s
fi-elk-e7500     total:285  pass:225  dwarn:1   dfail:0   fail:0   skip:59  time:425s
fi-gdg-551       total:285  pass:177  dwarn:0   dfail:0   fail:0   skip:108 time:323s
fi-glk-1         total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:540s
fi-hsw-4770      total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:405s
fi-ilk-650       total:285  pass:225  dwarn:0   dfail:0   fail:0   skip:60  time:423s
fi-ivb-3520m     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:462s
fi-ivb-3770      total:285  pass:252  dwarn:0   dfail:0   fail:0   skip:33  time:432s
fi-kbl-7500u     total:285  pass:260  dwarn:1   dfail:0   fail:0   skip:24  time:474s
fi-kbl-7567u     total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:468s
fi-kbl-r         total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:510s
fi-pnv-d510      total:285  pass:219  dwarn:1   dfail:0   fail:0   skip:65  time:657s
fi-skl-6260u     total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:440s
fi-skl-6600u     total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:536s
fi-skl-6700k2    total:285  pass:261  dwarn:0   dfail:0   fail:0   skip:24  time:505s
fi-skl-6770hq    total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:515s
fi-skl-guc       total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:428s
fi-skl-gvtdvm    total:285  pass:262  dwarn:0   dfail:0   fail:0   skip:23  time:444s
fi-snb-2600      total:285  pass:245  dwarn:0   dfail:0   fail:0   skip:40  time:399s
Blacklisted hosts:
fi-cnl-psr       total:285  pass:255  dwarn:4   dfail:0   fail:0   skip:26  time:540s
fi-glk-j4005     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:487s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1206/issues.html
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[igt-dev] ✓ Fi.CI.IGT: success for tests/gem_eio: Never re-use contexts which were in the middle of GPU reset (rev2)

[Patchwork]

== Series Details ==

Series: tests/gem_eio: Never re-use contexts which were in the middle of GPU reset (rev2)
URL   : https://patchwork.freedesktop.org/series/40751/
State : success

== Summary ==

---- Known issues:

Test kms_flip:
        Subgroup flip-vs-absolute-wf_vblank:
                pass       -> FAIL       (shard-hsw) fdo#100368
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                incomplete -> PASS       (shard-hsw) fdo#103375
Test kms_plane_multiple:
        Subgroup atomic-pipe-a-tiling-x:
                pass       -> FAIL       (shard-snb) fdo#103166
Test kms_rotation_crc:
        Subgroup sprite-rotation-180:
                fail       -> PASS       (shard-snb) fdo#103925

fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925

shard-apl        total:3495 pass:1831 dwarn:1   dfail:0   fail:7   skip:1655 time:12904s
shard-hsw        total:3495 pass:1782 dwarn:1   dfail:0   fail:2   skip:1709 time:11656s
shard-snb        total:3495 pass:1374 dwarn:1   dfail:0   fail:3   skip:2117 time:7014s
Blacklisted hosts:
shard-kbl        total:3495 pass:1959 dwarn:1   dfail:0   fail:7   skip:1528 time:9377s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1206/shards.html
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