From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753179AbeC1NBZ (ORCPT ); Wed, 28 Mar 2018 09:01:25 -0400 Received: from mail.skyhub.de ([5.9.137.197]:47524 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751840AbeC1NBY (ORCPT ); Wed, 28 Mar 2018 09:01:24 -0400 Date: Wed, 28 Mar 2018 15:00:28 +0200 From: Borislav Petkov To: Yazen Ghannam Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/3] EDAC/amd64: Print ECC enabled/disabled for nodes with enabled MCs Message-ID: <20180328130028.GB20533@pd.tnic> References: <20180321191335.7832-1-Yazen.Ghannam@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20180321191335.7832-1-Yazen.Ghannam@amd.com> User-Agent: Mutt/1.9.3 (2018-01-21) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 21, 2018 at 02:13:33PM -0500, Yazen Ghannam wrote: > From: Yazen Ghannam > > It's possible that a system can be used without any DRAM populated on > one or more physical Dies on multi-die systems. Firmware will not > enable DRAM ECC on Dies without DRAM. Users will then see a message > about DRAM ECC disabled on those nodes without DRAM. However, DRAM ECC > may, in fact, be enabled on the other Dies that have DRAM. > > Only print ECC enabled/disabled information for nodes that have at least > one enabled memory channel. So if the only reason for this is make the error messages more precise, then let's not make it uglier than it is. The right way to do it would be to push those checks down to debug_display_dimm_sizes* which looks at the CS rows and the chip select enable bits and there to differentiate between * memory controller doesn't have DIMMs and * memory controller has DIMMs but ECC is disabled in the BIOS and then print the respective informative error message. But not with a yet another boolean which kinda takes care of F17h only and leaves the old families as they were. Thx. -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply. From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [1/3] EDAC/amd64: Print ECC enabled/disabled for nodes with enabled MCs From: Borislav Petkov Message-Id: <20180328130028.GB20533@pd.tnic> Date: Wed, 28 Mar 2018 15:00:28 +0200 To: Yazen Ghannam Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org List-ID: T24gV2VkLCBNYXIgMjEsIDIwMTggYXQgMDI6MTM6MzNQTSAtMDUwMCwgWWF6ZW4gR2hhbm5hbSB3 cm90ZToKPiBGcm9tOiBZYXplbiBHaGFubmFtIDx5YXplbi5naGFubmFtQGFtZC5jb20+Cj4gCj4g SXQncyBwb3NzaWJsZSB0aGF0IGEgc3lzdGVtIGNhbiBiZSB1c2VkIHdpdGhvdXQgYW55IERSQU0g cG9wdWxhdGVkIG9uCj4gb25lIG9yIG1vcmUgcGh5c2ljYWwgRGllcyBvbiBtdWx0aS1kaWUgc3lz dGVtcy4gRmlybXdhcmUgd2lsbCBub3QKPiBlbmFibGUgRFJBTSBFQ0Mgb24gRGllcyB3aXRob3V0 IERSQU0uIFVzZXJzIHdpbGwgdGhlbiBzZWUgYSBtZXNzYWdlCj4gYWJvdXQgRFJBTSBFQ0MgZGlz YWJsZWQgb24gdGhvc2Ugbm9kZXMgd2l0aG91dCBEUkFNLiBIb3dldmVyLCBEUkFNIEVDQwo+IG1h eSwgaW4gZmFjdCwgYmUgZW5hYmxlZCBvbiB0aGUgb3RoZXIgRGllcyB0aGF0IGhhdmUgRFJBTS4K PiAKPiBPbmx5IHByaW50IEVDQyBlbmFibGVkL2Rpc2FibGVkIGluZm9ybWF0aW9uIGZvciBub2Rl cyB0aGF0IGhhdmUgYXQgbGVhc3QKPiBvbmUgZW5hYmxlZCBtZW1vcnkgY2hhbm5lbC4KClNvIGlm IHRoZSBvbmx5IHJlYXNvbiBmb3IgdGhpcyBpcyBtYWtlIHRoZSBlcnJvciBtZXNzYWdlcyBtb3Jl IHByZWNpc2UsCnRoZW4gbGV0J3Mgbm90IG1ha2UgaXQgdWdsaWVyIHRoYW4gaXQgaXMuCgpUaGUg cmlnaHQgd2F5IHRvIGRvIGl0IHdvdWxkIGJlIHRvIHB1c2ggdGhvc2UgY2hlY2tzIGRvd24gdG8K ZGVidWdfZGlzcGxheV9kaW1tX3NpemVzKiB3aGljaCBsb29rcyBhdCB0aGUgQ1Mgcm93cyBhbmQg dGhlIGNoaXAgc2VsZWN0CmVuYWJsZSBiaXRzIGFuZCB0aGVyZSB0byBkaWZmZXJlbnRpYXRlIGJl dHdlZW4KCiogbWVtb3J5IGNvbnRyb2xsZXIgZG9lc24ndCBoYXZlIERJTU1zCgphbmQKCiogbWVt b3J5IGNvbnRyb2xsZXIgaGFzIERJTU1zIGJ1dCBFQ0MgaXMgZGlzYWJsZWQgaW4gdGhlIEJJT1MK CmFuZCB0aGVuIHByaW50IHRoZSByZXNwZWN0aXZlIGluZm9ybWF0aXZlIGVycm9yIG1lc3NhZ2Uu IEJ1dCBub3Qgd2l0aCBhCnlldCBhbm90aGVyIGJvb2xlYW4gd2hpY2gga2luZGEgdGFrZXMgY2Fy ZSBvZiBGMTdoIG9ubHkgYW5kIGxlYXZlcyB0aGUKb2xkIGZhbWlsaWVzIGFzIHRoZXkgd2VyZS4K ClRoeC4K