From: Michel Thierry <michel.thierry@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [CI 1/2] drm/i915/guc: enable guc interrupts unconditionally in uc_resume
Date: Wed, 28 Mar 2018 13:58:50 -0700 [thread overview]
Message-ID: <20180328205851.16188-1-michel.thierry@intel.com> (raw)
Probably lost while rebasing commit eacd8391f977 ("drm/i915/guc: Keep GuC
interrupts enabled when using GuC").
Not really needed since i915_gem_init_hw is called before uc_resume, but
it brings symmetry to uc_suspend.
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
---
drivers/gpu/drm/i915/intel_uc.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 081e42462aad..1cffaf7b5dbe 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -480,8 +480,7 @@ int intel_uc_resume(struct drm_i915_private *i915)
if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
return 0;
- if (i915_modparams.guc_log_level)
- gen9_enable_guc_interrupts(i915);
+ gen9_enable_guc_interrupts(i915);
err = intel_guc_resume(guc);
if (err) {
--
2.16.2
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next reply other threads:[~2018-03-28 20:58 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-28 20:58 Michel Thierry [this message]
2018-03-28 20:58 ` [CI 2/2] HAX enable GuC submission for CI Michel Thierry
2018-03-28 22:18 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915/guc: enable guc interrupts unconditionally in uc_resume Patchwork
2018-03-29 6:38 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-03-29 10:30 ` [CI 1/2] " Chris Wilson
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