All of lore.kernel.org
 help / color / mirror / Atom feed
From: Patchwork <patchwork@emeril.freedesktop.org>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✓ Fi.CI.BAT: success for series starting with [v3,01/10] drm: Add DP PSR2 sink enable bit
Date: Thu, 29 Mar 2018 21:07:44 -0000	[thread overview]
Message-ID: <20180329210744.18663.74248@emeril.freedesktop.org> (raw)
In-Reply-To: <20180328223046.16125-1-jose.souza@intel.com>

== Series Details ==

Series: series starting with [v3,01/10] drm: Add DP PSR2 sink enable bit
URL   : https://patchwork.freedesktop.org/series/40839/
State : success

== Summary ==

Series 40839v1 series starting with [v3,01/10] drm: Add DP PSR2 sink enable bit
https://patchwork.freedesktop.org/api/1.0/series/40839/revisions/1/mbox/

---- Known issues:

Test gem_exec_suspend:
        Subgroup basic-s3:
                incomplete -> PASS       (fi-skl-6700k2) fdo#104108
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                dmesg-warn -> PASS       (fi-cnl-y3) fdo#103191

fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191

fi-bdw-5557u     total:285  pass:264  dwarn:0   dfail:0   fail:0   skip:21  time:432s
fi-bdw-gvtdvm    total:285  pass:261  dwarn:0   dfail:0   fail:0   skip:24  time:443s
fi-blb-e6850     total:285  pass:220  dwarn:1   dfail:0   fail:0   skip:64  time:380s
fi-bsw-n3050     total:285  pass:239  dwarn:0   dfail:0   fail:0   skip:46  time:535s
fi-bwr-2160      total:285  pass:180  dwarn:0   dfail:0   fail:0   skip:105 time:295s
fi-bxt-dsi       total:285  pass:255  dwarn:0   dfail:0   fail:0   skip:30  time:515s
fi-bxt-j4205     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:511s
fi-byt-j1900     total:285  pass:250  dwarn:0   dfail:0   fail:0   skip:35  time:523s
fi-byt-n2820     total:285  pass:246  dwarn:0   dfail:0   fail:0   skip:39  time:509s
fi-cfl-8700k     total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:411s
fi-cfl-s3        total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:559s
fi-cfl-u         total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:512s
fi-cnl-y3        total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:589s
fi-elk-e7500     total:285  pass:225  dwarn:1   dfail:0   fail:0   skip:59  time:424s
fi-gdg-551       total:285  pass:176  dwarn:0   dfail:0   fail:1   skip:108 time:316s
fi-glk-1         total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:538s
fi-hsw-4770      total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:405s
fi-ilk-650       total:285  pass:225  dwarn:0   dfail:0   fail:0   skip:60  time:421s
fi-ivb-3520m     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:467s
fi-ivb-3770      total:285  pass:252  dwarn:0   dfail:0   fail:0   skip:33  time:433s
fi-kbl-7500u     total:285  pass:260  dwarn:1   dfail:0   fail:0   skip:24  time:472s
fi-kbl-7567u     total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:472s
fi-kbl-r         total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:510s
fi-pnv-d510      total:285  pass:219  dwarn:1   dfail:0   fail:0   skip:65  time:666s
fi-skl-6260u     total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:440s
fi-skl-6600u     total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:536s
fi-skl-6700k2    total:285  pass:261  dwarn:0   dfail:0   fail:0   skip:24  time:506s
fi-skl-6770hq    total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:493s
fi-skl-guc       total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:430s
fi-skl-gvtdvm    total:285  pass:262  dwarn:0   dfail:0   fail:0   skip:23  time:451s
fi-snb-2520m     total:285  pass:245  dwarn:0   dfail:0   fail:0   skip:40  time:566s
fi-snb-2600      total:285  pass:245  dwarn:0   dfail:0   fail:0   skip:40  time:408s
Blacklisted hosts:
fi-cnl-psr       total:285  pass:256  dwarn:3   dfail:0   fail:0   skip:26  time:533s
fi-glk-j4005     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:484s

9829fcd7ae99d5955bb76a8fb8060e63339d7c9d drm-tip: 2018y-03m-29d-19h-56m-48s UTC integration manifest
2ec83428a832 drm/i915/debugfs: Print sink PSR status
20e02342f2b0 drm/i915/psr: Set DPCD PSR2 enable bit when needed
82122405ae92 drm/i915/psr: Cache sink synchronization latency
bf021489296c drm/i915/psr: Use PSR2 macro for PSR2
5c9248d38cda drm/i915/psr: Do not override PSR2 sink support
4cc799de37d9 drm/i915/psr/cnl: Enable Y-coordinate support in source
45b2682dc7e8 drm/i915/psr: Tie PSR2 support to Y coordinate requirement
c4ff90984726 drm/i915/psr: Nuke aux frame sync
ea5ff834dac7 drm: Add DP last received PSR SDP VSC register and bits
9ae66e05586d drm: Add DP PSR2 sink enable bit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8540/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2018-03-29 21:07 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-28 22:30 [PATCH v3 01/10] drm: Add DP PSR2 sink enable bit José Roberto de Souza
2018-03-28 22:30 ` [PATCH v3 02/10] drm: Add DP last received PSR SDP VSC register and bits José Roberto de Souza
2018-03-28 22:30 ` [PATCH v3 03/10] drm/i915/psr: Nuke aux frame sync José Roberto de Souza
2018-03-28 22:30 ` [PATCH v3 04/10] drm/i915/psr: Tie PSR2 support to Y coordinate requirement José Roberto de Souza
2018-03-28 22:30 ` [PATCH v3 05/10] drm/i915/psr/cnl: Enable Y-coordinate support in source José Roberto de Souza
2018-03-30 17:36   ` Pandiyan, Dhinakaran
2018-03-30 17:49     ` Souza, Jose
2018-03-28 22:30 ` [PATCH v3 06/10] drm/i915/psr: Do not override PSR2 sink support José Roberto de Souza
2018-03-28 22:30 ` [PATCH v3 07/10] drm/i915/psr: Use PSR2 macro for PSR2 José Roberto de Souza
2018-03-28 22:30 ` [PATCH v3 08/10] drm/i915/psr: Cache sink synchronization latency José Roberto de Souza
2018-03-28 22:30 ` [PATCH v3 09/10] drm/i915/psr: Set DPCD PSR2 enable bit when needed José Roberto de Souza
2018-03-30 17:41   ` Rodrigo Vivi
2018-04-05  9:53     ` [Intel-gfx] " Chris Wilson
2018-03-28 22:30 ` [PATCH v3 10/10] drm/i915/debugfs: Print sink PSR status José Roberto de Souza
2018-03-30 18:28   ` Pandiyan, Dhinakaran
2018-03-30 19:19     ` [Intel-gfx] " Souza, Jose
2018-03-30 20:55       ` Pandiyan, Dhinakaran
2018-03-29  0:05 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,01/10] drm: Add DP PSR2 sink enable bit Patchwork
2018-03-29  0:20 ` ✗ Fi.CI.BAT: " Patchwork
2018-03-29 20:49 ` ✗ Fi.CI.CHECKPATCH: " Patchwork
2018-03-29 21:07 ` Patchwork [this message]
2018-03-30  1:20 ` ✓ Fi.CI.IGT: success " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180329210744.18663.74248@emeril.freedesktop.org \
    --to=patchwork@emeril.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jose.souza@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.