From: Dmitry Safonov <dima@arista.com> To: linux-kernel@vger.kernel.org, joro@8bytes.org Cc: 0x7f454c46@gmail.com, Dmitry Safonov <dima@arista.com>, Alex Williamson <alex.williamson@redhat.com>, David Woodhouse <dwmw2@infradead.org>, Ingo Molnar <mingo@kernel.org>, Lu Baolu <baolu.lu@linux.intel.com>, iommu@lists.linux-foundation.org Subject: [PATCHv4 2/2] iommu/vt-d: Limit number of faults to clear in irq handler Date: Sat, 31 Mar 2018 01:33:12 +0100 [thread overview] Message-ID: <20180331003312.6390-2-dima@arista.com> (raw) In-Reply-To: <20180331003312.6390-1-dima@arista.com> Theoretically, on some machines faults might be generated faster than they're cleared by CPU. Let's limit the cleaning-loop by number of hw fault registers. Cc: Alex Williamson <alex.williamson@redhat.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Ingo Molnar <mingo@kernel.org> Cc: Joerg Roedel <joro@8bytes.org> Cc: Lu Baolu <baolu.lu@linux.intel.com> Cc: iommu@lists.linux-foundation.org Signed-off-by: Dmitry Safonov <dima@arista.com> --- drivers/iommu/dmar.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c index 6c4ea32ee6a9..cf1105111209 100644 --- a/drivers/iommu/dmar.c +++ b/drivers/iommu/dmar.c @@ -1615,7 +1615,7 @@ static int dmar_fault_do_one(struct intel_iommu *iommu, int type, irqreturn_t dmar_fault(int irq, void *dev_id) { struct intel_iommu *iommu = dev_id; - int reg, fault_index; + int reg, fault_index, i; u32 fault_status; unsigned long flag; static DEFINE_RATELIMIT_STATE(rs, @@ -1633,7 +1633,7 @@ irqreturn_t dmar_fault(int irq, void *dev_id) fault_index = dma_fsts_fault_record_index(fault_status); reg = cap_fault_reg_offset(iommu->cap); - while (1) { + for (i = 0; i < cap_num_fault_regs(iommu->cap); i++) { /* Disable printing, simply clear the fault when ratelimited */ bool ratelimited = !__ratelimit(&rs); u8 fault_reason; -- 2.13.6
WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Safonov via iommu <iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org> To: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org Cc: Dmitry Safonov <dima-nzgTgzXrdUbQT0dZR+AlfA@public.gmane.org>, 0x7f454c46-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>, Ingo Molnar <mingo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Subject: [PATCHv4 2/2] iommu/vt-d: Limit number of faults to clear in irq handler Date: Sat, 31 Mar 2018 01:33:12 +0100 [thread overview] Message-ID: <20180331003312.6390-2-dima@arista.com> (raw) In-Reply-To: <20180331003312.6390-1-dima-nzgTgzXrdUbQT0dZR+AlfA@public.gmane.org> Theoretically, on some machines faults might be generated faster than they're cleared by CPU. Let's limit the cleaning-loop by number of hw fault registers. Cc: Alex Williamson <alex.williamson-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> Cc: David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org> Cc: Ingo Molnar <mingo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> Cc: Lu Baolu <baolu.lu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Signed-off-by: Dmitry Safonov <dima-nzgTgzXrdUbQT0dZR+AlfA@public.gmane.org> --- drivers/iommu/dmar.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c index 6c4ea32ee6a9..cf1105111209 100644 --- a/drivers/iommu/dmar.c +++ b/drivers/iommu/dmar.c @@ -1615,7 +1615,7 @@ static int dmar_fault_do_one(struct intel_iommu *iommu, int type, irqreturn_t dmar_fault(int irq, void *dev_id) { struct intel_iommu *iommu = dev_id; - int reg, fault_index; + int reg, fault_index, i; u32 fault_status; unsigned long flag; static DEFINE_RATELIMIT_STATE(rs, @@ -1633,7 +1633,7 @@ irqreturn_t dmar_fault(int irq, void *dev_id) fault_index = dma_fsts_fault_record_index(fault_status); reg = cap_fault_reg_offset(iommu->cap); - while (1) { + for (i = 0; i < cap_num_fault_regs(iommu->cap); i++) { /* Disable printing, simply clear the fault when ratelimited */ bool ratelimited = !__ratelimit(&rs); u8 fault_reason; -- 2.13.6
next prev parent reply other threads:[~2018-03-31 0:33 UTC|newest] Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-03-31 0:33 [PATCHv4 1/2] iommu/vt-d: Ratelimit each dmar fault printing Dmitry Safonov 2018-03-31 0:33 ` Dmitry Safonov via iommu 2018-03-31 0:33 ` Dmitry Safonov [this message] 2018-03-31 0:33 ` [PATCHv4 2/2] iommu/vt-d: Limit number of faults to clear in irq handler Dmitry Safonov via iommu 2018-05-02 6:34 ` Lu Baolu 2018-05-02 6:34 ` Lu Baolu 2018-05-02 12:38 ` Dmitry Safonov 2018-05-02 12:38 ` Dmitry Safonov via iommu 2018-05-02 23:49 ` Lu Baolu 2018-05-02 23:49 ` Lu Baolu 2018-05-03 0:52 ` Dmitry Safonov 2018-05-03 0:52 ` Dmitry Safonov via iommu 2018-05-03 1:32 ` Lu Baolu 2018-05-03 1:32 ` Lu Baolu 2018-05-03 1:59 ` Dmitry Safonov 2018-05-03 1:59 ` Dmitry Safonov via iommu 2018-05-03 2:16 ` Lu Baolu 2018-05-03 2:16 ` Lu Baolu 2018-05-03 2:32 ` Lu Baolu 2018-05-03 2:32 ` Lu Baolu 2018-05-03 2:34 ` Dmitry Safonov 2018-05-03 2:34 ` Dmitry Safonov via iommu 2018-05-03 2:44 ` Lu Baolu 2018-05-03 2:44 ` Lu Baolu 2018-05-02 2:22 ` [PATCHv4 1/2] iommu/vt-d: Ratelimit each dmar fault printing Dmitry Safonov 2018-05-02 2:22 ` Dmitry Safonov via iommu 2018-05-03 12:40 ` Joerg Roedel 2018-05-03 16:12 ` Dmitry Safonov 2018-05-03 16:12 ` Dmitry Safonov via iommu
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