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From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Lukas Wunner <lukas@wunner.de>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Len Brown <lenb@kernel.org>,
	Mario.Limonciello@dell.com,
	Michael Jamet <michael.jamet@intel.com>,
	Yehezkel Bernat <yehezkel.bernat@intel.com>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org
Subject: Re: [PATCH v3 1/5] PCI: Make sure all bridges reserve at least one bus number
Date: Sat, 31 Mar 2018 12:58:04 +0300	[thread overview]
Message-ID: <20180331095804.GU2703@lahna.fi.intel.com> (raw)
In-Reply-To: <20180331093017.GB10720@wunner.de>

On Sat, Mar 31, 2018 at 11:30:17AM +0200, Lukas Wunner wrote:
> > The whole point here is that those are *not* hotplug slots just regular
> > downstream ports.
> 
> Okay, understood.  Is this about the NHI or XHCI?  Because at least
> on Alpine Ridge (C step), the bridge above the XHCI *is* a hotplug
> bridge.  Only the bridge above the NHI is not.

Yes, exactly. I tried to clarify this mechanism a bit better in the
other email I just sent.

  reply	other threads:[~2018-03-31  9:58 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-26 13:21 [PATCH v3 0/5] PCI: Fixes for native PCIe and ACPI hotplug Mika Westerberg
2018-02-26 13:21 ` [PATCH v3 1/5] PCI: Make sure all bridges reserve at least one bus number Mika Westerberg
2018-03-27 18:57   ` Bjorn Helgaas
2018-03-28 11:43     ` Mika Westerberg
2018-03-28 18:09       ` Bjorn Helgaas
2018-03-29 11:59         ` Mika Westerberg
2018-03-31  8:29           ` Lukas Wunner
2018-03-31  8:58             ` Mika Westerberg
2018-03-31  9:12               ` Lukas Wunner
2018-03-31  9:19                 ` Rafael J. Wysocki
2018-03-31  9:20                 ` Mika Westerberg
2018-03-31  9:30                   ` Lukas Wunner
2018-03-31  9:58                     ` Mika Westerberg [this message]
2018-03-31 10:18                       ` Lukas Wunner
2018-03-31 10:37                         ` Mika Westerberg
2018-03-31  9:30                   ` Rafael J. Wysocki
2018-03-31  9:56                     ` Mika Westerberg
2018-03-31 10:05                       ` Rafael J. Wysocki
2018-03-31 10:12                         ` Mika Westerberg
2018-02-26 13:21 ` [PATCH v3 2/5] PCI: Take bridge window alignment into account when distributing resources Mika Westerberg
2018-03-27 19:23   ` Bjorn Helgaas
2018-03-28 12:01     ` Mika Westerberg
2018-03-29 21:29       ` Bjorn Helgaas
2018-03-31  9:18         ` Mika Westerberg
2018-02-26 13:21 ` [PATCH v3 3/5] PCI: pciehp: Clear Presence Detect and Data Link Layer Status Changed on resume Mika Westerberg
2018-02-26 13:21 ` [PATCH v3 4/5] ACPI / hotplug / PCI: Do not scan all bridges when native PCIe hotplug is used Mika Westerberg
2018-02-26 13:21 ` [PATCH v3 5/5] ACPI / hotplug / PCI: Mark stale PCI devices disconnected Mika Westerberg
2018-03-27 19:45   ` Bjorn Helgaas
2018-03-27 20:52     ` Lukas Wunner
2018-03-27 22:13       ` Bjorn Helgaas
2018-03-28  6:25         ` Greg Kroah-Hartman
2018-02-26 15:16 ` [PATCH v3 0/5] PCI: Fixes for native PCIe and ACPI hotplug Andy Shevchenko
2018-03-15  6:00 ` Mika Westerberg
2018-03-26 10:01   ` Mika Westerberg

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