From mboxrd@z Thu Jan 1 00:00:00 1970 From: Zhenyu Wang Subject: Re: [PATCH] drm/i915: Move vgpu balloon info into i915_virtual_gpu struct Date: Tue, 3 Apr 2018 11:07:31 +0800 Message-ID: <20180403030731.6zmgkb7zuukdqw6q@zhen-hp.sh.intel.com> References: <152231666514.4289.6376474309139408597@jlahtine-desk.ger.corp.intel.com> <1522658275-3262-1-git-send-email-xiong.y.zhang@intel.com> Reply-To: Zhenyu Wang Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1977572974==" Return-path: In-Reply-To: <1522658275-3262-1-git-send-email-xiong.y.zhang@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Xiong Zhang Cc: intel-gfx@lists.freedesktop.org, intel-gvt-dev@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============1977572974== Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="nsxhfttvwtrgrhot" Content-Disposition: inline --nsxhfttvwtrgrhot Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On 2018.04.02 16:37:55 +0800, Xiong Zhang wrote: > vgpu ballon info consists of four drm_mm_node which is used to reserve > ggtt space, then linux guest won't use these reserved ggtt space. >=20 > Each vgpu has its own ballon info, so move ballon info into > i915_virtual_gpu structure. >=20 > Signed-off-by: Xiong Zhang > --- Acked-by: Zhenyu Wang > drivers/gpu/drm/i915/i915_drv.h | 14 ++++++++++++ > drivers/gpu/drm/i915/i915_vgpu.c | 47 ++++++++++++++++++++--------------= ------ > 2 files changed, 37 insertions(+), 24 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_= drv.h > index 800230b..2adc73d 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1301,6 +1301,20 @@ struct i915_workarounds { > struct i915_virtual_gpu { > bool active; > u32 caps; > + > + struct balloon_info { > + /* > + * There are up to 2 regions per mappable/unmappable graphic > + * memory that might be ballooned. Here, index 0/1 is for > + * mappable graphic memory, 2/3 for unmappable graphic memory. > + */ > +#define VGPU_MAPPABLE_BALLOON_LOW 0 > +#define VGPU_MAPPABLE_BALLOON_HIGH 1 > +#define VGPU_UNMAPPABLE_BALLOON_LOW 2 > +#define VGPU_UNMAPPABLE_BALLOON_HIGH 3 > +#define VGPU_MAX_BALLOON_NUM 4 > + struct drm_mm_node space[VGPU_MAX_BALLOON_NUM]; > + } bl_info; > }; > =20 > /* used in computing the new watermarks state */ > diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915= _vgpu.c > index 7545686..79d3df4 100644 > --- a/drivers/gpu/drm/i915/i915_vgpu.c > +++ b/drivers/gpu/drm/i915/i915_vgpu.c > @@ -86,17 +86,6 @@ bool intel_vgpu_has_full_48bit_ppgtt(struct drm_i915_p= rivate *dev_priv) > return dev_priv->vgpu.caps & VGT_CAPS_FULL_48BIT_PPGTT; > } > =20 > -struct _balloon_info_ { > - /* > - * There are up to 2 regions per mappable/unmappable graphic > - * memory that might be ballooned. Here, index 0/1 is for mappable > - * graphic memory, 2/3 for unmappable graphic memory. > - */ > - struct drm_mm_node space[4]; > -}; > - > -static struct _balloon_info_ bl_info; > - > static void vgt_deballoon_space(struct i915_ggtt *ggtt, > struct drm_mm_node *node) > { > @@ -128,8 +117,9 @@ void intel_vgt_deballoon(struct drm_i915_private *dev= _priv) > =20 > DRM_DEBUG("VGT deballoon.\n"); > =20 > - for (i =3D 0; i < 4; i++) > - vgt_deballoon_space(&dev_priv->ggtt, &bl_info.space[i]); > + for (i =3D 0; i < VGPU_MAX_BALLOON_NUM; i++) > + vgt_deballoon_space(&dev_priv->ggtt, > + &dev_priv->vgpu.bl_info.space[i]); > } > =20 > static int vgt_balloon_space(struct i915_ggtt *ggtt, > @@ -200,6 +190,7 @@ static int vgt_balloon_space(struct i915_ggtt *ggtt, > int intel_vgt_balloon(struct drm_i915_private *dev_priv) > { > struct i915_ggtt *ggtt =3D &dev_priv->ggtt; > + struct balloon_info *bl_info; > unsigned long ggtt_end =3D ggtt->base.total; > =20 > unsigned long mappable_base, mappable_size, mappable_end; > @@ -230,34 +221,39 @@ int intel_vgt_balloon(struct drm_i915_private *dev_= priv) > return -EINVAL; > } > =20 > + bl_info =3D &dev_priv->vgpu.bl_info; > /* Unmappable graphic memory ballooning */ > if (unmappable_base > ggtt->mappable_end) { > - ret =3D vgt_balloon_space(ggtt, &bl_info.space[2], > - ggtt->mappable_end, unmappable_base); > + ret =3D vgt_balloon_space(ggtt, > + &bl_info->space[VGPU_UNMAPPABLE_BALLOON_LOW], > + ggtt->mappable_end, unmappable_base); > =20 > if (ret) > goto err; > } > =20 > if (unmappable_end < ggtt_end) { > - ret =3D vgt_balloon_space(ggtt, &bl_info.space[3], > - unmappable_end, ggtt_end); > + ret =3D vgt_balloon_space(ggtt, > + &bl_info->space[VGPU_UNMAPPABLE_BALLOON_HIGH], > + unmappable_end, ggtt_end); > if (ret) > goto err_upon_mappable; > } > =20 > /* Mappable graphic memory ballooning */ > if (mappable_base) { > - ret =3D vgt_balloon_space(ggtt, &bl_info.space[0], > - 0, mappable_base); > + ret =3D vgt_balloon_space(ggtt, > + &bl_info->space[VGPU_MAPPABLE_BALLOON_LOW], > + 0, mappable_base); > =20 > if (ret) > goto err_upon_unmappable; > } > =20 > if (mappable_end < ggtt->mappable_end) { > - ret =3D vgt_balloon_space(ggtt, &bl_info.space[1], > - mappable_end, ggtt->mappable_end); > + ret =3D vgt_balloon_space(ggtt, > + &bl_info->space[VGPU_MAPPABLE_BALLOON_HIGH], > + mappable_end, ggtt->mappable_end); > =20 > if (ret) > goto err_below_mappable; > @@ -267,11 +263,14 @@ int intel_vgt_balloon(struct drm_i915_private *dev_= priv) > return 0; > =20 > err_below_mappable: > - vgt_deballoon_space(ggtt, &bl_info.space[0]); > + vgt_deballoon_space(ggtt, > + &bl_info->space[VGPU_MAPPABLE_BALLOON_LOW]); > err_upon_unmappable: > - vgt_deballoon_space(ggtt, &bl_info.space[3]); > + vgt_deballoon_space(ggtt, > + &bl_info->space[VGPU_UNMAPPABLE_BALLOON_HIGH]); > err_upon_mappable: > - vgt_deballoon_space(ggtt, &bl_info.space[2]); > + vgt_deballoon_space(ggtt, > + &bl_info->space[VGPU_UNMAPPABLE_BALLOON_LOW]); > err: > DRM_ERROR("VGT balloon fail\n"); > return ret; > --=20 > 2.7.4 >=20 > _______________________________________________ > intel-gvt-dev mailing list > intel-gvt-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev --=20 Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 --nsxhfttvwtrgrhot Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iF0EARECAB0WIQTXuabgHDW6LPt9CICxBBozTXgYJwUCWsLv8gAKCRCxBBozTXgY J7YGAKCWvs7A+CWBvfFwbKiaVwaU7xsotACgj8uAbc/x+UYXMFSKTuCC60XS8uM= =JXpo -----END PGP SIGNATURE----- --nsxhfttvwtrgrhot-- --===============1977572974== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4 IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg== --===============1977572974==--